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GB2463252B - A decoder and a method of decoding - Google Patents

A decoder and a method of decoding

Info

Publication number
GB2463252B
GB2463252B GB0816146A GB0816146A GB2463252B GB 2463252 B GB2463252 B GB 2463252B GB 0816146 A GB0816146 A GB 0816146A GB 0816146 A GB0816146 A GB 0816146A GB 2463252 B GB2463252 B GB 2463252B
Authority
GB
United Kingdom
Prior art keywords
decoder
decoding
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
GB0816146A
Other versions
GB2463252A (en
GB0816146D0 (en
Inventor
Mohamed Rafiq Ismail
Imran Ahmed
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Europe Ltd
Original Assignee
Toshiba Research Europe Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Research Europe Ltd filed Critical Toshiba Research Europe Ltd
Priority to GB0816146A priority Critical patent/GB2463252B/en
Publication of GB0816146D0 publication Critical patent/GB0816146D0/en
Publication of GB2463252A publication Critical patent/GB2463252A/en
Application granted granted Critical
Publication of GB2463252B publication Critical patent/GB2463252B/en
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/11Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
    • H03M13/1102Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
    • H03M13/1105Decoding
    • H03M13/1131Scheduling of bit node or check node processing
    • H03M13/1137Partly parallel processing, i.e. sub-blocks or sub-groups of nodes being processed in parallel
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/11Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/29Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes
    • H03M13/2957Turbo codes and decoding
    • H03M13/2978Particular arrangement of the component decoders
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00Arrangements for detecting or preventing errors in the information received
    • H04L1/004Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0045Arrangements at the receiver end
    • H04L1/0047Decoding adapted to other signal detection operation
    • H04L1/005Iterative decoding, including iteration between signal detection and decoding operation

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Probability & Statistics with Applications (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Error Detection And Correction (AREA)
GB0816146A 2008-09-04 2008-09-04 A decoder and a method of decoding Expired - Fee Related GB2463252B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
GB0816146A GB2463252B (en) 2008-09-04 2008-09-04 A decoder and a method of decoding

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GB0816146A GB2463252B (en) 2008-09-04 2008-09-04 A decoder and a method of decoding

Publications (3)

Publication Number Publication Date
GB0816146D0 GB0816146D0 (en) 2008-10-15
GB2463252A GB2463252A (en) 2010-03-10
GB2463252B true GB2463252B (en) 2010-09-01

Family

ID=39888788

Family Applications (1)

Application Number Title Priority Date Filing Date
GB0816146A Expired - Fee Related GB2463252B (en) 2008-09-04 2008-09-04 A decoder and a method of decoding

Country Status (1)

Country Link
GB (1) GB2463252B (en)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9912441B2 (en) 2013-11-22 2018-03-06 Kamstrup A/S Consumption meter with error-correction
US10078456B2 (en) 2014-09-04 2018-09-18 National Instruments Corporation Memory system configured to avoid memory access hazards for LDPC decoding
CN109428604B (en) * 2017-09-04 2022-07-29 扬智科技股份有限公司 LDPC code decoding method and circuit adopting improved TDMP algorithm

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20040034828A1 (en) * 2002-08-15 2004-02-19 Texas Instruments Incorporated Hardware-efficient low density parity check code for digital communications
EP1696574A1 (en) * 2005-02-26 2006-08-30 Broadcom Corporation AMP (Accelerated Message Passing) decoder adapted for LDPC (Low Density Parity Check) codes
US20080189589A1 (en) * 2007-02-02 2008-08-07 Samsung Electronics Co., Ltd. Apparatus and method for receiving signal in a communication system

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20040034828A1 (en) * 2002-08-15 2004-02-19 Texas Instruments Incorporated Hardware-efficient low density parity check code for digital communications
EP1696574A1 (en) * 2005-02-26 2006-08-30 Broadcom Corporation AMP (Accelerated Message Passing) decoder adapted for LDPC (Low Density Parity Check) codes
US20080189589A1 (en) * 2007-02-02 2008-08-07 Samsung Electronics Co., Ltd. Apparatus and method for receiving signal in a communication system

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
IEEE Transactions on Signal Processing, vol.54 no.11, Nov. 2006, pp.4376-4392, Mansour,M., "A turbo-decoding message-passing algorithm for sparse parity-check matrix codes" *
Proc.,2007 IEEE International Symposium on Circuits and Systems, New Orleans, 27-30 May 2007, pub. IEEE, US, pp. 1649-1652, Yi-Hsieng,C. et al, "A high throughput H-QC LDPC decoder", ISBN 1-4244-0920-9 *

Also Published As

Publication number Publication date
GB2463252A (en) 2010-03-10
GB0816146D0 (en) 2008-10-15

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Legal Events

Date Code Title Description
PCNP Patent ceased through non-payment of renewal fee

Effective date: 20130904