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GB2448488B - Data processing apparatus - Google Patents

Data processing apparatus

Info

Publication number
GB2448488B
GB2448488B GB0706918.0A GB0706918A GB2448488B GB 2448488 B GB2448488 B GB 2448488B GB 0706918 A GB0706918 A GB 0706918A GB 2448488 B GB2448488 B GB 2448488B
Authority
GB
United Kingdom
Prior art keywords
processing apparatus
data processing
data
processing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
GB0706918.0A
Other versions
GB0706918D0 (en
GB2448488A (en
Inventor
Alistair Guy Morfey
Karl Leighton Swepson
Neil Edward Johnson
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Cambridge Consultants Ltd
Original Assignee
Cambridge Consultants Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Cambridge Consultants Ltd filed Critical Cambridge Consultants Ltd
Priority to GB0706918.0A priority Critical patent/GB2448488B/en
Publication of GB0706918D0 publication Critical patent/GB0706918D0/en
Publication of GB2448488A publication Critical patent/GB2448488A/en
Application granted granted Critical
Publication of GB2448488B publication Critical patent/GB2448488B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F8/00—Arrangements for software engineering
    • G06F8/40—Transformation of program code
    • G06F8/41—Compilation
    • G06F8/44—Encoding
    • G06F8/443—Optimisation
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/34—Addressing or accessing the instruction operand or the result ; Formation of operand address; Addressing modes
    • G06F9/342—Extension of operand address space
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/06—Addressing a physical block of locations, e.g. base addressing, module addressing, memory dedication
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/3004—Arrangements for executing specific machine instructions to perform operations on memory
    • G06F9/30043—LOAD or STORE instructions; Clear instruction
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30094—Condition code generation, e.g. Carry, Zero flag
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30098—Register arrangements
    • G06F9/30101—Special purpose registers
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30098—Register arrangements
    • G06F9/30105—Register structure
    • G06F9/30112—Register structure comprising data of variable length
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30098—Register arrangements
    • G06F9/3012—Organisation of register space, e.g. banked or distributed register file
    • G06F9/3013—Organisation of register space, e.g. banked or distributed register file according to data content, e.g. floating-point registers, address registers
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30145—Instruction analysis, e.g. decoding, instruction word fields
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30145—Instruction analysis, e.g. decoding, instruction word fields
    • G06F9/30149—Instruction analysis, e.g. decoding, instruction word fields of variable length instructions
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30145—Instruction analysis, e.g. decoding, instruction word fields
    • G06F9/3016—Decoding the operand specifier, e.g. specifier format
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30145—Instruction analysis, e.g. decoding, instruction word fields
    • G06F9/3016—Decoding the operand specifier, e.g. specifier format
    • G06F9/30167—Decoding the operand specifier, e.g. specifier format of immediate specifier, e.g. constants
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/32—Address formation of the next instruction, e.g. by incrementing the instruction counter
    • G06F9/322—Address formation of the next instruction, e.g. by incrementing the instruction counter for non-sequential address
    • G06F9/324—Address formation of the next instruction, e.g. by incrementing the instruction counter for non-sequential address using program counter relative addressing
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/34—Addressing or accessing the instruction operand or the result ; Formation of operand address; Addressing modes
    • G06F9/355—Indexed addressing
    • G06F9/3557—Indexed addressing using program counter as base address
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/48—Program initiating; Program switching, e.g. by interrupt
    • G06F9/4806—Task transfer initiation or dispatching
    • G06F9/4812—Task transfer initiation or dispatching by interrupt, e.g. masked
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/48—Program initiating; Program switching, e.g. by interrupt
    • G06F9/4806—Task transfer initiation or dispatching
    • G06F9/4843—Task transfer initiation or dispatching by program, e.g. task dispatcher, supervisor, operating system

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Software Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Executing Machine-Instructions (AREA)
GB0706918.0A 2007-04-10 2007-04-10 Data processing apparatus Active GB2448488B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
GB0706918.0A GB2448488B (en) 2007-04-10 2007-04-10 Data processing apparatus

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GB0706918.0A GB2448488B (en) 2007-04-10 2007-04-10 Data processing apparatus

Publications (3)

Publication Number Publication Date
GB0706918D0 GB0706918D0 (en) 2007-05-16
GB2448488A GB2448488A (en) 2008-10-22
GB2448488B true GB2448488B (en) 2012-09-12

Family

ID=38091122

Family Applications (1)

Application Number Title Priority Date Filing Date
GB0706918.0A Active GB2448488B (en) 2007-04-10 2007-04-10 Data processing apparatus

Country Status (1)

Country Link
GB (1) GB2448488B (en)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20090182992A1 (en) * 2008-01-11 2009-07-16 International Business Machines Corporation Load Relative and Store Relative Facility and Instructions Therefore
CA2723682C (en) 2008-05-05 2014-09-23 Raytheon Company Methods and apparatus for detection/classification of radar targets including birds and other hazards
GB2493124B (en) * 2008-07-10 2013-08-28 Cambridge Consultants Data processing apparatus
ES2634111T3 (en) 2009-04-17 2017-09-26 Raytheon Company Method and apparatus for integration of distributed sensors and surveillance radar in airports to mitigate blind spots
CN111382429B (en) * 2018-12-27 2022-12-27 华为技术有限公司 Instruction execution method and device and storage medium

Citations (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB1267582A (en) * 1968-03-15 1972-03-22 Burroughs Corp Digital electronic data processing systems
JPS5960645A (en) * 1982-09-30 1984-04-06 Fujitsu Ltd System for processing instruction execution of processor
US5778220A (en) * 1996-11-18 1998-07-07 Intel Corporation Method and apparatus for disabling interrupts in a highly pipelined processor
US6029222A (en) * 1996-01-17 2000-02-22 Yamaha Corporation Method and processor for selectively marking instructions as interruptible or uninterruptible and judging interrupt requests based on the marked instruction
US20030105935A1 (en) * 2001-11-30 2003-06-05 Moore Derick G. Method and apparatus for accessing ROM PCI memory above 64 K
US20030221091A1 (en) * 2002-03-08 2003-11-27 Ip-First Llc Selective interrupt suppression
US6742113B1 (en) * 1999-05-31 2004-05-25 Renesas Technology Corp. Microprocessor with EIT, processing capability, and EIT processing method
US20050102458A1 (en) * 2003-11-12 2005-05-12 Infineon Technologies North America Corp. Interrupt and trap handling in an embedded multi-thread processor to avoid priority inversion and maintain real-time operation
US7130951B1 (en) * 2002-04-18 2006-10-31 Advanced Micro Devices, Inc. Method for selectively disabling interrupts on a secure execution mode-capable processor
WO2007147443A1 (en) * 2006-06-23 2007-12-27 Freescale Semiconductor, Inc. Interrupt response control apparatus and method therefor

Patent Citations (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB1267582A (en) * 1968-03-15 1972-03-22 Burroughs Corp Digital electronic data processing systems
JPS5960645A (en) * 1982-09-30 1984-04-06 Fujitsu Ltd System for processing instruction execution of processor
US6029222A (en) * 1996-01-17 2000-02-22 Yamaha Corporation Method and processor for selectively marking instructions as interruptible or uninterruptible and judging interrupt requests based on the marked instruction
US5778220A (en) * 1996-11-18 1998-07-07 Intel Corporation Method and apparatus for disabling interrupts in a highly pipelined processor
US6742113B1 (en) * 1999-05-31 2004-05-25 Renesas Technology Corp. Microprocessor with EIT, processing capability, and EIT processing method
US20030105935A1 (en) * 2001-11-30 2003-06-05 Moore Derick G. Method and apparatus for accessing ROM PCI memory above 64 K
US20030221091A1 (en) * 2002-03-08 2003-11-27 Ip-First Llc Selective interrupt suppression
US7130951B1 (en) * 2002-04-18 2006-10-31 Advanced Micro Devices, Inc. Method for selectively disabling interrupts on a secure execution mode-capable processor
US20050102458A1 (en) * 2003-11-12 2005-05-12 Infineon Technologies North America Corp. Interrupt and trap handling in an embedded multi-thread processor to avoid priority inversion and maintain real-time operation
WO2007147443A1 (en) * 2006-06-23 2007-12-27 Freescale Semiconductor, Inc. Interrupt response control apparatus and method therefor

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
Digital Mars, "Choosing a Memory Model", version as of 5 April 2007. Available from http://digitalmars.com/ctg/ctgMemoryModel.html (accessed 30 September 2011). *
Wikipedia contributors, "Intel Memory Model", version as of 30 March 2007, Wikipedia, The Free Encyclopedia, available at http://en.wikipedia.org/w/index.php?title=Intel_Memory_Model&oldid=119000497 (accessed 30 September 2011). *

Also Published As

Publication number Publication date
GB0706918D0 (en) 2007-05-16
GB2448488A (en) 2008-10-22

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Legal Events

Date Code Title Description
R108 Alteration of time limits (patents rules 1995)

Free format text: EXTENSION ALLOWED

Effective date: 20120531