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GB2442278B - Phase locked loop - Google Patents

Phase locked loop

Info

Publication number
GB2442278B
GB2442278B GB0619268A GB0619268A GB2442278B GB 2442278 B GB2442278 B GB 2442278B GB 0619268 A GB0619268 A GB 0619268A GB 0619268 A GB0619268 A GB 0619268A GB 2442278 B GB2442278 B GB 2442278B
Authority
GB
United Kingdom
Prior art keywords
locked loop
phase locked
phase
loop
locked
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
GB0619268A
Other versions
GB2442278A (en
GB0619268D0 (en
Inventor
Benjamin James Ogden Kerr
Peter Rowe
Robert Gatward
Lee Thomas
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Avaya ECS Ltd
Original Assignee
Avaya ECS Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Avaya ECS Ltd filed Critical Avaya ECS Ltd
Priority to GB0619268A priority Critical patent/GB2442278B/en
Publication of GB0619268D0 publication Critical patent/GB0619268D0/en
Publication of GB2442278A publication Critical patent/GB2442278A/en
Application granted granted Critical
Publication of GB2442278B publication Critical patent/GB2442278B/en
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08Details of the phase-locked loop
    • H03L7/085Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
    • H03L7/093Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal using special filtering or amplification characteristics in the loop
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08Details of the phase-locked loop
    • H03L7/085Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L1/00Stabilisation of generator output against variations of physical values, e.g. power supply
    • H03L1/02Stabilisation of generator output against variations of physical values, e.g. power supply against variations of temperature only
    • H03L1/022Stabilisation of generator output against variations of physical values, e.g. power supply against variations of temperature only by indirect stabilisation, i.e. by generating an electrical correction signal which is a function of the temperature
    • H03L1/026Stabilisation of generator output against variations of physical values, e.g. power supply against variations of temperature only by indirect stabilisation, i.e. by generating an electrical correction signal which is a function of the temperature by using a memory for digitally storing correction values
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08Details of the phase-locked loop
    • H03L7/10Details of the phase-locked loop for assuring initial synchronisation or for broadening the capture range
    • H03L7/107Details of the phase-locked loop for assuring initial synchronisation or for broadening the capture range using a variable transfer function for the loop, e.g. low pass filter having a variable bandwidth
GB0619268A 2006-09-29 2006-09-29 Phase locked loop Expired - Fee Related GB2442278B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
GB0619268A GB2442278B (en) 2006-09-29 2006-09-29 Phase locked loop

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GB0619268A GB2442278B (en) 2006-09-29 2006-09-29 Phase locked loop

Publications (3)

Publication Number Publication Date
GB0619268D0 GB0619268D0 (en) 2006-11-08
GB2442278A GB2442278A (en) 2008-04-02
GB2442278B true GB2442278B (en) 2011-07-20

Family

ID=37434947

Family Applications (1)

Application Number Title Priority Date Filing Date
GB0619268A Expired - Fee Related GB2442278B (en) 2006-09-29 2006-09-29 Phase locked loop

Country Status (1)

Country Link
GB (1) GB2442278B (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7986255B2 (en) * 2009-11-24 2011-07-26 Nxp B.V. High resolution overlapping bit segmented DAC
CN109217821B (en) * 2017-07-03 2024-02-09 中兴通讯股份有限公司 Frequency device compensation method, device and system and computer readable storage medium

Citations (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4827225A (en) * 1988-06-13 1989-05-02 Unisys Corporation Fast locking phase-locked loop utilizing frequency estimation
US4920320A (en) * 1988-12-19 1990-04-24 Motorola, Inc. Phase locked loop with optimally controlled bandwidth
US4972160A (en) * 1989-12-07 1990-11-20 Northern Telecom Limited Phase-lock loop circuit with improved output signal jitter performance
JPH0335618A (en) * 1989-06-30 1991-02-15 Toyo Commun Equip Co Ltd Weak connection oscillator for multiple gain
US5392005A (en) * 1993-09-30 1995-02-21 At&T Corp. Field calibration of a digitally compensated crystal oscillator over a temperature range
US5477194A (en) * 1993-07-12 1995-12-19 Nec Corporation Temperature compensated PLL frequency synthesizer and high-speed frequency lock method using the same
GB2311178A (en) * 1996-03-14 1997-09-17 Nec Corp PLL synthesizers
US5786733A (en) * 1995-12-04 1998-07-28 Nec Corporation Phase-locked oscillating circuit with a frequency fluctuation detecting circuit
US5875388A (en) * 1995-02-10 1999-02-23 Matsushita Communication Industrial Corporation Of America Crystal oscillator with automatic compensation for aging and temperature
US6023198A (en) * 1998-06-08 2000-02-08 Motorola, Inc. Self-tuning and temperature compensated voltage controlled oscillator
WO2002093748A1 (en) * 2001-05-16 2002-11-21 Kyocera Wireless Corporation Reference oscillator with automatic compensation for aging and temperature
US20030048139A1 (en) * 2001-09-04 2003-03-13 Hwey-Ching Chien Fast coarse tuning control for pll frequency synthesizer
US20040232997A1 (en) * 2003-05-02 2004-11-25 Silicon Laboratories Inc. Method and apparatus for temperature compensation
US20040246059A1 (en) * 2003-06-03 2004-12-09 Halliburton Energy Services, Inc. Method and system for downhole clock
US20060017512A1 (en) * 2004-07-26 2006-01-26 Realtek Semiconductor Corp. Circuit for detecting phase errors and generating control signals and PLL using the same
EP1814230A1 (en) * 2006-01-30 2007-08-01 Infineon Technologies AG Phase locked loop circuitry with digital loop filter

Patent Citations (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4827225A (en) * 1988-06-13 1989-05-02 Unisys Corporation Fast locking phase-locked loop utilizing frequency estimation
US4920320A (en) * 1988-12-19 1990-04-24 Motorola, Inc. Phase locked loop with optimally controlled bandwidth
JPH0335618A (en) * 1989-06-30 1991-02-15 Toyo Commun Equip Co Ltd Weak connection oscillator for multiple gain
US4972160A (en) * 1989-12-07 1990-11-20 Northern Telecom Limited Phase-lock loop circuit with improved output signal jitter performance
US5477194A (en) * 1993-07-12 1995-12-19 Nec Corporation Temperature compensated PLL frequency synthesizer and high-speed frequency lock method using the same
US5392005A (en) * 1993-09-30 1995-02-21 At&T Corp. Field calibration of a digitally compensated crystal oscillator over a temperature range
US5875388A (en) * 1995-02-10 1999-02-23 Matsushita Communication Industrial Corporation Of America Crystal oscillator with automatic compensation for aging and temperature
US5786733A (en) * 1995-12-04 1998-07-28 Nec Corporation Phase-locked oscillating circuit with a frequency fluctuation detecting circuit
GB2311178A (en) * 1996-03-14 1997-09-17 Nec Corp PLL synthesizers
US6023198A (en) * 1998-06-08 2000-02-08 Motorola, Inc. Self-tuning and temperature compensated voltage controlled oscillator
WO2002093748A1 (en) * 2001-05-16 2002-11-21 Kyocera Wireless Corporation Reference oscillator with automatic compensation for aging and temperature
US20030048139A1 (en) * 2001-09-04 2003-03-13 Hwey-Ching Chien Fast coarse tuning control for pll frequency synthesizer
US20040232997A1 (en) * 2003-05-02 2004-11-25 Silicon Laboratories Inc. Method and apparatus for temperature compensation
US20040246059A1 (en) * 2003-06-03 2004-12-09 Halliburton Energy Services, Inc. Method and system for downhole clock
US20060017512A1 (en) * 2004-07-26 2006-01-26 Realtek Semiconductor Corp. Circuit for detecting phase errors and generating control signals and PLL using the same
EP1814230A1 (en) * 2006-01-30 2007-08-01 Infineon Technologies AG Phase locked loop circuitry with digital loop filter

Also Published As

Publication number Publication date
GB2442278A (en) 2008-04-02
GB0619268D0 (en) 2006-11-08

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Legal Events

Date Code Title Description
PCNP Patent ceased through non-payment of renewal fee

Effective date: 20120929