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GB2320613A - Interconnect fabrication - Google Patents

Interconnect fabrication Download PDF

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Publication number
GB2320613A
GB2320613A GB9725029A GB9725029A GB2320613A GB 2320613 A GB2320613 A GB 2320613A GB 9725029 A GB9725029 A GB 9725029A GB 9725029 A GB9725029 A GB 9725029A GB 2320613 A GB2320613 A GB 2320613A
Authority
GB
United Kingdom
Prior art keywords
accordance
film
layer
forming
reflection film
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
GB9725029A
Other versions
GB9725029D0 (en
GB2320613B (en
Inventor
Seoung Wook Lee
Yeo Song Seol
Chang Ju Choi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
SK Hynix Inc
Original Assignee
Hyundai Electronics Industries Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hyundai Electronics Industries Co Ltd filed Critical Hyundai Electronics Industries Co Ltd
Publication of GB9725029D0 publication Critical patent/GB9725029D0/en
Publication of GB2320613A publication Critical patent/GB2320613A/en
Application granted granted Critical
Publication of GB2320613B publication Critical patent/GB2320613B/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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Classifications

    • H10D64/011
    • H10W20/063

Landscapes

  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Drying Of Semiconductors (AREA)

Abstract

A barrier layer 12 (eg TiN) is formed over an interlayer insulator layer 11, an interconnect layer 13 (eg tungsten) is formed over the barrier layer, and an antireflection film 14 is formed over the interconnect layer. A patterned photoresist layer 15 is used for masking the underlying metallic layers during a high density plasma etch at low temperature. A highly selective etch process which produces vertical sidewalls is obtained by increasing the source power and decreasing the bias power, and by adjusting the element concentration ratio in the etch gas.

Description

- 'I, 2320613 METHOD FOR FORMING METAL LINES OF SEMICONDUCTOR DEVICE
BACKGROUND OF THE INVENTION
Field of the Invention
The present invention relates to a method for forming metal lines of a semiconductor device, and more particularly to a method for forming a metal line forming method which is appropriately usable for the formation of micro patterns of highly integrated semiconductor devices.
Description of the Prior Art
Generally, high integration of semiconductor devices results in a reduction in the width of metal lines. For this reason, the use of a far ultraviolet photoresist film is essentially required in the formation of micro patterns.
However, such a far ultraviolet photoresist film exhibits a low etch selectivity and an insufficient etch process margin. As a result, it is difficult to form micro patterns using the far ultraviolet photoresist film.
This will be described in more detail hereinafter.
A photoresist film pattern is formed by coating a photoresist film over a metal line layer deposited over an under layer having steps, exposing the photoresist film to light and then developing the light-exposed photoresist film.
Thereafter, the metal line layer is partially etched at its portion not coated with the photoresist film pattern. During this etch process, the photoresist film is also partially etched at its thin portion coated on a high topology region due to a low etch selectivity thereof. As a result, the portion of the metal line layer disposed beneath the etched photoresist film portion. This 1 metal line layer portion is undesirably etched, thereby forming a metal line having a poor quality. In other words, a degradation in etch process margin occurs.
When the metal line layer exposed after the etching of the photoresist film is etched, a difference in etch rate may occur due to a polymer used. In this case, metal lines finally formed have rough surfaces.
In connection with this, a conventional method for forming metal lines will now be described in conjunction with FIGS. 1 and 2.
FIGS. 1 and 2 are sectional views respectively illustrating sequential steps of the conventional metal line forming method.
In accordance with this method, a barrier layer 2 is first formed over an under layer 1 having steps, as shown in FIG. 1. A tungsten layer 3 is then formed over the barrier layer 2.
Thereafter, an anti-reflection film 4 is laminated over the tungsten layer 3. A photoresist film 5 is then coated over the anti-reflection film 4.
Referring to FIG. 1, it can be found that the photoresist film 5 has a thin portion disposed on a portion of the under layer 1 exhibiting a high topology.
Subsequently, the photoresist film 5 is selectively removed in accordance with an illumination and development process using a metal line mask, thereby forming a photoresist film pattern 5a, as shown in FIG. 2.
However, the conventional metal line forming method has various problems, as mentioned above.
2 For example, in accordance with the conventional metal line forming method, recesses A are formed in the side walls of the tungsten layer during the etch process. As a result, a poor side wall profile is obtained.
is In accordance with the conventional metal line forming method, a hard mask layer exhibiting a high etch selectivity to tungsten, such as a titanium nitride film or silicon oxide film, may be thickly deposited over the tungsten layer so that it is used as an etch barrier, in order to prevent such a poor side wall profile. In this case, however, there is a problem in that the hard mask layer exhibits an increase in contact resistance to an upper metal line subsequently formed.
SUM4ARY OF THE INVENTION Therefore, an object of the invention is to solve the abovementioned problems involved in the conventional method and to provide a method for forming micro patterns of semiconductor devices, which is capable of effectively forming micro patterns of a highly integrated semiconductor device.
Another object of the invention is to provide a method for forming metal lines of semiconductor devices, which is capable of achieving an improvement in the etch selectivity between a photoresist film and a metal layer used in the formation of metal lines, thereby achieving an improvement in the etch process margin while allowing subsequent processes to be easily carried out and preventing an increase in contact resistance.
Another object of the invention is to provide a method for forming metal lines having a vertical side wall profile.
In accordance with the present invention, these objects are accomplished by providing a method for forming metal lines of a 3 semiconductor device, comprising the steps of: providing an under layer; sequentially forming a barrier film, a tungsten layer and an anti- reflection film over the under layer; forming a photoresist film pattern on the anti-reflection film; and sequentially etching the anti-reflection film, the tungsten layer and the barrier layer in a plasma atmosphere maintained at a room temperature or below and at a high density of about 1010, thereby forming metal lines.
BRIEF DESCRIPTION OF THE DRAWINGS is other objects and aspects of the invention will become apparent from the following description of embodiments with reference to the accompanying drawings in which:
FIGS. 1 and 2 are sectional views respectively illustrating sequential steps of a conventional metal line forming method; and FIGS. 3 and 4 are sectional views respectively illustrating sequential steps of a metal line forming method in accordance with an embodiment of the present invention.
DESCRIPTION OF THE PREFERRED EMBODIMENTS
FIGS. 3 and 4 illustrate sequential steps of a method for forming metal lines in accordance with an embodiment of the present invention, respectively.
In accordance with this method, a barrier layer 12 is first formed over an under layer 11 having steps, as shown in FIG. 3. A tungsten layer 13 is then formed over the barrier layer 12. Thereafter, an anti-reflection film 14 is laminated over the tungsten layer 13.
The barrier layer 12 has a laminated structure consisting of, for example, a Ti layer and a TiN layer.
In place of the tungsten layer 13, a layer made of aluminum, 4 aluminum alloy, and copper, etc. may be used.
The anti-reflection film 14 has a thickness of about 300 to 1,000 A.
Subsequently, a far ultraviolet photoresist film 15 is then coated over the anti-reflection film 14. The photoresist film 15 is then selectively removed, thereby forming a photoresist film pattern 15a, as shown in FIG. 4.
The photoresist film 15 has a thickness of about 0.4 to 2.0 Am.
Using the photoresist film pattern 15a as a mask, the layers disposed beneath the photoresist film pattern 15a are sequentially removed in accordance with an etch process, thereby forming an antireflection film pattern 14a, a tungsten layer pattern 13a and a barrier layer pattern 12a.
The etch process for etching the barrier layer 12, tungsten layer 13 and anti-reflection film 14 is carried out using a helicon source and source electric power of 1 to 3 KWatt in order to obtain a plasma of high density of about 1012-13.
Bias electric power applied to electrodes disposed in a reaction chamber, where the etch process is carried out, is ranged from 10 Watt to 50 Watt, in order to reduce physical force of ions, thereby reducing a phenomenon that the photoresist film pattern is etched.
When the etch process is carried out under the above-mentioned conditions, the etch selectivity of each metal layer to the photoresist film increases. In this case, however, round recesses may be formed in the side walls of the formed tungsten layer line. In order to solve this problem, the electrodes in the reaction chamber is maintained at a temperature of -60 to OOC in accordance with the present invention.
Meanwhile, chlorine-based gas such as cl 2 or BC1 3 is used for the anti-reflection film 14 during the etch process is carried out using the photoresist film pattern 15a as a mask.
The etch process for the tungsten layer 13 is carried out in a continued manner in the same reaction chamber, but using an atmosphere produced by mixing fluorine-based gas (for example, SF 61 CF 4 ' and NF 3 # etc.) with nitrogen or mixing such fluorine-based gas with oxygen and argon.
is The total amount of the mixture gas used to etch the tungsten layer 13 is ranged from 50 SCCM (Standard Cubic Centimeter) to 500 SCCM. The content of nitrogen (or oxygen + argon) in the mixture gas (namely, fluorine- based gas + nitrogen (or oxygen + argon)) is ranged from 0% to 50%.
The etch process for the barrier layer 12 is also carried out in a continued manner in the same reaction chamber while using chlorine-based gas.
As is apparent from the above description, the method for forming metal lines of semiconductor devices in accordance with the present invention provides various effects.
That is, in accordance with the present invention, it is possible to improve the etch selectivity between the photoresist film and metal layers in the formation of metal lines having a ultra-micro line width on an under layer having steps, thereby achieving an increase in the etch process margin.
Accordingly, a hard mask layer, which is required to obtain an improvement in etch selectivity in conventional methods, may have 6 a reduced thickness. In some cases, use of such a hard mask layer may be eliminated. Consequently, it is possible to carry out subsequent processes while preventing an increase in contact resistance.
Thus, the metal line forming method of the present invention can be effectively applied to the formation of metal lines of highly integrated semiconductor devices because it can form metal lines having a vertical side wall profile.
Although the preferred embodiments of the invention have been disclosed for illustrative purposes, those skilled in the art will appreciate that various modifications, additions and substitutions are possible, without departing from the scope and spirit of the invention as disclosed in the accompanying claims.
7

Claims (15)

  1. WHAT IS CLAIMED IS:
    is 1. A method for forming metal lines of a semiconductor device, comprising the steps of:
    providing an under layer; sequentially forming a barrier film, a tungsten layer and an anti- reflection film over the under layer; forming a photoresist film pattern on the anti-reflection film; and sequentially etching the antireflection film, the tungsten layer and the barrier layer in a plasma atmosphere maintained at a room temperature or below and at a high density of about 1010, thereby forming metal lines.
  2. 2. The method in accordance with Claim 1, wherein the barrier film has a laminated structure consisting of a titanium film and a titanium nitride film.
  3. 3. The method in accordance with Claim 1, wherein the anti- reflection film is comprised of a titanium nitride film.
  4. 4. The method in accordance with Claim 1, wherein the antireflection film has a thickness of about 300 to 1,000 A.
  5. 5. The method in accordance with Claim 1, wherein the step of forming the photoresist film pattern comprises the steps of forming a photoresist film over the anti-reflection film to a thickness of about 0.4 to 2.0 gm, and then selectively removing the photoresist film.
  6. 6. The method in accordance with Claim 1, wherein electrodes disposed in a low-temperature plasma chamber, in which the plasma atmosphere is produced, is maintained at a temperature ranging f rom about -600C to about 250C.
    i 1 8
  7. 7. The method in accordance with Claim 1, wherein the plasma atmosphere is maintained at a density ranging from about 1012 to 13 about 10
  8. 8. The method in accordance with Claim 1, wherein the plasma atmosphere is produced using a helicon source.
  9. 9. The method in accordance with Claim 1, wherein the anti- reflection film and the barrier film are etched using chlorine based gas.
  10. 10. The method in accordance with Claim 9, wherein the chlorinebased gas contains Cl 2 or BC1 3 is
  11. 11. The method in accordance with Claim 1, wherein the tungsten layer is etched using a mixture gas produced by mixing fluorinebased gas with nitrogen or mixing fluorine-based gas with oxygen and argon.
  12. 12. The method in accordance with Claim 11, wherein the mixture gas consisting of fluorine-based gas and nitrogen is used in an amount of 50 to 500 SCCM.
  13. 13. The method in accordance with Claim 11, wherein the content of the fluorine-based gas in the mixture gas is ranged from about 50015 to 100%.
  14. 14. The method in accordance with Claim 1, wherein the steps of etching the anti-reflection film, the tungsten layer and the barrier film are carried out using bias electric power of about 10 to 50 Watt applied to electrodes disposed in a low-temperature plasma chamber in which the plasma atmosphere is produced.
  15. 15. The method in accordance with Claim 1, wherein the steps of etching the anti-reflection film, the tungsten layer and the 9 barrier film are carried out using source electric power of about 1 to 3 KWatt.
GB9725029A 1996-12-20 1997-11-26 Method for forming metal lines of semiconductor device Expired - Fee Related GB2320613B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019960068902A KR100248342B1 (en) 1996-12-20 1996-12-20 Metal wiring formation method of semiconductor device

Publications (3)

Publication Number Publication Date
GB9725029D0 GB9725029D0 (en) 1998-01-28
GB2320613A true GB2320613A (en) 1998-06-24
GB2320613B GB2320613B (en) 2002-02-13

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GB9725029A Expired - Fee Related GB2320613B (en) 1996-12-20 1997-11-26 Method for forming metal lines of semiconductor device

Country Status (6)

Country Link
JP (1) JP3238363B2 (en)
KR (1) KR100248342B1 (en)
CN (1) CN1099700C (en)
DE (1) DE19756227A1 (en)
GB (1) GB2320613B (en)
TW (1) TW350999B (en)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100307629B1 (en) * 1999-04-30 2001-09-26 윤종용 Method for forming and applicating a anti reflective film using hydrocarbon based gas
KR100555484B1 (en) * 1999-09-03 2006-03-03 삼성전자주식회사 Tungsten wiring manufacturing method of semiconductor device
JP3733021B2 (en) * 2000-12-15 2006-01-11 シャープ株式会社 Plasma process method
KR100399442B1 (en) * 2001-06-28 2003-09-29 주식회사 하이닉스반도체 Method for forming a metal line
KR100425467B1 (en) * 2001-09-29 2004-03-30 삼성전자주식회사 Method of dry etching for semiconductor device
CN101593689B (en) * 2008-05-29 2010-12-22 中芯国际集成电路制造(北京)有限公司 Photoetch pattern formation method and double mosaic structure manufacture method
JP5845714B2 (en) * 2011-08-19 2016-01-20 住友電気工業株式会社 Method for manufacturing silicon carbide semiconductor device

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH06314671A (en) * 1993-04-30 1994-11-08 Sony Corp Manufacture of semiconductor device
US5376585A (en) * 1992-09-25 1994-12-27 Texas Instruments Incorporated Method for forming titanium tungsten local interconnect for integrated circuits
JPH0869995A (en) * 1994-08-30 1996-03-12 Sony Corp Plasma etching method

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH06318573A (en) * 1993-05-07 1994-11-15 Sony Corp Refractory metal etching method

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5376585A (en) * 1992-09-25 1994-12-27 Texas Instruments Incorporated Method for forming titanium tungsten local interconnect for integrated circuits
JPH06314671A (en) * 1993-04-30 1994-11-08 Sony Corp Manufacture of semiconductor device
JPH0869995A (en) * 1994-08-30 1996-03-12 Sony Corp Plasma etching method

Also Published As

Publication number Publication date
DE19756227A1 (en) 1998-06-25
TW350999B (en) 1999-01-21
KR19980050124A (en) 1998-09-15
JP3238363B2 (en) 2001-12-10
CN1185654A (en) 1998-06-24
GB9725029D0 (en) 1998-01-28
GB2320613B (en) 2002-02-13
JPH10189594A (en) 1998-07-21
CN1099700C (en) 2003-01-22
KR100248342B1 (en) 2000-03-15

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PCNP Patent ceased through non-payment of renewal fee

Effective date: 20091126