GB2305295A

GB2305295A - Method for forming interlayer insulating film of semiconductor device

Info

Publication number: GB2305295A
Application number: GB9619116A
Authority: GB
Inventors: Si Bum Kim
Original assignee: Hyundai Electronics Industries Co Ltd
Current assignee: SK Hynix Inc
Priority date: 1995-09-14
Filing date: 1996-09-12
Publication date: 1997-04-02
Anticipated expiration: 2016-09-12
Also published as: JP2937886B2; JPH09129625A; GB2305295B; GB9619116D0; KR970018399A; KR100197980B1; DE19637458A1

Description

2305295 METHOD FOR FORMING INTERLAYER INSULATING FIIX OF SEMICONDUCTOR

DEVICE

BACKGROUND OF THE INVENTION

Field of the Inventi

The present invention relates to a method for fabricating a semiconductor device, and more particularly to a method for forming an interlayer insulating film of a semiconductor device.

DescrijRtion of the Prior Art

In the planarization of a CMOS device having a multilayer wiring structure, spin on glass (SOG) is typically used as an interlayer insulating film. A metal wiring is formed on the is uppermost layer. A protective film made of SiN. is deposited over the metal wiring.

Since H, OH, H20, etc. contained in the SOG f ilm and SiN. penetrate into the semiconductor device upon conducting a subsequent thermal process, a field inversion phenomenon may occur in that the insulation property between the drain and source of a parasitic MOSFET is degraded.

As a result, the threshold voltage between the drain and source is lowered whereas the leakage of current increases. For this reason, there is a problem in that the operation characteristic of the device becomes unstable.

In this connection, a conventional method for forming a CMOS device having a double-layer metal wiring structure will now be described in conjunction with FIG. 1.

FIG. 1 is a sectional view illustrating a semiconductor device having a double-layer wiring structure to which an interlayer insulating film formed in accordance with the prior art is applied.

1 In accordance with this method, a semiconductor substrate 1 is first prepared, and a P-type well 3 is then formed in the semiconductor substrate 1, as shown in FIG. 1. A field oxide film 5 is formed on the surface of the P-type well 3 to define active and field regions. A gate oxide film 7 is then formed over the active region of the P-type well 3. Gate electrodes (9a) (9b) (9c) are subsequently formed on the gate oxide film 7.

Thereafter, impurity ions are implanted in the semiconductor substrate 1 at both sides of each of the gate electrodes (9a) (9b) (9c), thereby forming source/drain regions 13. Thus, two normal MOSFET's respectively consisting of elements 9a, 13a and 13b and elements 9c, 13a and 13b, and a parasitic MOSFET consisting of elements 9b, 13a and 13b.

is Subsequently, a boro-phosphor silicate glass (BPSG) film 15 is deposited over the entire upper surface of the resulting structure, thereby providing a planarized upper surface. A first-layer metal wiring 17 is then formed on a desired portion of the BPSG film 15.

Over the resulting structure, a f irst interlayer insulating film 19, a second interlayer insulating film 21 and a third interlayer insulating film 23 are then sequentially laminated in accordance with the plasma enhanced chemical vapor deposition (PECVD) method.

A second-layer metal wiring 25 is then formed on the third interlayer insulating film 23. SiNx is then deposited over the second-layer metal wiring 25, thereby forming a surface protection film 27.

In the above-mentioned method for forming an interlayer insulating film, however, a field inversion phenomenon occurs between the drain and source of the n-channel parasitic MOSFET upon conducting a thermal processing after the deposition of the surface

2 protection f ilm made of SiNx. Such a f ield inversion phenomenon occurs as hydrogen contained in the protection film diffuses downwardly and reacts with OH, CH3, H,O, etc. contained in the SOG film, thereby producing a reaction product. This reaction product penetrates into the device through the interlayer insulating film.

The f ield inversion phenomenon also results from OH and H,0 contained in the SOG f ilm. The OH and H20 contained in the SOG film serve as a donor type impurity as they penetrate into the semiconductor device or generate positive charge in the field oxide f ilm.

In other words, the reason why such a field inversion phenomenon occurs is because the under interlayer insulating film is can not prevent the impurity produced upon conducting the process from penetrating into the device.

As a result, the threshold. voltage between the drain and source is lowered, and the leakage of current increases. For this reason, a problem is created in that the operation characteristic of the device becomes unstable. This results in erroneous operation.

SUMMARY OF THE INVENTION

Therefore, an object of the invention is to provide a method for forming an interlayer insulating film of a semiconductor device, capable of avoiding a f ield inversion phenomenon between the drain and source of a parasitic MOSFET.

Another object of the invention is to provide a method for forming an interlayer insulating film of a semiconductor device, capable of achieving an improvement in the characteristic of the interlayer insulating film, thereby obtaining an improvement in the reliability of the semiconductor device.

3 1..

Another object of the invention is to provide a method for forming an interlayer insulating film of a semiconductor device, capable of achieving the formation of an interlayer insulating film applicable to highly integrated semiconductor devices.

In accordance with one aspect of the present invention, a method for forming an interlayer insulating film of a semiconductor device comprises the steps of: providing a semiconductor substrate having a under-layer metal wiring formed on an upper surface thereof; forming a barrier layer on an exposed surface of the semiconductor substrate; coating a spin-on-glass film over the barrier layer and then baking the spin-on-glass film; and forming an insulating film over the spin-on-glass film.

is In accordance with another aspect of the present invention, a method for forming an interlayer insulating film of a semiconductor device comprises the steps of: providing a semiconductor substrate having a under-layer metal wiring formed on an upper surface thereof; forming a silicon-rich oxide film over an exposed surface of the semiconductor substrate, forming a silicon nitride oxide film over the silicon-rich oxide film; forming a spin-on-glass film over the silicon nitride oxide film; and forming an oxide film over the spin-on- glass film.

BRIEF DESCRIPTION OF THE DRAWINGS

Other objects and aspects of the invention will become apparent from the following description of embodiments with reference to the accompanying drawings in which:

FIG. 1 is a sectional view illustrating a semiconductor device having a double-layer wiring structure to which an interlayer insulating film formed in accordance with the prior art is applied;

FIG. 2 is a sectional view illustrating a semiconductor device having a double-layer metal wiring structure to which an interlayer insulating film formed in accordance with the present invention is 4 applied; FIG. 3 is a graph depicting the relationship of the refractivity of the insulating film according to the present invention with the insulation- breaking critical voltage; and FIG. 4 is a graph depicting the relationship between the refractivity of the insulating film and the life of hot carriers in each MOSFET.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS is FIG. 2 is a sectional view illustrating a semiconductor device having a double-layer metal wiring structure to which an interlayer insulating film formed in accordance with the present invention is applied.

In accordance with the present invention, a semiconductor substrate 101 is first prepared, and a P-type well 103 is then formed in a desired portion of the semiconductor substrate 101, as shown in FIG. 2. A field oxide film 105 is then formed on the surface of the P-type well 103 to define active and field regions.

A gate oxide film 107 is then formed over the active region of the P-type well 103. Gate electrodes 109a, 109b and 109c are subsequently formed on desired portions of the gate oxide film 7, respectively. The well 103 may have an N-type conductivity in accordance with the conductivity of the semiconductor substrate 101.

Thereafter, side wall spacers 111 are formed on opposite side surfaces of each gate electrode 109a, 109b or 109c. Using the gate electrodes 109a, 109b and 109c as a mask, impurity ions having a conductivity opposite to the P-type well 103 are implanted in the semiconductor substrate 101, thereby forming source regions 113a and drain regions 113b.

Thus, two normal MOSFETI s respectively consisting of elements 109a,l 13a and 113b and elements 109b, 113a and 113b, and a parasitic MOSFET consisting of elements 109b, 113a and 113b.

Subsequently, a BPSG film 115 is deposited over the entire upper surface of the resulting structure, thereby providing a planarized upper surface. A first-layer metal wiring 117 is then formed on a desired portion of the BPSG film 115.

is Over the entire upper surface of the resulting structure including the exposed surfaces of the BPSG film 115 and first-layer metal wiring 117, a first interlayer insulating film 119 and a silicon-rich oxide film 121 are then sequentially laminated in accordance with the PECVD method.

The silicon-rich oxide film 121 is deposited to a thickness f rom about 500 to 3, OOOA. The f irst interlayer insulating f ilm 119 is comprised of an oxide film and silicon-rich oxide film 121 which are used as an under interlayer insulating film.

As the semiconductor device has an increased integration degree, the interval between adjacent lines of the first-layer metal wiring is reduced to, f or example, about 4 pm or less in DRAM devices of 256 Mega grade. Taking this fact into consideration, the under interlayer insulating film may consist of only the silicon-rich oxide film in accordance with another embodiment of the present invention, instead of both the first oxide film 119 and silicon-rich oxide film. This is because in the case of laminating both the first oxide film and silicon-rich oxide film, the space between adjacent lines of the metal wiring is too narrow to coat an SOG film thereon.

The deposition of the silicon-rich oxide film 121 is carried out while increasing the flow rate of SiH 4 as a silicon source, but decreasing the f low rate of N.0 as an oxygen source in the 6 deposition of a silicon oxide film using the well-known PECVD method.

When the pressure ratio of SiH, to N,0 increases, the refractivity of the film increases to about 1.55 or more.

The stress state of the film can be controlled to correspond to a compressive stress state of -0.5 to -1.5 dyne/CM2 by controlling radio frequency power.

Alternatively, the silicon-rich oxide film 121 may be deposited using a reactive gas of SiH./NO/NH3/N. in accordance with the well-known PECVD method. In this case, the deposition of the silicon-rich oxide film 121 is carried out under the conditions in is which the flow rate of SiH4 is about 300 to 600 SCCM, the flow rate of N.0 is about 4,000 to 7,000 SCCM and the flow rate of N2 is about 3,000 to 6,000 SCCM. In this case, deposition pressure of about 2 to 3 Torr, supply power of about 0. 3 to 0. 7 KW having a radio frequency of 13.56 MHz and supply power of about 0.4 to 0.8 KW having a low frequency are used. The stress state of the film is controlled to correspond to a compressive stress state of -0.5 to - 1.5 dyne/cm2 by controlling radio frequency power.

When the ratio in f low rate among NH3, N20 and N2 increases, the refractivity of the film increases to about 1.68 or more.

Where a silicon nitride oxide film is used instead of the silicon-rich oxide film 121, the same effect can be obtained.

In this case, the silicon nitride oxide film is deposited to a thickness of about 500 to 3,000 A. The deposition of the silicon nitride oxide film is carried out under conditions in which the flow rate of SiH4 is about 200 to 350 SCM the flow rate of N20 is about 1, 000 to 4, 000 SCCM, the f low rate of NH, is about 1, 000 to 4,000 SCCM and the flow rate of N2 is about 3,000 to 6,000 SCCM.

7 t q 0 1k.

1 It is preferred that the refractivity of the film be about 1.55 to 1.85 by appropriately controlling the ratio in flow rate of SiH4 to NH3. The stress state of the film is controlled to correspond to a compressive stress state of -0.5 to -1.5 dyne/cm2 by controlling radio frequency power. In this case, deposition pressure of about 2 to 3 Torr, supply power of about 0. 4 to 0. 6 KW having a radio frequency of 13.56 MHz and supply power of about 0.4 to 0.7 KW having a low frequency are used.

As an example of using the film as a barrier, the f ilm may consist of the silicon-rich oxide film 121 and a silicon nitride oxide film (not shown) formed over the silicon-rich oxide film 121. In this case, the deposition of the films is carried out under the same conditions as that in the case wherein the silicon-rich oxide is film 121 and silicon nitride oxide film are selectively used as the barrier.

Thereafter, an SOG film 123 is formed over the silicon-rich oxide film 121 and then baked. The SOG f ilm 123 is used as an interlayer insulating film for providing a planarized surface.

Over the SOG film 123, a second oxide film 125 is then deposited in accordance with the PECVD method. The second oxide film 125 serves as an upper interlayer insulating film.

Then, a second-layer metal wiring 127 is formed on the second oxide film 125. SiNx is then deposited over the second- layer metal wiring 127, thereby forming a surface protection film 129 which will subsequently be thermally processed.

The silicon nitride f ilm as the surface protection f ilm 12 9 is deposited to a thickness of about 500 to 1, 500A. The deposition of the silicon nitride film is carried out under the conditions in which the flow rate of SiH. is about 450 to 550 SCCM, the flow rate of NH3 is about 3,000 to 6,000 SCCM and the flow rate of N2 is about 2,000 to 3,000 SCCM. It is preferred that the refractivity of the 8 film be about 1.95 to 2.1 by appropriately controlling the ratio in f low rate of SiH. to NH3. In this case, deposition pressure of about 2 to 3 Torr, supply power of about 0. 4 to 0. 6 KW having a radio frequency of 13.56 MHz and supply power of about 0.4 to 0.7 KW having a low frequency are used. The stress state of the film is controlled to correspond to a compressive stress state of -0.5 to -1.5 dyne/cm2 by controlling radio frequency power.

Meanwhile, FIG. 3 is a graph depicting the relationship of the refractivity of the insulating film with the insulation -breaking critical voltage between the source n and drain n.

As shown in FIG. 3, the insulating-breaking critical voltage between the source and drain increases as the refractivity is increases. The refractivity of the silicon-rich oxide film according to the present invention is measured to range from 1.55 to 1.65 whereas the first oxide film formed in accordance with the conventional method exhibits a refractivity of about 1.47.

Referring to FIG. 3, it can also be found that the silicon-rich oxide film exhibits stress ranging from -0.5 dyne/cm2 to -1.5 dyne/cm2.

In the case of the silicon nitride oxide film, it exhibits a refractivity ranging from 1.68 to 1.8. The silicon nitride oxide film also exhibits stress ranging from -0.5 dyne/cm2 to -1.5 dyne/cm2.

On the other hand, FIG. 4 is a graph depicting the relationship between the refractivity of the insulating film and the life of hot carriers in each MOSFET.

Referring to FIG. 4, it can be found that the life of hot carriers is lengthened at a higher refractivity.

As is apparent from the above description, the insulating film

9 formation method of the present invention provides various effects. That is, it is possible to avoid a field inversion phenomenon from occurring between the drain and source of the parasitic MOSFET as the under interlayer insulating film consists of a silicon-rich oxide film or silicon nitride oxide film. The method of the present invention can also ensure the reliability of hot carriers, thereby achieving an improvement in the operation characteristic of the semiconductor device. In accordance with the method of the present invention, the barrier characteristic of the interlayer 10 insulating film is improved. Accordingly, the method of the present invention can be effectively applied to the fabrication of highly integrated semiconductor devices.

Although the preferred embodiments of the invention have been is disclosed for illustrative purposes, those skilled in the art will appreciate that various modifications, additions and substitutions are possible, without departing from the scope and spirit of the invention as disclosed in the accompanying claims.

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Claims

CLAIMS: 1..

1. A method for forming an interlayer insulating film of a semiconductor device, comprising the steps of: providing a semiconductor substrate having a under-layer metal wiring formed on an upper surface thereof; forming a barrier layer on an exposed surface of the semiconductor substrate; coating a spin-on-glass film over the barrier layer and then baking the spin-on-glass film; and forming an insulating film over the spin-on-glass film.

is

2. The method in accordance with claim 1, further comprising the step of sequentially forming a plurality of MOS devices and an insulating film before the formation of the under-layer metal wiring.

3. The method in accordance with claim 1, further comprising the step of forming a silicon oxide film over the exposed surface of the semiconductor substrate before the formation of the barrier layer.

4. The method in accordance with claim 1, wherein the barrier layer is comprised of a silicon-rich oxide film.

5. The method in accordance with claim 4, wherein the siliconrich oxide film is deposited in accordance with a plasma enhanced chemical vapor deposition method using a reactive gas consisting of SiH4, N,,O and N2 under the conditions in which the flow rate of SiH4 is about 300 to 600 SCCM, the flow rate of N 2 0 is about 4,000 to 7, 000 SCCM and the f low rate of N2 is about 3, 000 to 6, 000 SCCM.

6. The method in accordance with claim 4, wherein the siliconrich oxide film exhibits a refractivity of about 1.55 to 1.65 and has a compressive stress state of -0.5 to -1.5 dyne/cm2.

11 0 c is

7. The method in accordance with claim 1, wherein the barrier layer is comprised of a silicon nitride oxide film.

8. The method in accordance with claim 7, wherein the silicon nitride oxide film is deposited in accordance with a plasma enhanced chemical vapor deposition method using a reactive gas consisting of SiH., NH3, N.0 and N. under the conditions in which the flow rate of SiH4 is about 200 to 350 SCCM, the flow rate of N.0 is about 1,000 to 4,000 SCCM, the flow rate of NH3 is about 1,000 to 4, 000 SCCM and the f low rate of N2 is about 5, 000 to 8, 000 SCCM.

9. The method in accordance with claim 7, wherein the silicon nitride oxide film exhibits a refractivity of about 1.55 to 1.85 and has a compressive stress state of -0.5 to -1.5 dyne/cm2.

10. The method in accordance with claim 1, wherein the barrier layer has a thickness of about 500 to 3,OOOA.

11. The method in accordance with claim 1, wherein the insulating film is comprised of a silicon oxide film.

12. The method in accordance with claim 1, further comprising the steps of forming an upper-layer metal wiring on the insulating f ilm, and f orming a protective f ilm over the entire exposed surf ace of the resulting structure obtained after the formation of the upper-layer metal wiring.

13. A method for forming an interlayer insulating film of a semiconductor device, comprising the steps of: providing a semiconductor substrate having a under-layer metal wiring formed on an upper surface thereof; forming a silicon-rich oxide film over an exposed surface of the semiconductor substrate, and forming a silicon nitride oxide film over the silicon-rich oxide film; forming a spin-on-glass film over the silicon nitride oxide 12 is 0 f ilm; and forming an oxide film over the spin-on-glass film.

0 00

14. The method in accordance with claim 13, wherein the silicon rich oxide film is deposited in accordance with a plasma enhanced chemical vapor deposition method using a reactive gas consisting of S'H4' N.0 and N2 under the conditions in which the f low rate of SiH.

is about 300 to 600 SCCM, the flow rate of N20 is about 4,000 to 7, 000 SCCM and the f low rate of N, is about 3, 000 to 6, 000 SCCM.

15. The method in accordance with claim 13, wherein the siliconrich oxide film exhibits a refractivity of about 1.55 to 1.65 and has a compressive stress state of -0.5 to -1.5 dyne/cm2.

16. The method in accordance with claim 13, wherein the silicon nitride oxide film is deposited in accordance with a plasma enhanced chemical vapor deposition method using a reactive gas consisting of SiH., NH3, N20 and N2 under the conditions in which the flow rate of SiH4 is about 200 to 350 SCCM, the flow rate of N20 is about 1,000 to 4,000 SCCM, the flow rate of NH3 is about 1,000 to 4, 000 SCCM and the f low rate of N, is about 5, 000 to 8, 000 SCCM.

17. The method in accordance with claim 13, wherein the silicon nitride oxide film exhibits a refractivity of about 1.55 to 1.85 and has a compressive stress state of -0.5 to -1.5 dyne/cm2.

18. The method in accordance with claim 13, further comprising the steps of forming an upper-layer metal wiring on the silicon nitride oxide film, and forming a protective film over the entire exposed surface of the resulting structure obtained after the formation of the upper-layer metal wiring.

19. The method in accordance with claim 13, further comprising the step of sequentially forming a plurality of MOS devices and an insulating film before the formation of the under-layer metal 13 L 0 wiring.

0 c

20. The method in accordance with claim 13, wherein the protective f ilm exhibits a ref ractivity of about 1. 95 to 2. 1 and has a compressive stress state of -0.5 to -1.5 dyne/cm2.

21. A method for forming an interlayer insulating film of a semiconductor device substantially as hereinbefore described with respect to any one of Figures 2 to 4.

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