GB2303033A - An integrated FSK receiver - Google Patents

Abstract

An FSK receiver circuit (1) for receiving an FSK radio signal and for extracting an encoded digital signal from a carrier signal of the FSK radio signal comprises a printed circuit board (2) and an integrated circuit chip (14) mounted on the board (2). The chip (14) comprises the main functions of the receiver, and is operable over a frequency band. Components for selecting the operating frequency of the chip (14) are mounted on the board (2). The chip (14) comprises a radio frequency input amplifier (18) for receiving the FSK radio signal, a first signal generator (19) for generating a signal 500 KHz below the frequency of the FSK radio signal. A signal mixer (22) receives signals from the amplifier (18) and the signal generator (19) which are fed through an intermediate frequency amplifier (24). A signal limiter (31) provides a constant amplitude for the signal, and a demodulator (33) extracts the digitally encoded signal which is passed to an audio frequency amplifier (34) and in turn to a comparator (35) where it is then outputted through an output terminal (13) of the printed circuit board (2). Components (C1, C2, C3 and 20) mounted on the board (2) control the operating frequency of the chip (14). Filters (16, 30) mounted on the board (2) filter the signal.

Description

"A frequency shift keyed signals receiver integrated circuit chip" The present invention relates to a frequency shift keyed signals receiver integrated circuit chip, and in particular, to a frequency shift keyed signals receiver integrated circuit chip for use in telemetry, and in particular, though not limited, to an integrated circuit chip for use in telemetry in the security field, for example, for receiving a digitally encoded transmitted frequency shift keyed radio signal for activating or deactivating a car alarm, a domestic or industrial alarm, security system, security gate and/or barrier or the like. The invention also relates to a frequency shift keyed signals receiver circuit comprising the frequency shift keyed receiver integrated circuit chip.

In general, in the security field, radio transmission of signals is carried out using amplitude shift keyed (ASK) signals at ultra-high frequencies (UHF). There are advantages in the use of frequency shift keyed (FSK) signals in that they are less prone to external interference and noise, and thus, are more reliable.

However, while it is possible to manufacture FSK transmitters and receivers from discrete components at UHF, which typically, are assembled and connected on a printed circuit board, such receivers tend to be relatively expensive, and thus, are not price competitive with comparable ASK transmitters and receivers, which in general, in the security telemetry field can be obtained in integrated circuit chip form.

It is possible by using a combination of a plurality of integrated circuit chips mounted on a printed circuit board to construct FSK transmitters and receivers for use in security telemetry. However, the use of such combinations of integrated circuit chips is uneconomical and unsatisfactory.

There is therefore a need for an FSK receiver integrated circuit chip which operates at UHF, and which overcomes these problems.

The present invention is directed towards providing such an integrated circuit chip, and the invention is also directed towards providing an FSK receiver circuit comprising the FSK receiver integrated circuit chip.

According to the invention there is provided an FSK receiver integrated circuit chip for use in telemetry for receiving an FSK radio signal and for extracting a digitally encoded signal from a carrier signal of the FSK signal, the integrated circuit chip comprising in the same chip the following components:: a radio frequency input amplifier operable within a frequency band width of 150 MHz to 480 MHz for receiving and amplifying the FSK radio signal, a first signal generator operable within a frequency band width of 150 NHz to 480 NHz for generating a signal within the frequency range of 150 MHz to 480 MHz, a signal mixer operable within a frequency band width of 150 MHz to 480 z for receiving respective signals from the radio frequency input amplifier and the first signal generator and for mixing the respective signals, an intermediate frequency amplifier operable within a frequency band width of 100 KHz to 1,500 KHz for receiving and amplifying the mixed signal from the signal mixer, a signal limiter operable within a frequency band width of 100 KHz to 1,500 KHz for receiving an output signal from the intermediate frequency amplifier and for providing a constant amplitude for the signal, an FSK demodulator operable within a frequency band width of 100 KHz to 1,500 KHz for receiving and demodulating an output signal from the signal limiter for extracting the digitally encoded signal from the carrier signal, an audio frequency amplifier for receiving an output signal from the demodulator for amplifying the demodulated signal, a comparator for comparing an output signal from the audio frequency amplifier with a reference signal for outputting the digitally encoded signal of the FSK radio signal, an output means for outputting the digitally encoded signal from the integrated circuit chip, and an input means for receiving and relaying the FSK radio signal to the radio frequency input amplifier, and for inputting control signals for controlling the chip to operate at a desired frequency.

In one aspect of the invention, the input means comprises a first input means for receiving the FSK radio signal after the transmitted signal has been filtered.

In another aspect of the invention the input means comprises a second input means for receiving a control signal from an external first control means for selecting the output frequency of the signal generated by the first signal generator.

In another aspect of the invention the input means comprises a third input means for connecting the chip to an external second control means for selecting the operational frequency of the intermediate frequency amplifier.

In one embodiment of the invention the input means comprises a fourth input means for connecting an external intermediate frequency signal filter in series between the intermediate frequency amplifier and the signal limiter for filtering the signal from the intermediate frequency amplifier.

In another embodiment of the invention the input means comprises a fifth input means for connecting the chip to an external third control means for selecting the operational frequency of the audio frequency amplifier.

In a further embodiment of the invention the input means comprises a sixth input means for connecting the chip to an external impedance means for applying an external reference signal to the comparator.

In another embodiment of the invention a power supply control means is formed in the integrated circuit chip for controlling power supply to the integrated circuit chip. Preferably, the input means comprises a seventh input means for connecting the chip to an external fourth control means for operating the power supply control means.

In one aspect of the invention the input means comprises an eighth input means for connecting the chip to an external power supply means.

In one embodiment of the invention the first signal generator is operated at a frequency of approximately 1 NHz below the carrier frequency of the FSK radio signal, and the intermediate frequency amplifier, the signal limiter and the FSK demodulator are operated at a frequency of approximately 1 MHz.

In another embodiment of the invention the intermediate frequency amplifier is operable within a frequency band width of 100 KHz to 900 KHz.

In another embodiment of the inventor the signal limiter is operable within a frequency band width of 100 KHz to 900 KHz.

In a further embodiment of the invention the FSK demodulator is operable within a frequency band width of 100 KHz to 900 KHz.

In one aspect of the invention the first signal generator is operated by the control signal at a frequency of approximately 500 KHz below the carrier frequency of the FSK radio signal.

In another aspect of the invention the first signal generator is operated at a frequency of approximately 314.5 MHz.

In a further aspect of the invention the intermediate frequency amplifier is operated at a frequency of approximately 500 KHz.

In another embodiment of the invention the fourth input means is adapted for receiving an external intermediate frequency signal filter for filtering out substantially all signals from the intermediate frequency amplifier, other than signals of a frequency of 500 KHz approximately.

Additionally, the invention provides an FSK receiver circuit for use in telemetry for receiving an FSK radio signal and for extracting a digitally encoded signal from a carrier signal of the FSK signal, the FSK receiver circuit comprising the FSK receiver integrated circuit chip according to the invention, and the FSK receiver circuit further comprises a radio frequency filter for receiving and filtering an FSK radio signal, the radio frequency filter being connected to the first input means of the integrated circuit chip, and control means connected to the chip for controlling the chip to operate at a desired frequency.

Preferably, the first control means comprises a surface acoustic resonator of the type commonly referred to as a SAW.

Advantageously, the control means comprises a second control means for selecting the operational frequency of the intermediate amplifier of the chip, the second control means being connected to the third input means of the integrated circuit chip.

In one aspect of the invention an intermediate frequency signal filter is connected to the fourth input means of the integrated circuit chip for connection in series between the intermediate frequency amplifier and the signal limiter.

In one embodiment of the invention the control means comprises a third control means for selecting the operational frequency of the audio frequency amplifier of the chip, the third control means being connected to the fifth input means of the integrated circuit chip.

Ideally, an impedance means for providing the reference signal to the comparator of the chip is connected to the sixth input means of the integrated circuit chip.

Preferably, the impedance means comprises a resistor connected to either ground or a supply voltage of the FSK receiver circuit.

In one embodiment of the invention the control means comprises a fourth control means for operating the power supply control means of the chip, the fourth control means being connected to the seventh input means of the integrated circuit chip. Preferably, the fourth control means comprises a second signal generator for applying alternate high and low signals on the seventh input means for controlling the power supply control means.

In another aspect of the invention a power supply means for supplying power to the integrated circuit chip is connected to the eighth input means of the chip.

In one embodiment of the invention the FSK receiver chip is mounted on a printed circuit board, and the first, second, third and fourth control means are mounted on the printed circuit board, the radio frequency filter and the intermediate frequency signal filter are mounted on the printed circuit board, and the impedance means and the power supply means are mounted on the printed circuit board.

The invention will be more clearly understood from the following description of a preferred embodiment thereof which is given by way of example only, with reference to the accompanying drawings, in which: Fig. 1 is a block representation of an FSK receiver circuit according to the invention, and Fig. 2 is a more detailed block representation of the FSK receiver circuit of Fig. 1.

Referring to the drawings there is illustrated an FSK receiver circuit according to the invention, which is indicated generally by the reference numeral 1 for use in telemetry in the security industry, typically, for receiving a transmitted FSK radio signal for arming and/or disarming a car alarm, and for extracting a digitally encoded binary signal from a carrier signal of frequency of 315 MHz of the FSK radio signal. The extracted digitally encoded binary signal may subsequently be relayed to an analysing circuit (not shown) of a car alarm (also not shown) or other such security circuit. The FSK receiver circuit 1 comprises a printed circuit board 2, and a single FSK receiver integrated circuit chip 14 is mounted on the printed circuit board 2.The FSK receiver chip 14 comprises substantially all of the functions of the FSK receiver circuit 1, and is capable of being operated within a relatively wide frequency band width. Control means for controlling the FSK receiver chip 14 to operate at a desired frequency are mounted on the printed circuit board 2 as will be described below. The FSK receiver chip 14 also comprises input means for receiving control signals from the control means for operating the chip 14 at the desired frequency, and also for inputting the FSK radio signal. An output means on the FSK receiver chip 14 is also provided for outputting the extracted digitally encoded binary signal to the analysing socket (not shown). The control means, input means and output means are described in detail below with reference to Fig 2.However, before describing the FSK receiver circuit 1 in detail with reference to Fig. 2, an overview of the FSK receiver circuit 1 will first be described with reference to Fig. 1.

Referring now to Fig. 1, the FSK receiver circuit 1 comprises a radio frequency input amplifier and a radio frequency filter, both of which are illustrated by the block 3 in Fig. 1. An antenna 4 receives the FSK radio signal which is applied to a input terminal 5 of the FSK receiver circuit 1 and is in turn relayed to the radio frequency input amplifier and filter 3. A first signal generator 6 generates a signal of frequency of approximately 500 KHz less than that of the FSK radio signal, and a mixer 7 mixes the signal from the first signal generator 6 and a signal received from the radio frequency amplifier and filter 3. The mixed signal from the mixer 7 which is at a frequency of approximately 500 KHz is relayed to an intermediate frequency amplifier and filter 8 where it is filtered and amplified and relayed to a signal limiter 9.The signal limiter 9 produces a constant amplitude on the signal which is then relayed to an FSK demodulator 10.

The FSK demodulator 10 extracts the digitally encoded data signal which was carried in the FSK radio signal, and the digitally encoded data signal is relayed to an audio frequency amplifier and filter 11 for amplification and filtering. The amplified signal from the audio frequency amplifier and filter 11 is relayed to an output comparator 12 where the signal is squared off and delivered to an output terminal 13 of the FSK receiver circuit 1 for subsequent delivery to the analysing circuit (not shown) of the car alarm or other such security circuit.

Referring now to Fig. 2, the radio frequency input amplifier and filter of block 3 comprises a radio frequency filter 16 and a radio frequency input amplifier 18. The radio frequency filter 16 is mounted on the printed circuit board 2, and receives the FSK radio signal from the antenna 4 through the input terminal 5 of the printed circuit board 2. The radio frequency filter 16 filters out signals from the FSK radio signal other than those of the carrier frequency of the signal, namely, signals of frequency other than 315 NHz are filtered by the radio frequency filter 16.

The radio frequency input amplifier 18 is formed in the integrated circuit chip 14, and receives the filtered FSK radio signal from the radio frequency filter 16 through the input means, namely, a first input means, provided by an input pin a of the integrated circuit chip 14. The radio frequency input amplifier 18 is operable within a frequency band width of 150 MHz to 450 MHz, and receives the filtered FSK signal from the radio frequency filter at a frequency of 315 MHz.

The first signal generator of block 6 comprises a local oscillator 19 which is formed in the integrated circuit chip 14, and which is operable within a frequency band width of 150 MHz to 480 xhz. Since the FSK radio signal is received at a frequency of 315 MHz, the local oscillator 19 is controlled by the control means to generate a signal of frequency 314.5 MHz, in other words, 500 KHz less than the frequency of the FSK radio signal. The control means for controlling the frequency of operation of the local oscillator 19 comprises a first control means, namely, a surface acoustic resonator of the type generally referred to as a SAW 20 which is mounted on the printed circuit board 2.The SAW 20 is connected through the input means, namely, a second input means, provided by a second input pin f to the local oscillator 19 for controlling the local oscillator 19 to operate at the frequency of 314.5 MHz.

The mixer of block 7 comprises a signal mixer 22 which is formed in the integrated circuit chip 14 for receiving the amplified signal from the radio frequency input amplifier 18 and the signal generated by the local oscillator 19. The signal mixer 22 is capable of operating within a band width of 150 MHz to 480 MHz.

The intermediate frequency amplifier and filter of block 8 comprises an intermediate frequency amplifier 24 and an intermediate frequency filter 30. The intermediate frequency amplifier 24 is formed in the integrated circuit chip 14 and receives an output signal from the signal mixer 22 for amplifying the signal from the mixer 22. The intermediate frequency filter 30 is mounted on the printed circuit board, and is connected to the intermediate frequency amplifier 24 and a signal limiter 31 of the signal limiter of block 9 which is also formed in the integrated circuit chip 14. The intermediate frequency filter 30 is connected in series between the intermediate frequency amplifier 24 and the signal limiter 31 for filtering the signal between the amplifier 24 and the limiter 31 to provide a filtered signal of 500 KHz to the signal limiter 31.

The input means for connecting the filter 30 to the integrated circuit chip 14 comprises a fourth input means, namely, a pair of four input pins h and i of the integrated circuit chip 14. The intermediate frequency amplifier 24 is operable within a frequency band within 100 KHz to 900 KHz, and is controlled by the control means to operate at a frequency of 500 KHz. The control means comprises a second control means, namely, a capacitor C1 which is mounted on the printed circuit board 2. The capacitor C1 is connected to the amplifier 24 through the input means, namely, a third input means provided by a third input pin g of the integrated circuit chip 14. The signal limiter 31 produces a constant amplitude on the filtered signal from the filter 30.

The FSK demodulator of block 10 comprises an FSK demodulator 33 which is formed in the integrated circuit chip 14, and receives and demodulates the signal from the binary signal limiter 31, and extracts the digitally encoded binary signal from the carrier signal of the FSK radio signal. The extracted binary coded digital signal is delivered from the FSK demodulator 33 to the audio frequency amplifier and filter of block 11. The audio frequency amplifier and filter of block 11 comprises an audio frequency amplifier 34 which is formed in the integrated circuit chip 14 and receives the digitally encoded binary signal from the FSK demodulator 33.The control means comprises a third control means for selecting the operational frequency of the audio frequency amplifier 34 for filtering the signal through the audio frequency amplifier 34 for filtering out signals of frequency other than that of the digitally encoded binary signal.

The third control means comprises a pair of capacitors C2 and C3 which are mounted on the printed circuit board 2. The capacitors C2 and C3 select the operational frequency of the audio frequency amplifier 34 through the input means, namely, a fifth input means, provided by a pair of fifth input pins j and k of the integrated circuit chip 14.

The output comparator of block 12 comprises a comparator 35 which is formed in the integrated circuit chip 14. The amplified binary coded digital signal from the audio frequency amplifier 34 is fed to one pin of the comparator 35. An impedance means, namely, a resistor R1 which is mounted on the printed circuit board 2 and connected to ground provides a reference signal for another pin of the comparator 35. The reference signal is fed from the resistor R1 to the pin of the comparator 35 through the input means which comprises a sixth input means, namely, a sixth input pin 1 of the integrated circuit chip 14. The reference signal from the resistor R1 holds the pin of the comparator 35 to which it is connected low.The binary coded digital signal is squared off by the comparator 35, and is delivered to an output means, namely, an output pin b of the integrated circuit chip 14 where it is subsequently relayed to the output terminal 13 of the FSK receiver circuit 1.

A power supply control means, namely, a controller 36 which is formed in the integrated circuit chip 14 controls and limits the power supplied to the integrated circuit chip 14 from an external power supply means, namely, a power supply 37 which is mounted on the printed circuit board 2. Power from the power supply 37 is delivered to the power supply controller 36 through the input means, which comprises an eighth input means, namely, an eighth input pin c of the integrated circuit chip 14. A fourth control means of the control means comprises a second signal generator 38 for alternately applying high and low signals to the power supply controller 36 for controlling and limiting the power through the controller 36 to the integrated circuit chip 14. The second signal generator is mounted on the printed circuit board 2 and supplies the alternate high and low signals to the controller 36 through the input means which comprises a seventh input means, namely a seventh input pin e of the integrated circuit chip 14. The second signal generator 38 is powered by the power supply 37. A ninth input means, namely, a ninth input pin d of the integrated circuit chip 14 earths the integrated circuit chip 14 to the earth of the printed circuit board 2.

In use, the FSK radio signal is received by the aerial 4 and is inputted to the input terminal 5 of the printed circuit board 2. The signal is filtered through the radio frequency filter 16 and delivered to the radio frequency input amplifier 18. The amplified signal from the radio frequency input amplifier 18 is then mixed in the signal mixer 22 with the signal generated by the local oscillator 19, and the resultant signal is delivered to the intermediate frequency amplifier 24 where it is amplified and in turn delivered through the intermediate frequency filter 30 where signals of frequency other than 500 KHz are filtered therefrom.The filtered signal is then delivered to the signal limiter 31 where a constant amplitude is produced, and in turn, the signal is delivered to the FSK demodulator 33 where the digitally coded binary signal is extracted from the carrier signal of the FSK radio signal. The extracted digitally coded binary signal is amplified in the audio frequency amplifier 34 and squared off in the comparator 35. The digitally coded binary signal is then delivered through the output pin b from the integrated circuit chip 14 to the output terminal 13 of the printed circuit board 2 for delivery to analysing circuitry (not shown) of the car alarm (also not shown).

The advantage of the invention is that by virtue of the fact that virtually all the functions of the receiver are provided in the chip, and the chip is operable over a range of frequencies, and by virtue of the fact that the components for controlling the operational frequency of the chip and other frequency dependent components are mounted on the printed circuit board, a relatively simple and inexpensive receiver is provided.

Since the chip is capable of operating over a range of frequencies, receiver circuits operating at different frequencies within the operating frequency range of the chip can be provided relatively simply and easily by merely selecting appropriate components for mounting on the board. Thus, in general, by altering the value of the filters and the control components, which are mounted on the board, a circuit of any desired operating frequency can be provided. Thus, the same FSK signal receiver integrated circuit chip be used in a number of circuits capable of operating at different frequencies.

It will be appreciated that while the components in the integrated circuit chip have been described in block representation, these components will be implemented by appropriate components formed in silicon of the chip, for example, they will be implemented by resistors, capacitors, mosfets and other relevant components.

Likewise, while the radio frequency filter and the intermediate frequency filter on the printed circuit boards have been described in block representation, they will be implemented on the printed circuit board by components which will be connected to the printed circuit board. While not illustrated, the power supply from the power supply controller will be provided to the components on the integrated circuit chip as will the earth which is connected through the ninth input pin d.

While the FSK receiver circuit has been described for receiving an FSK radio signal of frequency 315 MHz, it will be appreciated that by altering the relevant components on the printed circuit board which are external to the integrated circuit chip the frequency of the signal which the integrated circuit chip is capable of handling can be varied. For example, it is envisaged that the FSK receiver circuit may be arranged to receive signals of frequency 433.92 MHz.

Additionally, if desired, the frequency of the first signal generated by the signal generator may also be varied by changing the SAW, for example, in certain cases it is envisaged that the first signal generator may be operated at a frequency of 1 XHz below the carrier frequency of the FSK radio signal. In which case, the operational frequencies of the intermediate frequency amplifier, the signal limiter and the FSK demodulator would be such as to be capable of operating at a frequency of 1 MHz. Typically, it is envisaged that the intermediate frequency amplifier, the signal limiter and the FSK demodulator would be operable within a frequency band width of 100 KHz to 1,500 KHz, and the components on the printed circuit board would be selected for operating the relevant functions on the integrated circuit chip at the appropriate frequencies.

Claims (32)

1. An FSK receiver integrated circuit chip for use in telemetry for receiving an FSK radio signal and for extracting a digitally encoded signal from a carrier signal of the FSK signal, the integrated circuit chip comprising in the same chip the following components: a radio frequency input amplifier operable within a frequency band width of 150 NHz to 480 NHz for receiving and amplifying the FSK radio signal, a first signal generator operable within a frequency band width of 150 XHz to 480 xHz for generating a signal within the frequency range of 150 NHz to 480 MHz, a signal mixer operable within a frequency band width of 150 MHz to 480 xHz for receiving respective signals from the radio frequency input amplifier and the first signal generator and for mixing the respective signals, an intermediate frequency amplifier operable within a frequency band width of 100 KHz to 1,500 KHz for receiving and amplifying the mixed signal from the signal mixer, a signal limiter operable within a frequency band width of 100 KHz to 1,500 KH2 for receiving an output signal from the intermediate frequency amplifier and for providing a constant amplitude for the signal, an FSK demodulator operable within a frequency band width of 100 KHz to 1,500 KHz for receiving and demodulating an output signal from the signal limiter for extracting the digitally encoded signal from the carrier signal, an audio frequency amplifier for receiving an output signal from the demodulator for amplifying the demodulated signal, a comparator for comparing an output signal from the audio frequency amplifier with a reference signal for outputting the digitally encoded signal of the FSK radio signal, an output means for outputting the digitally encoded signal from the integrated circuit chip, and an input means for receiving and relaying the FSK radio signal to the radio frequency input amplifier, and for inputting control signals for controlling the chip to operate at a desired frequency.

2. An FSK receiver chip as claimed in Claim 1 in which the input means comprises a first input means for receiving the FSK radio signal after the transmitted signal has been filtered.

3. An FSK receiver chip as claimed in Claim 1 or 2 in which the input means comprises a second input means for receiving a control signal from an external first control means for selecting the output frequency of the signal generated by the first signal generator.

4. An FSK receiver chip as claimed in any preceding claim in which the input means comprises a third input means for connecting the chip to an external second control means for selecting the operational frequency of the intermediate frequency amplifier.

5. An FSK receiver chip as claimed in any preceding claim in which the input means comprises a fourth input means for connecting an external intermediate frequency signal filter in series between the intermediate frequency amplifier and the signal limiter for filtering the signal from the intermediate frequency amplifier.

6. An FSK receiver chip as claimed in any preceding claim in which the input means comprises a fifth input means for connecting the chip to an external third control means for selecting the operational frequency of the audio frequency amplifier.

7. An FSK receiver chip as claimed in any preceding claim in which the input means comprises a sixth input means for connecting the chip to an external impedance means for applying an external reference signal to the comparator.

8. An FSK receiver chip as claimed in any preceding claim in which a power supply control means is formed in the integrated circuit chip for controlling power supply to the integrated circuit chip.

9. An FSK receiver chip as claimed in Claim 8 in which the input means comprises a seventh input means for connecting the chip to an external fourth control means for operating the power supply control means.

10. An FSK receiver chip as claimed in any preceding claim in which the input means comprises an eighth input means for connecting the chip to an external power supply means.

11. An FSK receiver chip as claimed in any preceding claim in which the first signal generator is operated at a frequency of approximately 1 NHz below the carrier frequency of the FSK radio signal, and the intermediate frequency amplifier, the signal limiter and the FSK demodulator are operated at a frequency of approximately 1 MHz.

12. An FSK receiver chip as claimed in any of Claims 1 to 10 in which the intermediate frequency amplifier is operable within a frequency band width of 100 KHz to 900 KHz.

13. An FSK receiver chip as claimed in Claim 12 in which the signal limiter is operable within a frequency band width of 100 KHz to 900 KHz.

14. An FSK receiver chip as claimed in Claim 13 in which the FSK demodulator is operable within a frequency band width of 100 KHz to 900 KHz.

15. An FSK receiver chip as claimed in any of Claims 12 to 14 in which the first signal generator is operated at a frequency of approximately 500 KHz below the carrier frequency of the FSK radio signal.

16. An FSK receiver chip as claimed in Claim 15 in which the first signal generator is operated at a frequency of approximately 314.5 MHz.

17. An FSK receiver chip as claimed in Claim 15 or 16 in which the intermediate frequency amplifier is operated at a frequency of approximately 500 KHz.

18. An FSK receiver chip as claimed in any of Claims 15 to 17 when dependent on Claim 5 in which the fourth input means is adapted for receiving an external intermediate frequency signal filter for filtering out substantially all signals from the intermediate frequency amplifier, other than signals of a frequency of 500 KHz approximately.

19. An FSK receiver integrated circuit chip substantially as described herein with reference to and is illustrated in the accompanying drawings.

20. An FSK receiver circuit for use in telemetry for receiving an FSK radio signal and for extracting a digitally encoded signal from a carrier signal of the FSK signal, the FSK receiver circuit comprising the FSK receiver integrated circuit chip as claimed in any preceding claim, and the FSK receiver circuit further comprises a radio frequency filter for receiving and filtering an FSK radio signal, the radio frequency filter being connected to the first input means of the integrated circuit chip, and control means connected to the chip for controlling the chip to operate at a desired frequency.

21. An FSK receiver circuit as claimed in Claim 20 in which the control means comprises a first control means for controlling the frequency of the signal generated by the first signal generator of the chip, the first control means being connected to the second input means of the integrated circuit chip.

22. An FSK receiver circuit as claimed in Claim 21 in which the first control means comprises a surface acoustic resonator of the type commonly referred to as a SAW.

23. An FSK receiver circuit as claimed in any of Claims 20 to 22 in which the control means comprises a second control means for selecting the operational frequency of the intermediate amplifier of the chip, the second control means being connected to the third input means of the integrated circuit chip.

24. An FSK receiver circuit as claimed in any of Claims 20 to 23 in which an intermediate frequency signal filter is connected to the fourth input means of the integrated circuit chip for connection in series between the intermediate frequency amplifier and the signal limiter.

25. An FSK receiver circuit as claimed in any of Claims 20 to 24 in which the control means comprises a third control means for selecting the operational frequency of the audio frequency amplifier of the chip, the third control means being connected to the fifth input means of the integrated circuit chip.

26. An FSK receiver circuit as claimed in any of Claims 20 to 25 in which an impedance means for providing the reference signal to the comparator of the chip is connected to the sixth input means of the integrated circuit chip.

27. An FSK receiver circuit as claimed in Claim 26 in which the impedance means comprises a resistor connected to either ground or a supply voltage of the FSK receiver circuit.

28. An FSK receiver circuit as claimed in any of Claims 20 to 27 in which the control means comprises a fourth control means for operating the power supply control means of the chip, the fourth control means being connected to the seventh input means of the integrated circuit chip.

29. An FSK receiver circuit as claimed in Claim 28 in which the fourth control means comprises a second signal generator for applying alternate high and low signals on the seventh input means for controlling the power supply control means.

30. An FSK receiver circuit as claimed in any of Claims 20 to 29 in which a power supply means for supplying power to the integrated circuit chip is connected to the eighth input means of the chip.

31. An FSK receiver circuit as claimed in any of Claims 20 to 30 in which the FSK receiver chip is mounted on a printed circuit board, and the first, second, third and fourth control means are mounted on the printed circuit board, the radio frequency filter and the intermediate frequency signal filter are mounted on the printed circuit board, and the impedance means and the power supply means are mounted on the printed circuit board.

32. An FSK receiver circuit substantially as described herein with reference to and as illustrated in the accompanying drawings.