[go: up one dir, main page]

GB2301985A - Controlling the flow of ATM cells in an ATM network - Google Patents

Controlling the flow of ATM cells in an ATM network Download PDF

Info

Publication number
GB2301985A
GB2301985A GB9611706A GB9611706A GB2301985A GB 2301985 A GB2301985 A GB 2301985A GB 9611706 A GB9611706 A GB 9611706A GB 9611706 A GB9611706 A GB 9611706A GB 2301985 A GB2301985 A GB 2301985A
Authority
GB
United Kingdom
Prior art keywords
value
cells
buffer
abr
switch
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
GB9611706A
Other versions
GB9611706D0 (en
GB2301985B (en
Inventor
Trevor Jones
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
GEN DATACOMM ADV RES
Original Assignee
GEN DATACOMM ADV RES
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by GEN DATACOMM ADV RES filed Critical GEN DATACOMM ADV RES
Publication of GB9611706D0 publication Critical patent/GB9611706D0/en
Publication of GB2301985A publication Critical patent/GB2301985A/en
Application granted granted Critical
Publication of GB2301985B publication Critical patent/GB2301985B/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00—Packet switching elements
    • H04L49/50—Overload detection or protection within a single switching element
    • H04L49/505—Corrective measures
    • H04L49/506—Backpressure
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00—Data switching networks
    • H04L12/54—Store-and-forward switching systems 
    • H04L12/56—Packet switching systems
    • H04L12/5601—Transfer mode dependent, e.g. ATM
    • H04L12/5602—Bandwidth control in ATM Networks, e.g. leaky bucket
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00—Packet switching elements
    • H04L49/30—Peripheral units, e.g. input or output ports
    • H04L49/3081—ATM peripheral units, e.g. policing, insertion or extraction
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00—Packet switching elements
    • H04L49/50—Overload detection or protection within a single switching element
    • H04L49/501—Overload detection
    • H04L49/503—Policing
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00—Data switching networks
    • H04L12/54—Store-and-forward switching systems 
    • H04L12/56—Packet switching systems
    • H04L12/5601—Transfer mode dependent, e.g. ATM
    • H04L2012/5614—User Network Interface
    • H04L2012/5616—Terminal equipment, e.g. codecs, synch.
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00—Data switching networks
    • H04L12/54—Store-and-forward switching systems 
    • H04L12/56—Packet switching systems
    • H04L12/5601—Transfer mode dependent, e.g. ATM
    • H04L2012/5629—Admission control
    • H04L2012/5631—Resource management and allocation
    • H04L2012/5632—Bandwidth allocation
    • H04L2012/5635—Backpressure, e.g. for ABR
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00—Data switching networks
    • H04L12/54—Store-and-forward switching systems 
    • H04L12/56—Packet switching systems
    • H04L12/5601—Transfer mode dependent, e.g. ATM
    • H04L2012/5629—Admission control
    • H04L2012/5631—Resource management and allocation
    • H04L2012/5636—Monitoring or policing, e.g. compliance with allocated rate, corrective actions
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00—Data switching networks
    • H04L12/54—Store-and-forward switching systems 
    • H04L12/56—Packet switching systems
    • H04L12/5601—Transfer mode dependent, e.g. ATM
    • H04L2012/5638—Services, e.g. multimedia, GOS, QOS
    • H04L2012/5646—Cell characteristics, e.g. loss, delay, jitter, sequence integrity
    • H04L2012/5652—Cell construction, e.g. including header, packetisation, depacketisation, assembly, reassembly
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00—Data switching networks
    • H04L12/54—Store-and-forward switching systems 
    • H04L12/56—Packet switching systems
    • H04L12/5601—Transfer mode dependent, e.g. ATM
    • H04L2012/5678—Traffic aspects, e.g. arbitration, load balancing, smoothing, buffer management
    • H04L2012/5681—Buffer or queue management
    • H04L2012/5682—Threshold; Watermark
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00—Packet switching elements
    • H04L49/20—Support for services
    • H04L49/205—Quality of Service based
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00—Packet switching elements
    • H04L49/30—Peripheral units, e.g. input or output ports

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Data Exchanges In Wide-Area Networks (AREA)

Abstract

The flow of ATM cells in an ATM network is controlled by signalling to the source to reduce the transmission rate when congestion occurs in a switch in the network. The signalling is carried out by way of insertion into Resource Management Rm cells of a new Explicit Rate (ER) value for the connection. The ER value is obtained as a function of an ABR Output Bandwidth value (AOB). The AOB value is the number of ABR cells output from the buffer within a predetermined time interval. In a simple mode of operation, the new ER value is written to the cell for forward transmission, the changed ER then being signalled back to the source from the destination. In a more complex mode of operation, the cell is passed onwards or forwards with the old ER value unchanged, with a test establishing the lowest value of ER to be written in a DPRAM. In the receiver the ER value stored is written into the next cell only if it is lower than the existing value in the cell. If there is no congestion, the maximum value of ER is put into the DPRAM so that the backward ER in the backward cells is not changed.

Description

CONTROLLING THE FLOW OF ATM CELlS IN AN ATM NETWORK Field of the Invention This invention relates to a method of controlling the flow of ATM cells in an ATM network, and to an ATM network switch in which the method is carried out.
Background to the Invention The ABR (Available Bit Rate) service in Asynchronous Transfer Mode (ATM) networks is intended to make the best use of remaining capacity after higher priority services such as CBR (Constant Bit Rate) and VBR (Variable Bit Rate) have been provided for. To achieve this, special ATM cells known as Resource Management or Rm cells are sent from the source, through the destination and back to the source to provide information on the congestion level in the switches in the path. This is used by the source to modify its transmission rate, the objective being to utilise link capacity fully while not losing any cells as a result of congestion.An Explicit Rate (ER) parameter is set in the Rm cells passing through the switch in the forwards and backwards directions, the ER being reduced as congestion occurs down to the Minimum Cell Rate (MCR) value to reduce the rate at which the source sends.
In addition, the Message Type field in the Rm cell includes Congestion Indication (CI) and No Increase (NI) bits which may be set respectively to signal to the source that a predetermined decrease in the transmission rate should be effected and that the source should not automatically increase the send rate - it is normally arranged to keep pushing the send rate up again after the ER has signalled a reduction, in order to ensure that the rate is not permanently depressed. The switch may generate a backwards Rm cell (known as BECN) to the source to indicate congestion, the rate of these being limited to 10 per second per connection.
The Explicit Rate or ER parameter thus dictates the maximum rate at which the source is allowed to send in cells per second. MCR dictates the minimum rate at which a source may always send. ER must therefore not be set less than MCR.
Summary of the Invention The present invention provides a method of controlling the flow of ATM cells in an ATM network, comprising signalling to the source of cells on a connection to reduce the transmission rate when congestion occurs in a switch in the network, the signalling being carried out by way of insertion into Resource Management Rm cells of a new Explicit Rate (ER) value for the connection, wherein the ER value is obtained at a given point in the network for each cell arriving at said point, said point including a buffer for the cells, by: counting the number of ABR cells output from the buffer within a predetermined time interval to give an ABR Output Bandwidth value (AOB);and calculating an ER value as a function of AOB.
Preferably, the method comprises: determining the Number Enact of ABR VCs with more than a predetermined number of cells stored in the buffer; determining the number of cells VcCnt on the connection stored in the buffer; determining the total number of cells TSC currently stored in the buffer and the remaining capacity BS of the buffer; and calculating the ER value as a function of AOB, Tact, VcCnt, TSC and BS.
More preferably, the ER value is calculated from the following formula:
ER = AOB x #1 - VcCnt# x #1 - TSC #, Nact MAX BS+Ker wherein MAX is a predetermined function reflecting the delay from the source of ABR cells in the network to the said point, and Ker is a predetermined offset value which determines the occupancy of the buffer for the VC on which the cell is being transmitted.
Preferably, Nact is a value which is incremented when a cell is written into the buffer on a VC having a VcCnt of less than 16, and the formula is:
ER = 16xAOB x #1 - VcCnt# x #1 - TSC Nact MAX BS+Ker Preferably, the method includes multiplying the number of ABR cells output during the predetermined period by a predetermined constant to give the AOB value.
The invention further provides an ATM network switch comprising a buffer means for buffering the flow of ATM cells and means for calculating the Explicit Rate (ER) value for a connection thereon, the calculating means comprising: means for counting the number of ABR cells output from the buffer within a predetermined time interval to give an ABR Output Bandwidth value (AOB); and means for calculating an ER value as a function of AOB.
Preferably the switch comprises: means for determining the Number N act of ABR VCs with more than a predetermined number of cells stored in the buffer; means for determining the number of cells VcCnt stored in the buffer for the cell's VC; means for determining the total number of cells TSC currently stored in the buffer and the remaining capacity BS of the buffer; and wherein the calculating means is arranged to calculate the ER value as a function of AOB, Nact, VcCnt, TSC and BS.
More preferably, the switch comprises means for storing for each VC established through the switch an offset value Ker which determines the maximum occupancy of the buffer for the connection and a value MAX which is a predetermined function reflecting the delay from the source of ABR cells in the network to the switch, and the calculating means is arranged to calculate the ER value according to the following formula::
ER = A x (1 ~ Vt4rt) X (1 TSC Another aspect of the invention provides an ATM network switch comprising transmitting means and receiving means associated with an external data link to the switch, and memory means connected to the transmitting means and to the receiving means, and wherein the transmitting means is arranged to write to the memory means congestion data contained in Resource Management (Rm) cells being transmitted by the transmitting means and the receiving means is arranged to read the said data from the memory means and to modify in accordance with the said data congestion data contained in reverse Rm cells arriving at the receiving means from the external data link.
The congestion data preferably comprises the ER, NI and CI fields in the Rm cell, and may be modified in the reverse Rm cells so as to OR the NI and CI fields with the values from the memory means and to set the reverse Rm ER value as the MCR or the lowest of the new and old ER values if this is greater than the MCR value.
Brief Description of the Drawings In the drawings, which illustrate an exemplary embodiment of the invention: Figure 1 is a diagrammatic representation of the ER calculating means in an ATM network switch; Figure 2 is a diagrammatic representation of further comparison means; and Figure 3 is a diagrammatic representation of the ATM switch.
Detailed Description of the Illustrated Embodiment Referring to Figure 1, the formula is first translated in to the form: ER = 4xAOBxABRATEx(MAX-VcCnt)x(BS+Ker-TSC), where ABRATE is a NactxMAXx(BS+Ker) factor which converts AOB, the number of cells in a predetermined arbitrary period, into a uniform rate of cells per unit time. this is because divisions are difficult to implement in hardware, and this form requires only one division operation, with the numerator and denominator being calculated separately before the division is performed. (In the formula shown above, a factor of 4 is used because N act is divided by four in the implementation described to reduce the size of the numbers to be accommodated in an 18x18 multiplier.) Multiplexers 11 and 12 (Fig la) pass the successive inputs to the adder/subtracter 13. First the Buffer Space BS and the offset Ker are added together and the result stored in a first register 14. The Total of Stored Cells TSC is then supplied to the adder/subtracter 13 via multiplexer 12 and the BS+K result is read out of register 14 and returned to the adder/subtracter 13 via multiplexer 11, a subtraction operation yielding BS+K-TSC, which is stored in register 15. Finally, the value MAX is supplied to the adder/subtracter 13 via multiplexer 11 and the VcCnt value is supplied via multiplexer 12, and another subtraction operation is performed to yield MAX-VcCnt, which is stored in register 16. If the result of either subtraction is negative, a flag is stored in register 17, the flag signalling that ER is to be set to zero.
Referring back to the translated formula shown above, the multiplication operations are carried out in the second part of the mechanism, illustrated in Figure lb. The results of the addition and subtractions are supplied to the multiplier 18 via multiplexers 19 and 20 via holding registers 21 and 22. Since the products of the various numerator and denominator parameters lead potentially to 68 bit values, the calculation is simplified by treating the numbers as powers of two, with an 18 bit mantissa and 7 bit exponent. The splitter 25 receives the 36-bit numbers from the multiplier and converts the numbers to 18/7 format by leftiustifying all results, using the full 18 bits for the number, even if a negative exponent results, to ensure a constant resolution.After each multiplication, the resulting mantissa is passed back to the relevant one of the multiplexers 19 and 20 until the full calculation is complete, when the result is stored in registers 23a and 23b for the mantissas. The exponents are accumulated in accumulators 24a and 24b, these being reset to zero at the beginning of each calculation cycle. The mantissas are then passed to divider 27 while the exponents pass to subtracter 26. Converter 28 outputs the results of these calculations as a 9 bit mantissa with a 5 bit exponent, which matches the format of the cell rates in the Rm cell.
Figure 2 shows the next stage in which the newly-calculated ER is compared in turn with the old ER value and the MCR value from the Rm cell, the comparator 29 performing the following: if NewER < MCR set ERout = MCR else, if NewER < OldER set ERout = NewER else set ERout = OldER.
Figure 2 represents the situation at the receive side of the switch.
In the case of the transmit side of the switch, the comparison is carried out additionally with the ER value calculated at the receive side. The ER value is transmitted from the receiver to the transmitter across the switch fabric by writing it to the MCR field in the cell. At the transmitter, the ER value is read out again, and replaced by the MCR value which is stored in the routing table in the switch when the VC is set up.
Figure 3 illustrates in simplified form an ATM switch having a receiver 30 receiving cells on a connection from its source, a switch fabric 31, and a transmitter 32 passing the cells on to the next stage of the connection. A second receiver 33 receives Rm cells being returned to the source from the destination, a second transmitter 34 passing the cells on to the next stage back towards the source. A dual-ported RAM 35 is connected to the transmitter 32 and to the second receiver 33. It will be appreciated that connections may be configured with a source at each end so that forward and backward Rm cells will flow through each link to the switch.
When a forward data cell is received by the receiver 30, the state of congestion is assessed in the manner described in our co-pending application No 9611705.6 (Our Case P33211). If the EFCI Threshold has been reached, then: - for EFCI switch behaviour, the EFCI bit is set in all user data cells, and when a Rm cell arrives, the CI or NI bits are used according to programmable options (per connection); - for ER switch behaviour, action is only taken for Rm cells (no EFCI bits are set). The new ER is calculated and placed in the cell (if less than the existing ER and more than MCR), and CI or NI bits are optionally set.
If the receiver 30 is congested, then an internal code is set in the ATM cell for the transmitter 32 to act on.
The transmitter 32 performs the same behaviour as the receiver 30, but also with the option of writing ER, CI and NI data to the dual-ported RAM 35.
The switch can function with two alternative modes: simple, in which the new ER value is written to the cell for forward transmission, the changed ER then being signalled back to the source from the destination; or more complex, in which the cell is passed onwards or forwards with the old ER value unchanged, the test establishing the lowest value of ER to be written to the DPRAM 35. In the receiver 33 the ER value stored is written in to the next cell only if it is lower than the existing value in the cell.
If there is no congestion, the maximum possible value of ER is put into the DPRAM so that the backward ER in the backward cells is not changed.

Claims (14)

1. A method of controlling the flow of ATM cells in an ATM network, comprising signalling to the source of cells on a connection to reduce the transmission rate when congestion occurs in a switch in the network, the signalling being carried out by way of insertion into Resource Management Rm cells of a new Explicit Rate (ER) value for the connection, wherein the ER value is obtained at a given point in the network for each cell arriving at said point, said point including a buffer for the cells, by: counting the number of ABR cells output from the buffer within a predetermined time interval to give an ABR Output Bandwidth value (AOB); and calculating an ER value as a function of AOB.
2. A method according to Claim 1, comprising: determining the Number N act of ABR VCs with more than a predetermined number of cells stored in the buffer; determining the number of cells VcCnt on the connection stored in the buffer; determining the total number of cells TSC currently stored in the buffer and the remaining capacity BS of the buffer; and calculating the ER value as a function of AOB, Nact, VcCnt, TSC and BS.
3. A method according to Claim 2, wherein the ER value is calculated from the following formula:
ER=A7OtxtV) (1IRS+Ke wherein MAX is a predetermined function reflecting the delay from the source of ABR cells in the network to the said point, and Ker is a predetermined offset value which determines the occupancy of the buffer for the VC on which the cell is being transmitted.
4. A method according to Claim 3, wherein Nact is a value which is incremented when a cell is written into the buffer on a VC having a VcCnt of less than 16, and the formula is:
ER = 16xAOB x #1 - VcCnt# x #1 - TSC #. Nact MAX BS+Ker
5. A method according to any preceding claim, comprising multiplying the number of ABR cells output during the predetermined period by a predetermined constant to give the AOB value.
6. A method of controlling the flow of ATM cells in an ATM network, substantially as described with reference to the drawings.
7. An ATM network switch comprising a buffer means for buffering the flow of ATM cells and means for calculating the Explicit Rate (ER) value for a connection thereon, the calculating means comprising: means for counting the number of ABR cells output from the buffer within a predetermined time interval to give an ABR Output Bandwidth value (AOB); and means for calculating an ER value as a function of AOB.
8. A switch according to Claim 7, comprising means for determining the Number N act of ABR VCs with more than a predetermined number of cells stored in the buffer; means for determining the number of cells VcCnt stored in the buffer for the cell's VC; and means for determining the total number of cells TSC currently stored in the buffer and the remaining capacity BS of the buffer; and wherein the calculating means is arranged to calculate the ER value as a function of AOB, Tact, VcCnt, TSC and BS.
9. A switch according to Claim 8, comprising means for storing for each VC established through the switch an offset value Ker which determines the maximum occupancy of the buffer for the connection and a value MAX which is a predetermined function reflecting the delay from the source of ABR cells in the network to the switch, and wherein the calculating means is arranged to calculate the ER value according to the following formula:
ER = AOB x #1 - VcCnt# x #1 - TSC #. Nacr MAX BS+Ker
10.A switch according to Claim 9, wherein Nact is a value which is incremented when a cell is written into the buffer on a VC having a VcCnt of less than 16, and the formula is:
ER lAos X (1 ~ V x ) X BsTS+)
11. A switch according to any of Claims 7 to 10, wherein the calculating means comprises means for multiplying the number of ABR cells output during the predetermined period by a predetermined constant to give the AOB value.
12. An ATM network switch, substantially as described with reference to the drawings.
13. An ATM network switch comprising transmitting means and receiving means associated with an external data link to the switch, and memory means connected to the transmitting means and to the receiving means, and wherein the transmitting means is arranged to write to the memory means congestion data contained in Resource Management (Rm) cells being transmitted by the transmitting means and the receiving means is arranged to read the said data from the memory means and to modify in accordance with the said data congestion data contained in reverse Rm cells arriving at the receiving means from the external data link.
14. A switch according to Claim 13, wherein the memory means comprises a dual-ported Random Access Memory.
GB9611706A 1995-06-05 1996-06-05 Controlling the flow of ATM cells in an ATM network Expired - Lifetime GB2301985B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GBGB9511319.7A GB9511319D0 (en) 1995-06-05 1995-06-05 Controlling the flow of ATM cells in an ATM network

Publications (3)

Publication Number Publication Date
GB9611706D0 GB9611706D0 (en) 1996-08-07
GB2301985A true GB2301985A (en) 1996-12-18
GB2301985B GB2301985B (en) 2000-02-09

Family

ID=10775513

Family Applications (2)

Application Number Title Priority Date Filing Date
GBGB9511319.7A Pending GB9511319D0 (en) 1995-06-05 1995-06-05 Controlling the flow of ATM cells in an ATM network
GB9611706A Expired - Lifetime GB2301985B (en) 1995-06-05 1996-06-05 Controlling the flow of ATM cells in an ATM network

Family Applications Before (1)

Application Number Title Priority Date Filing Date
GBGB9511319.7A Pending GB9511319D0 (en) 1995-06-05 1995-06-05 Controlling the flow of ATM cells in an ATM network

Country Status (4)

Country Link
EP (1) EP0878068A4 (en)
CA (1) CA2222413A1 (en)
GB (2) GB9511319D0 (en)
WO (1) WO1996039759A1 (en)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2307139A (en) * 1995-10-10 1997-05-14 Mitel Corp ATM network clock
EP0866630A1 (en) * 1997-02-14 1998-09-23 Nec Corporation ATM network with a filtering table for securing communication
WO1999003234A1 (en) * 1997-07-11 1999-01-21 Telefonaktiebolaget Lm Ericsson (Publ) Abr server
EP0909106A2 (en) * 1997-10-10 1999-04-14 Mitsubishi Denki Kabushiki Kaisha Implementation schemes for a queue length based ABR flow control system
GB2341292A (en) * 1998-03-24 2000-03-08 Northern Telecom Ltd Apparatus and method for optimizing max-min fair rate control in Available Bit Rate (ABR) sessions
US6597662B1 (en) 1998-03-24 2003-07-22 Nortel Networks Limited Apparatus and method for optimizing max-min fair rate control in ABR sessions

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6118764A (en) * 1997-12-30 2000-09-12 Nortel Networks Corporation Congestion indication/no increase (CI/NI) ABR flow control for ATM switches
US6115359A (en) * 1997-12-30 2000-09-05 Nortel Networks Corporation Elastic bandwidth explicit rate (ER) ABR flow control for ATM switches
US6404767B1 (en) 1998-06-17 2002-06-11 Nortel Networks Corporation Architecture for ABR processing within an ATM switch
US6359884B1 (en) 1998-06-26 2002-03-19 Nortel Networks Limited Modular scalable packet scheduler with rate based shaping and virtual port scheduler
US6438132B1 (en) 1998-10-14 2002-08-20 Nortel Networks Limited Virtual port scheduler

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0487235A2 (en) * 1990-11-21 1992-05-27 AT&T Corp. Bandwidth and congestion management in accessing broadband ISDN networks
GB2281005A (en) * 1993-06-21 1995-02-15 Plessey Telecomm Network management to avoid congestion
WO1995017788A1 (en) * 1993-12-23 1995-06-29 Newbridge Networks Corporation Data link interface for packet-switched network
EP0661851A2 (en) * 1993-12-22 1995-07-05 Nec Corporation Congestion control method in ATM network

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5179556A (en) * 1991-08-02 1993-01-12 Washington University Bandwidth management and congestion control scheme for multicast ATM networks
US5313454A (en) * 1992-04-01 1994-05-17 Stratacom, Inc. Congestion control for cell networks
EP0648035A4 (en) * 1992-11-16 1999-09-22 Fujitsu Ltd REGULATION OF CALL RECEPTION IN A NETWORK WITH ASYNCHRONOUS TRANSMISSION MODE.
KR100293920B1 (en) * 1993-06-12 2001-09-17 윤종용 Apparatus and method for controlling traffic of atm user network interface
US5457687A (en) * 1993-09-02 1995-10-10 Network Equipment Technologies, Inc. Method and apparatus for backward explicit congestion notification (BECN) in an ATM network
US5515359A (en) * 1994-08-26 1996-05-07 Mitsubishi Electric Research Laboratories, Inc. Credit enhanced proportional rate control system
ZA959722B (en) * 1994-12-19 1996-05-31 Alcatel Nv Traffic management and congestion control for packet-based networks

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0487235A2 (en) * 1990-11-21 1992-05-27 AT&T Corp. Bandwidth and congestion management in accessing broadband ISDN networks
GB2281005A (en) * 1993-06-21 1995-02-15 Plessey Telecomm Network management to avoid congestion
EP0661851A2 (en) * 1993-12-22 1995-07-05 Nec Corporation Congestion control method in ATM network
WO1995017788A1 (en) * 1993-12-23 1995-06-29 Newbridge Networks Corporation Data link interface for packet-switched network

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2307139A (en) * 1995-10-10 1997-05-14 Mitel Corp ATM network clock
EP0866630A1 (en) * 1997-02-14 1998-09-23 Nec Corporation ATM network with a filtering table for securing communication
US6172991B1 (en) 1997-02-14 2001-01-09 Nec Corporation ATM Network with a filtering table for securing communication
WO1999003234A1 (en) * 1997-07-11 1999-01-21 Telefonaktiebolaget Lm Ericsson (Publ) Abr server
US6088359A (en) * 1997-07-11 2000-07-11 Telefonaktiebolaget Lm Ericsson ABR server
EP0909106A2 (en) * 1997-10-10 1999-04-14 Mitsubishi Denki Kabushiki Kaisha Implementation schemes for a queue length based ABR flow control system
GB2341292A (en) * 1998-03-24 2000-03-08 Northern Telecom Ltd Apparatus and method for optimizing max-min fair rate control in Available Bit Rate (ABR) sessions
GB2341292B (en) * 1998-03-24 2001-09-05 Northern Telecom Ltd Apparatus and method for optimizing max-min fair rate control in ABR sessions
US6597662B1 (en) 1998-03-24 2003-07-22 Nortel Networks Limited Apparatus and method for optimizing max-min fair rate control in ABR sessions

Also Published As

Publication number Publication date
CA2222413A1 (en) 1996-12-12
GB9611706D0 (en) 1996-08-07
EP0878068A4 (en) 2001-05-16
WO1996039759A1 (en) 1996-12-12
EP0878068A1 (en) 1998-11-18
GB2301985B (en) 2000-02-09
GB9511319D0 (en) 1995-08-02

Similar Documents

Publication Publication Date Title
US7277430B2 (en) Short cell multiplexer
CA2236856C (en) Traffic control in a communication system
US6741565B1 (en) System and method for estimating cell rate in an ATM network
GB2301985A (en) Controlling the flow of ATM cells in an ATM network
JPH1023040A (en) Variable bit-rate scheduler
US6330227B1 (en) Cell output control apparatus and method
US5940368A (en) Cell rate supervising system terminating congestion feedback loop
US6115358A (en) Controlling the flow of ATM cells in an ATM network
JPH11239144A (en) Transfer rate control device
US5224092A (en) Method for controlling a flow of data cells into a plurality of asynchronously time-divided transmission channels with a single admission switch for transmission in the channels with reference to the state of a plurality of count values
US6400688B1 (en) Method for consolidating backward resource management cells for ABR services in an ATM network
US5923645A (en) Cell rate control device and method
KR100383571B1 (en) Abr service apparatus of packet switching system
CA2295621C (en) Method for optimizing the workload on connection sections given abr traffic
JP4223716B2 (en) ATM switch traffic performance analysis apparatus and method, and ATM switching system to which the same is applied
JP3368454B2 (en) Cell loss / misplacement detection processing method
Muthukrishnan et al. Design, implementation and evaluation of an explicit rate allocation algorithm in an ATM switch
JP3003660B2 (en) Asynchronous transfer mode ABR switch device
JPH04355535A (en) Atm call reception controller
KR0129609B1 (en) Method for adjusting inter-cell distance of upc
NO311820B1 (en) Procedure for managing traffic in an ATM (Asynchronous Transfer Mode) network with leakage principle
JPH10294741A (en) Traffic-shaping device in atm communication network
JPH11220479A (en) Peak cell rate monitoring circuit
KR980013148A (en) Interlocking control device and method using data buffering
JPH09116550A (en) Input cell buffer system for ATM switch

Legal Events

Date Code Title Description
732E Amendments to the register in respect of changes of name or changes affecting rights (sect. 32/1977)
732E Amendments to the register in respect of changes of name or changes affecting rights (sect. 32/1977)
PE20 Patent expired after termination of 20 years

Expiry date: 20160604