GB2397672B - Method and apparatus for binary encoding logic circuits - Google Patents

Method and apparatus for binary encoding logic circuits

Info

Publication number: GB2397672B
Authority: GB; United Kingdom
Prior art keywords: logic circuits; binary encoding; encoding logic; binary; circuits
Prior art date: 2000-01-27
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.): Expired - Fee Related

Application number

GB0402265A

Other versions

GB0402265D0 (en

GB2397672A (en

Inventor

Peter Meulemans

Sunil Talwar

Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)

Automatic Parallel Designs Ltd

Original Assignee

Automatic Parallel Designs Ltd

Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)

2000-01-27

Filing date

2000-01-27

Publication date

2004-09-22

2000-01-27 Application filed by Automatic Parallel Designs Ltd filed Critical Automatic Parallel Designs Ltd

2004-03-10 Publication of GB0402265D0 publication Critical patent/GB0402265D0/en

2004-07-28 Publication of GB2397672A publication Critical patent/GB2397672A/en

2004-09-22 Application granted granted Critical

2004-09-22 Publication of GB2397672B publication Critical patent/GB2397672B/en

2020-01-27 Anticipated expiration legal-status Critical

Status Expired - Fee Related legal-status Critical Current

Classifications

- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F30/00—Computer-aided design [CAD]
- G06F30/30—Circuit design

Landscapes

Engineering & Computer Science (AREA)
Computer Hardware Design (AREA)
Physics & Mathematics (AREA)
Theoretical Computer Science (AREA)
Evolutionary Computation (AREA)
Geometry (AREA)
General Engineering & Computer Science (AREA)
General Physics & Mathematics (AREA)
Compression, Expansion, Code Conversion, And Decoders (AREA)
Error Detection And Correction (AREA)

GB0402265A 2000-01-27 2000-01-27 Method and apparatus for binary encoding logic circuits Expired - Fee Related GB2397672B (en)

Applications Claiming Priority (1)

Application Number	Priority Date	Filing Date	Title
GB0001916A GB2358719B (en)	2000-01-27	2000-01-27	Method and apparatus for binary encoding logic circuits

Publications (3)

Publication Number	Publication Date
GB0402265D0 GB0402265D0 (en)	2004-03-10
GB2397672A GB2397672A (en)	2004-07-28
GB2397672B true GB2397672B (en)	2004-09-22

Family

ID=9884477

Family Applications (3)

Application Number	Title	Priority Date	Filing Date
GB0402264A Expired - Fee Related GB2395823B (en)	2000-01-27	2000-01-27	Method and apparatus for binary encoding logic circuits
GB0402265A Expired - Fee Related GB2397672B (en)	2000-01-27	2000-01-27	Method and apparatus for binary encoding logic circuits
GB0001916A Expired - Fee Related GB2358719B (en)	2000-01-27	2000-01-27	Method and apparatus for binary encoding logic circuits

Family Applications Before (1)

Application Number	Title	Priority Date	Filing Date
GB0402264A Expired - Fee Related GB2395823B (en)	2000-01-27	2000-01-27	Method and apparatus for binary encoding logic circuits

Family Applications After (1)

Application Number	Title	Priority Date	Filing Date
GB0001916A Expired - Fee Related GB2358719B (en)	2000-01-27	2000-01-27	Method and apparatus for binary encoding logic circuits

Country Status (5)

Country	Link
US (1)	US6628215B2 (en)
EP (1)	EP1275063A2 (en)
AU (1)	AU2001232023A1 (en)
GB (3)	GB2395823B (en)
WO (1)	WO2001055916A2 (en)

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US20040225865A1 (en) *	1999-09-03	2004-11-11	Cox Richard D.	Integrated database indexing system
US6829695B1 (en) *	1999-09-03	2004-12-07	Nexql, L.L.C.	Enhanced boolean processor with parallel input
US7274230B2 (en) *	2002-04-26	2007-09-25	California Institute Of Technology	System and method for clockless data recovery
US7020865B2 (en)	2003-06-24	2006-03-28	Lsi Logic Corporation	Process for designing comparators and adders of small depth
US7307453B1 (en) *	2004-10-12	2007-12-11	Nortel Networks Limited	Method and system for parallel state machine implementation
US7242329B2 (en) *	2005-02-02	2007-07-10	Gm Global Technology Operations, Inc.	Method and system for prioritizing data values for robust data representation
US7895560B2 (en) *	2006-10-02	2011-02-22	William Stuart Lovell	Continuous flow instant logic binary circuitry actively structured by code-generated pass transistor interconnects
US7538697B1 (en) *	2008-02-27	2009-05-26	Red Hat, Inc.	Heuristic modeling of adaptive compression escape sequence
FR2933514B1 (en) *	2008-07-02	2012-10-19	Canon Kk	SIMILARITY ENCODING AND DECODING METHODS AND DEVICES FOR XML TYPE DOCUMENTS
US8044787B2 (en) *	2008-10-07	2011-10-25	Eaton Corporation	Discrete sensor inputs
WO2015165037A1 (en) *	2014-04-29	2015-11-05	中国科学院自动化研究所	Cascaded binary coding based image matching method
US9535665B2 (en)	2015-06-01	2017-01-03	Assurant Design Automation LLC	Hardware/software agnostic design generation
US10678980B2 (en)	2015-06-01	2020-06-09	Assurant Design Automation LLC	Combination map based composite design
US9396298B1 (en) *	2015-06-01	2016-07-19	Assurant Design Automation LLC	Linear array display
US9536029B2 (en)	2015-06-01	2017-01-03	Assurant Design Automation LLC	Linear array hierarchy navigation
US10402175B2 (en)	2015-06-01	2019-09-03	Assurant Design Automation LLC	Parsing source code into a linear array
US10997334B2 (en)	2015-06-01	2021-05-04	Assurant Design Automation LLC	Implementing a logic design
US20160350668A1 (en) *	2015-06-01	2016-12-01	Assurant Design Automation LLC	Risk evaluation
US9590858B2 (en)	2015-06-01	2017-03-07	Assurant Design Automation LLC	Identifying a nearest connection
US11610038B2 (en)	2015-06-01	2023-03-21	Assurant Design Automation LLC	Risk evaluation
US10747919B2 (en)	2015-06-01	2020-08-18	Assurant Design Automation LLC	Generating path execution times
US10997335B2 (en)	2015-06-01	2021-05-04	Assurant Design Automation LLC	Exceptional logic element management

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US4463344A (en) *	1981-12-31	1984-07-31	International Business Machines Corporation	Method and apparatus for generating a noiseless sliding block code for a (2,7) channel with rate 1/2
US5475388A (en) *	1992-08-17	1995-12-12	Ricoh Corporation	Method and apparatus for using finite state machines to perform channel modulation and error correction and entropy coding
US5272478A (en) *	1992-08-17	1993-12-21	Ricoh Corporation	Method and apparatus for entropy coding
US5515292A (en) *	1993-09-29	1996-05-07	Texas Instruments Incorporated	Circuit activity driven state assignment of FSMS implemented in CMOS for low power reliable operations
TW298687B (en) *	1995-04-21	1997-02-21	Hitachi Ltd
US6173414B1 (en) *	1998-05-12	2001-01-09	Mcdonnell Douglas Corporation	Systems and methods for reduced error detection latency using encoded data
US6216260B1 (en) *	1999-02-01	2001-04-10	Anna Alshansky	Method for automatic synthesis of a digital circuit employing an algorithm flowchart

2000
- 2000-01-27 GB GB0402264A patent/GB2395823B/en not_active Expired - Fee Related
- 2000-01-27 GB GB0402265A patent/GB2397672B/en not_active Expired - Fee Related
- 2000-01-27 GB GB0001916A patent/GB2358719B/en not_active Expired - Fee Related
2001
- 2001-01-29 US US09/771,922 patent/US6628215B2/en not_active Expired - Fee Related
- 2001-01-29 WO PCT/GB2001/000497 patent/WO2001055916A2/en not_active Ceased
- 2001-01-29 EP EP01904104A patent/EP1275063A2/en not_active Withdrawn
- 2001-01-29 AU AU2001232023A patent/AU2001232023A1/en not_active Abandoned

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
NONE *

Also Published As

Publication number	Publication date
GB2395823A (en)	2004-06-02
GB2395823B (en)	2004-08-25
GB2358719B (en)	2004-05-05
AU2001232023A1 (en)	2001-08-07
US6628215B2 (en)	2003-09-30
WO2001055916A2 (en)	2001-08-02
GB0402265D0 (en)	2004-03-10
WO2001055916A3 (en)	2002-10-24
EP1275063A2 (en)	2003-01-15
GB2397672A (en)	2004-07-28
GB2358719A (en)	2001-08-01
US20010044708A1 (en)	2001-11-22
GB0001916D0 (en)	2000-03-22
GB0402264D0 (en)	2004-03-10

Publication	Publication Date	Title
GB2358719B (en)	2004-05-05	Method and apparatus for binary encoding logic circuits
GB0017379D0 (en)	2000-08-30	Data encoding apparatus and method
GB2368502B (en)	2003-03-12	Encoding decoding and communication method and apparatus
GB0015233D0 (en)	2000-08-16	Indexing method and apparatus
GB0029285D0 (en)	2001-01-17	Pigging method and apparatus
AU4351601A (en)	2001-09-17	Wafer processing apparatus and method
EP1229154A4 (en)	2006-12-13	Method and apparatus for electroplating
GB0014059D0 (en)	2000-08-02	Method and apparatus
SG111926A1 (en)	2005-06-29	Manufacturing method in manufacturing line, manufacturing method for exposure apparatus, and exposure apparatus
GB9718253D0 (en)	1997-11-05	Method and apparatus for binary shape encoding
EP1344145A4 (en)	2006-07-26	Apparatus and method for processing status information
AU2003293342A8 (en)	2005-06-06	Binary switch apparatus and method for manufacturing same
IL155243A0 (en)	2003-11-23	Voice encoding method and apparatus
GB0102010D0 (en)	2001-03-14	Apparatus and method for reducing power and noise through reduced switching recording in logic devices
GB0108751D0 (en)	2001-05-30	Polishing apparatus and method
GB0005886D0 (en)	2000-05-03	Elector-plating apparatus and method
GB2377145B (en)	2003-06-04	Apparatus and method for coding/decoding
GB0008300D0 (en)	2000-05-24	Method and apparatus
EP1185108A4 (en)	2004-01-02	Video encoding apparatus and video encoding method
GB2336737B (en)	2002-03-27	Method and apparatus for encoding a binary shape signal
GB0028557D0 (en)	2001-01-10	Fabrication method and apparatus
HUP0301933A3 (en)	2005-05-30	Method and apparatus for generating digital drawings
GB0025284D0 (en)	2000-11-29	Method and apparatus
GB0125651D0 (en)	2001-12-19	Integrated circuit method and apparatus
GB0008804D0 (en)	2000-05-31	Tessellating apparatus and method

Legal Events

Date	Code	Title	Description
2009-12-02	732E	Amendments to the register in respect of changes of name or changes affecting rights (sect. 32/1977)	Free format text: REGISTERED BETWEEN 20091105 AND 20091111
2015-09-23	PCNP	Patent ceased through non-payment of renewal fee	Effective date: 20150127