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GB2393287B - Method for using extrema to load balance a loop of parallel processing elements - Google Patents

Method for using extrema to load balance a loop of parallel processing elements

Info

Publication number
GB2393287B
GB2393287B GB0309209A GB0309209A GB2393287B GB 2393287 B GB2393287 B GB 2393287B GB 0309209 A GB0309209 A GB 0309209A GB 0309209 A GB0309209 A GB 0309209A GB 2393287 B GB2393287 B GB 2393287B
Authority
GB
United Kingdom
Prior art keywords
extrema
loop
parallel processing
processing elements
load balance
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
GB0309209A
Other versions
GB2393287A (en
GB0309209D0 (en
Inventor
Mark Beaumont
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Micron Europe Ltd
Original Assignee
Micron Europe Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from GB0221562A external-priority patent/GB0221562D0/en
Priority claimed from GB0221563A external-priority patent/GB2395299B/en
Application filed by Micron Europe Ltd filed Critical Micron Europe Ltd
Publication of GB0309209D0 publication Critical patent/GB0309209D0/en
Priority to US10/689,312 priority Critical patent/US7373645B2/en
Publication of GB2393287A publication Critical patent/GB2393287A/en
Application granted granted Critical
Publication of GB2393287B publication Critical patent/GB2393287B/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/76—Architectures of general purpose stored program computers
    • G06F15/80—Architectures of general purpose stored program computers comprising an array of processing units with common control, e.g. single instruction multiple data processors
    • G06F15/8007—Architectures of general purpose stored program computers comprising an array of processing units with common control, e.g. single instruction multiple data processors single instruction multiple data [SIMD] multiprocessors
    • G06F15/8023—Two dimensional arrays, e.g. mesh, torus
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/02—Comparing digital values
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/76—Architectures of general purpose stored program computers
    • G06F15/78—Architectures of general purpose stored program computers comprising a single central processing unit
    • G06F15/7807—System on chip, i.e. computer system on a single chip; System in package, i.e. computer system on one or more chips in a single package
    • G06F15/7821—Tightly coupled to memory, e.g. computational memory, smart memory, processor in memory
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/76—Architectures of general purpose stored program computers
    • G06F15/80—Architectures of general purpose stored program computers comprising an array of processing units with common control, e.g. single instruction multiple data processors
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/02—Comparing digital values
    • G06F7/026—Magnitude comparison, i.e. determining the relative order of operands based on their numerical value, e.g. window comparator

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Engineering & Computer Science (AREA)
  • Computing Systems (AREA)
  • Pure & Applied Mathematics (AREA)
  • Mathematical Optimization (AREA)
  • Mathematical Analysis (AREA)
  • Computational Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Multi Processors (AREA)
  • Image Processing (AREA)
  • Advance Control (AREA)
GB0309209A 2002-09-17 2003-04-23 Method for using extrema to load balance a loop of parallel processing elements Expired - Fee Related GB2393287B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
US10/689,312 US7373645B2 (en) 2003-04-23 2003-10-20 Method for using extrema to load balance a loop of parallel processing elements

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
GB0221562A GB0221562D0 (en) 2002-09-17 2002-09-17 Host memory interface for a parallel processor
GB0221563A GB2395299B (en) 2002-09-17 2002-09-17 Control of processing elements in parallel processors

Publications (3)

Publication Number Publication Date
GB0309209D0 GB0309209D0 (en) 2003-05-28
GB2393287A GB2393287A (en) 2004-03-24
GB2393287B true GB2393287B (en) 2005-09-14

Family

ID=26247117

Family Applications (12)

Application Number Title Priority Date Filing Date
GB0309212A Expired - Fee Related GB2393289C (en) 2002-09-17 2003-04-23 Method for load balancing a line of parallel processing elements
GB0309204A Expired - Fee Related GB2393283B (en) 2002-09-17 2003-04-23 Method for load balancing an N-dimensional array of parallel processing elements
GB0309214A Expired - Fee Related GB2393290B (en) 2002-09-17 2003-04-23 Method for load balancing a loop of parallel processing elements
GB0309211A Expired - Fee Related GB2393288B (en) 2002-09-17 2003-04-23 Method of obtaining interleave interval for two data values
GB0309206A Expired - Fee Related GB2393285B (en) 2002-09-17 2003-04-23 Method for finding global extrema of a set of bytes distributed across an array of parallel processing elements
GB0309207A Expired - Fee Related GB2393286B (en) 2002-09-17 2003-04-23 Method for finding local extrema of a set of values for a parallel processing element
GB0309200A Expired - Fee Related GB2393281B (en) 2002-09-17 2003-04-23 Method for rounding values for a plurality of parallel processing elements
GB0309202A Expired - Fee Related GB2393282B (en) 2002-09-17 2003-04-23 Method for using filtering to load balance a loop of parallel processing elements
GB0309205A Expired - Fee Related GB2393284B (en) 2002-09-17 2003-04-23 Method for finding global extrema of a set of shorts distributed across an array of parallel processing elements
GB0309198A Expired - Fee Related GB2393279B (en) 2002-09-17 2003-04-23 Method for manipulating data in a group of processing elements
GB0309199A Expired - Fee Related GB2393280B (en) 2002-09-17 2003-04-23 Method for manipulating data in a group of processing elements to transpose the data using a memory stack
GB0309209A Expired - Fee Related GB2393287B (en) 2002-09-17 2003-04-23 Method for using extrema to load balance a loop of parallel processing elements

Family Applications Before (11)

Application Number Title Priority Date Filing Date
GB0309212A Expired - Fee Related GB2393289C (en) 2002-09-17 2003-04-23 Method for load balancing a line of parallel processing elements
GB0309204A Expired - Fee Related GB2393283B (en) 2002-09-17 2003-04-23 Method for load balancing an N-dimensional array of parallel processing elements
GB0309214A Expired - Fee Related GB2393290B (en) 2002-09-17 2003-04-23 Method for load balancing a loop of parallel processing elements
GB0309211A Expired - Fee Related GB2393288B (en) 2002-09-17 2003-04-23 Method of obtaining interleave interval for two data values
GB0309206A Expired - Fee Related GB2393285B (en) 2002-09-17 2003-04-23 Method for finding global extrema of a set of bytes distributed across an array of parallel processing elements
GB0309207A Expired - Fee Related GB2393286B (en) 2002-09-17 2003-04-23 Method for finding local extrema of a set of values for a parallel processing element
GB0309200A Expired - Fee Related GB2393281B (en) 2002-09-17 2003-04-23 Method for rounding values for a plurality of parallel processing elements
GB0309202A Expired - Fee Related GB2393282B (en) 2002-09-17 2003-04-23 Method for using filtering to load balance a loop of parallel processing elements
GB0309205A Expired - Fee Related GB2393284B (en) 2002-09-17 2003-04-23 Method for finding global extrema of a set of shorts distributed across an array of parallel processing elements
GB0309198A Expired - Fee Related GB2393279B (en) 2002-09-17 2003-04-23 Method for manipulating data in a group of processing elements
GB0309199A Expired - Fee Related GB2393280B (en) 2002-09-17 2003-04-23 Method for manipulating data in a group of processing elements to transpose the data using a memory stack

Country Status (1)

Country Link
GB (12) GB2393289C (en)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6078945A (en) * 1995-06-21 2000-06-20 Tao Group Limited Operating system for use with computer networks incorporating two or more data processors linked together for parallel processing and incorporating improved dynamic load-sharing techniques
WO2001088696A2 (en) * 2000-05-19 2001-11-22 Neale Bremner Smith Processor with load balancing

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4215401A (en) * 1978-09-28 1980-07-29 Environmental Research Institute Of Michigan Cellular digital array processor
JPS6028345A (en) * 1983-07-26 1985-02-13 Fujitsu Ltd Communication system in parallel computer
US4816993A (en) * 1984-12-24 1989-03-28 Hitachi, Ltd. Parallel processing computer including interconnected operation units
SU1546960A1 (en) * 1988-06-14 1990-02-28 Aleksandr V Vasilkevich Device for determining extreme values
JPH0833810B2 (en) * 1989-06-19 1996-03-29 甲府日本電気株式会社 Vector data retrieval device
JPH05501460A (en) * 1990-05-30 1993-03-18 アダプティブ・ソリューションズ・インコーポレーテッド Distributed digital maximization function architecture and method
JP2637862B2 (en) * 1991-05-29 1997-08-06 甲府日本電気株式会社 Element number calculation device
CA2148719A1 (en) * 1992-11-05 1994-05-11 Warren Marwood Scalable dimensionless array
JPH0764766A (en) * 1993-08-24 1995-03-10 Fujitsu Ltd Maximum / minimum value calculation method for parallel computers
US5546336A (en) * 1995-01-19 1996-08-13 International Business Machine Corporation Processor using folded array structures for transposition memory and fast cosine transform computation
DE69835159T2 (en) * 1997-10-10 2007-06-14 Advanced Micro Devices, Inc., Sunnyvale MICROPROCESSOR with extreme value commands and comparison commands
US6029244A (en) * 1997-10-10 2000-02-22 Advanced Micro Devices, Inc. Microprocessor including an efficient implementation of extreme value instructions
US5991785A (en) * 1997-11-13 1999-11-23 Lucent Technologies Inc. Determining an extremum value and its index in an array using a dual-accumulation processor
JP2003526155A (en) * 2000-03-08 2003-09-02 サン・マイクロシステムズ・インコーポレイテッド Processing architecture with the ability to check array boundaries

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6078945A (en) * 1995-06-21 2000-06-20 Tao Group Limited Operating system for use with computer networks incorporating two or more data processors linked together for parallel processing and incorporating improved dynamic load-sharing techniques
WO2001088696A2 (en) * 2000-05-19 2001-11-22 Neale Bremner Smith Processor with load balancing

Also Published As

Publication number Publication date
GB2393289C (en) 2008-02-28
GB2393285A (en) 2004-03-24
GB2393280B (en) 2006-01-18
GB2393289A (en) 2004-03-24
GB0309212D0 (en) 2003-05-28
GB2393284B (en) 2007-01-03
GB0309205D0 (en) 2003-05-28
GB2393287A (en) 2004-03-24
GB0309202D0 (en) 2003-05-28
GB2393283B (en) 2005-09-14
GB2393283A (en) 2004-03-24
GB0309204D0 (en) 2003-05-28
GB2393281B (en) 2005-09-14
GB2393279A (en) 2004-03-24
GB2393286A (en) 2004-03-24
GB2393290A (en) 2004-03-24
GB2393281A (en) 2004-03-24
GB2393284A (en) 2004-03-24
GB0309207D0 (en) 2003-05-28
GB0309206D0 (en) 2003-05-28
GB2393288A (en) 2004-03-24
GB0309211D0 (en) 2003-05-28
GB2393280A (en) 2004-03-24
GB2393290B (en) 2005-09-14
GB2393279B (en) 2006-08-09
GB2393282B (en) 2005-09-14
GB0309200D0 (en) 2003-05-28
GB0309199D0 (en) 2003-05-28
GB2393282A (en) 2004-03-24
GB0309198D0 (en) 2003-05-28
GB2393286B (en) 2006-10-04
GB2393285B (en) 2007-01-03
GB2393289B (en) 2005-11-30
GB2393288B (en) 2005-11-09
GB0309209D0 (en) 2003-05-28

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Legal Events

Date Code Title Description
PCNP Patent ceased through non-payment of renewal fee

Effective date: 20140423