GB2393052A

GB2393052A - Control of the bias in an amplifier or mixer of a receiver for improved dynamic range, noise performance and efficiency

Info

Publication number: GB2393052A
Application number: GB0221086A
Authority: GB
Inventors: Christopher Herbert Gebauer
Original assignee: Motorola Inc
Current assignee: Motorola Solutions Inc
Priority date: 2002-09-12
Filing date: 2002-09-12
Publication date: 2004-03-17
Also published as: GB2393052A8; GB0221086D0

Abstract

In a receiver (figure 1) the detected levels of RF and either IF or baseband signals are compared and the result used to control the bias of a low noise amplifier and/or mixer to optimise the dynamic range, noise and efficiency. In an alternative embodiment (figure 2) a measure of the signal quality 22 (eg bit error rate BER) is compared 28 with the quality expected at a measured signal level 21,24,26 and again used to control the bias of a low noise amplifier and/or mixer.

Description

1 2393052

TITLE: R.F. RECEIVERS FOR USE IN COMMUNICATION DEVICES

FIELD OF THE INVENTION

5 The present invention relates to R.F. (radio frequency) receivers for use in communications devices. In particular, it relates to circuits for D.C. bias control in the front end of R.F. receivers for use in mobile communications units.

BACKGROUND OF THE INVENTION

Mobile or portable digital radio communications units referred to herein as 'mobile stations' (MSs) 15 typically operate in a system with other communicating units, e.g. using a common operating protocol. For example, mobile radio communications systems operating according to the TETRA (Terrestrial Trunked Radio) standards are finding wide use. These operational 20 standards, which are for modern bunked R.F.

communications systems, have been specified by the ETSI (European Telecommunications Standards Institute). In these standards, the communications protocol involves digital information (e.g. voice, data or picture/video 25 information) being contained in phase components of a R. F. signal modulated using the DQPSK (differential quadrature phase shift keying) system generally. Signals are communicated according to a TDMA (time division multiple access) protocol. Signals are sent to a BTS 30 (base transceiver station) from a MS (mobile station) (the uplink) and from a BTS to a MS (downlink) are at different frequencies (FDD or frequency division duplex). Operating frequencies for TETRA systems are

narrowband frequency channels which are in several specified frequency ranges including the following:(i) 380MHz-390MHz uplink/390MHz-400MHz downlink; (ii) 410MHz-420MHz uplink/420MHz-430MHz downlink; (iii) 5 806MHz-825MHz uplink/85lMHz-87OMHz downlink. Each channel used has a bandwidth of 25kHz and can carry 36kbit/sec. The TETRA standard also defines protocols for direct communications (known in the art as 'DMO' or direct mode operation) between MSs. One MS operating 10 with DMO can transmit directly to another MS without any intervening BTS to repeat the transmission.

One of the main requirements for R.F. receivers for use in mobile stations operating in a TDMA protocol, e.g. in accordance with TETRA standards, is a large 15 dynamic range extending from a reference sensitivity up to detection of large wanted signals (on-channel signals). Provision of such a large dynamic range also requires detection of unwanted interfering signals (off-

channel signals) at the receiver input. A large dynamic 20 range at the receiver input requires sufficient gain linearity versus input level range and a stable D.C.

biasing point to maintain adequate noise performance. At the receiver input applied large signals both wanted and unwanted will not then degrade the performance.

25 Furthermore, the R.F. receiver should have a low power consumption in order to achieve high standby and receiving time cycles. This requires current-consuming components employed in the receiver such as a low noise amplifier (LNA) and active down conversion mixer (DCM) 30 to be operated with a low D.C. (direct current) bias current. The D.C. bias current determines the large signal performance of the LNA and DCM. Increasing the D.C. bias current improves the large signal performance.

However the optimal noise performance for small input signals is met by a lower bias current.

Therefore the low power consumption requirement conflicts with the large dynamic range requirement. The 5 purpose of the present invention is to provide an improved receiver capable of handling this conflict.

SUMMARY OF THE PRESENT INVENTION

10 According to the present invention in a first aspect there is provided a circuit for a R.F. receiver including: at least one R.F. component having an adjustable D.C. bias to control performance of the component in the receiver; a biasing circuit for 15 applying a D.C. bias to the at least one R.F. component; an input signal path for receiving an input R.F. signal; a frequency down-converter for receiving and down-

converting an input R.F. signal applied via the input signal path; a channel filter for filtering a signal 20 produced as an output by the down-converter to produce a wanted on-channel signal; an output signal path for receiving a wanted on-channel output signal from the channel filter; connected to the output signal path a signal level detector to detect the level of a signal in 25 the output signal path; a comparator for comparing a signal level detected by the signal level detector with a reference signal level; and an output connection from the comparator to the biasing circuit of at least one R.F. component to apply a control signal thereto by 30 which the D.C. bias applied to the at least one R.F.

component is adjustable in response to the control signal.

The R. F. component whose D.C. bias is adjustable may comprise an amplifier, e.g. a low noise amplifier.

Alternatively, or in addition, it may comprise a mixer forming the main component of the down-converter. The 5 amplifier may be included in the input signal path.

The input signal path may also include a pre-

selection filter located before and/or after the amplifier. An input R. F. signal may be applied into the input signal path by an R. F. antenna.

10 The output signal path may include a signal processor, e.g. to process incoming signals at intermediate or baseband frequency (depending on the extent of down-conversion by the down-converter). The signal level detector may conveniently be connected to 15 the output signal path at the signal processor.

In a preferred first form of the invention, there may be connected to the input signal path a further signal level detector to detect the level of a signal in the input signal path, the detected level thereby providing 20 the reference signal to the comparator.

Where the R. F. component comprises an amplifier such as a low noise amplifier included in the input signal path, the said further signal level detector may be connected so as to sample a signal provided as an output 25 by the amplifier.

Alternatively, in a second form of the invention, there may be connected to the input signal path or the output signal path or a path connecting the two a signal quality detector to detect the quality level of a 30 detected signal thereby to generate the reference signal required by the comparator.

In this case, the signal quality detector may comprise a bit error rate (BER) detector as is known in

5 -T the art. The receiver may include a calculator adapted to calculate the expected signal quality of a given detected signal level produced by the signal level detector and to compare this calculated value with the 5 measured signal quality level in the comparator. The calculator may be operable to estimate the expected signal quality of the detected signal level by use of a look-up table held in a memory which stores BER measurement values for measured on-channel signal level 10 values.

The signal level detectors may comprise RSSI (received signal strength indicators), e.g. as known in the art.

The comparator may be operable to measure a 15 difference between the signal levels detected respectively by the first and second signal level detectors. The comparator may be operable to produce an output control signal when the measured difference is greater than a pre-determined threshold.

20 Known R.F. receiver technologies use RSSI detection in the I.F. section after the channel filtering and/or in the baseband section to set controls in analogue or digital Automatic Gain Control (AGC) systems employed in the receiver. The detected RSSI covers the signal level 25 of the wanted R.F. channel (on channel) only. The level detection of an unwanted large interfering signal (off channel, e.g. a blocking signal) is not possible because of the channel filter selectivity. This means that in the case of receiving a small wanted signal (on-channel) 30 in the presence of a large unwanted signal (off-channel) the RSSI detection cannot recognize the need for an increased D.C. biasing requirement of the receiver

front-end, e.g. low noise amplifier, since the level of the small wanted signal only is detected.

In contrast, by the invention, a receiver D.C.

biasing control means and procedure is provided to 5 enable the receiver to increase the standby and receive cycles of a mobile communications station, especially one supported by a battery. The D.C. biasing is controlled by use of indications of two current signal detectors (as in the first and second forms of the 10 invention described earlier) each of which may be implemented in a known hardware or software form, optionally using a processing device which also carries out the function of the signal processor referred to earlier. The D.C. bias may beneficially be set to 15 provide the optimum D.C. bias current needed for minimum power consumption consistent with the appropriate dynamic range.

According to the present invention in a second aspect there is provided a mobile communication unit 20 incorporating a receiver according to the first aspect.

The receiver according to the first aspect and the mobile communication unit according to the second aspect may be suitable for use in a TETRA communication system.

Embodiments of the present invention will now be 25 described by way of example with reference to the accompanying drawings, in which: BRIEF DESCRIPTION OF THE ACCOMPANYING DRAWINGS

30 FIG l is a schematic circuit diagram of a receiver embodying the invention for use in a mobile station for use in radio communications.

FIG 2 is an alternative schematic circuit diagram of a receiver embodying the invention for use in a mobile station for use in radio communications.

5 DESCRIPTION OF EMBODIMENTS OF THE INVENTION

As shown in Figure 1, a receiver 1 for a mobile station for use in mobile radio communications includes an antenna 3 which receives incoming R.F. signals is 10 coupled to a first pre-selection filter 5. The first preselection filter 5 is coupled to a LNA (low noise amplifier) 7 having an output 9. The signal amplified by the LNA 7 at the output 9 is fed to a second pre-

selection filter 11. The same signal at the output 9 is 15 also sampled by a first level detector 13. An output signal from the second pre- selection filter 11 is fed to a down conversion mixer 15 which down converts the signal to intermediate or baseband as appropriate (depending on the receiver type) by mixing with a local 20 oscillator signal. The down converted signal is applied to a channel filter 17 matched to the modulation form of the incoming R.F. signal. The channel filtered signal which is provided as an output by the channel filter 17 is delivered to a signal processor 19 which carries out 25 demodulation and extraction of information from the received signal and provides an output 23. This may be further processed and applied in a known manner to one more output devices (not shown), e.g. a speaker for speech information and display for visual or text data 30 information.

A sample of the digitised signal level of the signal processed in the signal processor 19 is taken by a second level detector 21. The level of the signals

detected by the first level detector 13 and of the second level detector 21 are applied as inputs to a comparator 25. The comparator 25 determines whether the difference between the signal levels detected by the 5 level detectors 13 and 21 is below or above a pre-

determined threshold level taking into account the gain offset between them. An output from the comparator 25 is applied to control circuitry of the LNA 7 and of the mixer 15. When the comparator 25 detects that the 10 difference between the two detected signal levels is greater than the predetermined threshold, its output is applied to adjust the DC biasing of the LNA 7 and of the mixer 15.

In practice, the function of the comparator 25 may be 15 provided by a digital signal processor which also provides the functions of the processor 19.

In practice, both digitised signal level results are compared in a comparator which may be in a radio control function controlling the stage amplification of the 20 receiver 1. In the case of an on-channel signal being received by the receiver 1 both level detectors 13, 21 will show the same level result taking into account the gain offset between them. In the case of an additional off-channel signal being applied to the receiver 1, the 25 level detectors 13, 21 will detect different levels. A level detection at R.F. ranges covering a wide bandwidth, in this case the receiver bandwidth, is insensitive owing to the receiver's own noise bandwidth.

Therefore, the procedure to detect, by the comparator 30 25, a difference in level detected at the detectors 13, 21 works satisfactorily only if a certain lower level threshold is exceeded by the detected difference. When the comparator 25 detects that the threshold indicating

9 if off-channel activity has been exceeded the comparator 25 provides an output control signal which is employed to adjust the DC biasing of the LNA 7 and if applicable the D.C. biasing of the circuitry of the mixer 15.

5 If a large off-channel R.F. signal is received in the presence of a small wanted on-channel signal in the manner described above, adjusting of the D.C. biasing of the LNA 7 and if applicable the circuitry of the mixer 15 avoids or suppresses blocking or intermodulation 10 effects of the receiver 1_RF receiver front-end.

Generally the bias current setting of both the LNA 7 and mixer 15 circuitry determines the large signal performance of the R.F. receiver 1. The linearity of the transmission characteristics of the LNA 7 and mixer 15 15 in the presence of large off-channel signals depends on the DC biasing.

The D.C. (direct current) biasing determines the D.C.

operation point of the LNA 7 and the mixer 15. It is also known in the art as the "quiescent current" which 20 corresponds to the input dynamic range of the LNA 7 and mixer 15. The D.C. operation point of these components may be adjusted in a known manner by use of a biasing control line or by means of a D.C. supply current control. 25 FIG. 2 shows an alternative receiver 2 embodying the present invention. Similar items in FIG.s 1 and 2 have like reference numerals. In the receiver 2 of FIG. 2, the first level detector of the FIG. 1 receiver 1 is not used. Instead, a BER detector 22 is connected to the 30 signal processor 19 to measure the BER or signal quality associated with the signal being processed in the signal processor 19. The output of the level detector 21 is passed to a calculator 24. A memory 26 is coupled to the

10 4 calculator 24. The memory 26 stores information comprising a look-up table of estimated BER values for given detected on-channel signal level values. The calculator 24 is able to calculate, using the memory 26, 5 the expected BER for the detected signal level measured by the level detector 21 assuming it to be an on-channel signal. The calculated BER is delivered as a reference signal to a comparator 28 together with the actual BER measured by the BER detector 22.

10 The comparator 28 determines whether there is a difference between the its respective input signals, one representing a BER value provided by the BER detector 22 and the other representing the expected BER value for an on-channel signal as calculated by the calculator 24 15 using the signal level detected by the level detector 21. The comparator 28 determines whether any such difference is below or above a pre-determined threshold level. An output from the comparator 28 is applied to control circuitry of the LNA 7 and of the mixer 15. When 20 the comparator 28 detects that the difference between its two input signal levels is greater than the pre-

determined threshold, its output is applied to adjust the DC biasing of the LNA 7 and of the mixer 15 in a manner similar to the receiver 1 of FIG. 1.

Claims

l. A R.F. receiver including: at least one R.F.

component having an adjustable D.C. bias to control 5 performance of the component in the receiver; a biasing circuit for applying a D.C. bias to the at least one R.F. component; an input signal path for receiving an input R.F. signal; a frequency down-converter for receiving and downconverting an input R.F. signal 10 applied via the input signal path; a channel filter for filtering a signal produced as an output by the down-

converter to produce a wanted on-channel signal; an output signal path for receiving a wanted on-channel output signal from the channel filter; connected to the 15 output signal path a signal level detector to detect the level of a signal in the output signal path; a comparator for comparing a signal level detected by the signal level detector with a reference signal level; and an output connection from the comparator to the biasing 20 circuit of at least one R.F. component to apply a control signal thereto by which the D.C. bias applied to the at least one R.F. component is adjustable in response to the control signal.
2. A receiver according to claim l wherein the R.F.

25 component whose D.C. bias is adjustable comprises an amplifier.
3. A receiver according to claim 2 and wherein the amplifier is a low noise amplifier.
4. A receiver according to claim l, claim 2 or claim 3 30 and wherein R.F. component whose D.C. bias is adjustable comprises a mixer forming a component of the down-

converter. The amplifier may be included in the input signal path.

i: 5.A receiver according to claim 1 and wherein the R.F.

component whose D.C. bias is adjustable comprises an amplifier and the amplifier is included in the input signal path.
5
6.A receiver according to claim 5 and wherein the input signal path also includes a pre-selection filter located before and/or after the amplifier and an antenna to which an input R.F. signal is applied in use.
7.A receiver according to any one of the preceding 10 claims and wherein the output signal path includes a signal processor operable to process incoming signals at intermediate or baseband frequency.
8.A receiver according to claim 7 and wherein the signal level detector is connected to the output signal 15 path at the signal processor.
9.A receiver according to any one of the preceding claims and wherein there is connected to the input signal path a further signal level detector operable to detect the level of a signal in the first signal path, 20 the detected level thereby providing the reference signal to the comparator.
10. A receiver according to claim 9 and wherein the R.F. component comprises an amplifier included in the input signal path, and the said further signal level 25 detector is connected so as to sample a signal provided as an output by the amplifier.
11. A receiver according to claim 9 or claim 10 and wherein the comparator is operable to measure a difference between the signal levels detected 30 respectively by the first and second signal level detectors.
12. A receiver according to any one of claims 1 to 8 and wherein there is connected to the input signal path
13. or the output signal path a signal quality detector operable to detect the quality level of a detected R. F. signal thereby to generate the reference signal required by the comparator.

5 13. A receiver according to claim 12 and wherein the signal quality detector comprises a bit error rate (BER) detector.
14. A receiver according to claim 12 or claim 13 and which includes a calculator adapted to calculate the 10 expected signal quality of a given detected signal level produced by the signal level detector and to compare this calculated value with the measured signal quality level in the comparator.
15. A receiver according to claim 14 and which includes 15 a memory and wherein the calculator is operable to estimate the expected signal quality of the detected signal level by use of a look-up table held in the memory which stores BER measurement values for measured on-channel signal level values.

20
16. A receiver according to any one of the preceding claims and wherein the or each signal level detector comprises a RSSI (received signal strength indicator).
17. A receiver according to any one of claims and wherein the comparator is operable to produce an output 25 control signal when the measured difference between the signals input thereto is greater than a predetermined threshold.
18. A receiver according to any one of the preceding claims and wherein the receiver is operable in a TETRA 30 communication system.
19. A receiver according to any one of the preceding claims and substantially as herein described with reference to wherein the accompanying drawings.

14 _.
20. A mobile communication unit incorporating a receiver circuit according to any one of the preceding claims.