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GB2367404A - Scalable cryptographic engine - Google Patents

Scalable cryptographic engine

Info

Publication number
GB2367404A
GB2367404A GB0129287A GB0129287A GB2367404A GB 2367404 A GB2367404 A GB 2367404A GB 0129287 A GB0129287 A GB 0129287A GB 0129287 A GB0129287 A GB 0129287A GB 2367404 A GB2367404 A GB 2367404A
Authority
GB
United Kingdom
Prior art keywords
cryptographic
processing device
coprocessor
scalable
cryptographic processing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
GB0129287A
Other versions
GB0129287D0 (en
Inventor
Inc Motorola
Phillip Anthony Carswell
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
GEN DYNAMICS DECISIONS SYSTEMS
General Dynamics Mission Systems Inc
Original Assignee
GEN DYNAMICS DECISIONS SYSTEMS
General Dynamics Decision Systems Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by GEN DYNAMICS DECISIONS SYSTEMS, General Dynamics Decision Systems Inc filed Critical GEN DYNAMICS DECISIONS SYSTEMS
Publication of GB0129287D0 publication Critical patent/GB0129287D0/en
Publication of GB2367404A publication Critical patent/GB2367404A/en
Withdrawn legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3877—Concurrent instruction execution, e.g. pipeline or look ahead using a slave processor, e.g. coprocessor
    • G06F9/3879—Concurrent instruction execution, e.g. pipeline or look ahead using a slave processor, e.g. coprocessor for non-native instruction execution, e.g. executing a command; for Java instruction set
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
    • G06F21/70—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer
    • G06F21/71—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information
    • G06F21/72—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information in cryptographic circuits
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L9/00—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
    • H04L9/06—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols the encryption apparatus using shift registers or memories for block-wise or stream coding, e.g. DES systems or RC4; Hash functions; Pseudorandom sequence generators
    • H04L9/0618—Block ciphers, i.e. encrypting groups of characters of a plain text message using fixed encryption transformation
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L2209/00—Additional information or applications relating to cryptographic mechanisms or cryptographic arrangements for secret or secure communication H04L9/00
    • H04L2209/12—Details relating to cryptographic hardware or logic circuitry
    • H04L2209/125—Parallelization or pipelining, e.g. for accelerating processing of cryptographic operations

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Computer Security & Cryptography (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Mathematical Physics (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Advance Control (AREA)

Abstract

A cryptographic engine (10) that includes a scalable cryptographic coprocessor (14) that is controlled by, and separate from, a main engine processor (12). The coprocessor includes a register bank (40) for receiving and storing data packets to be encrypted, and a cryptographic processing device (34a-34n) coupled to the register bank (40) with a processing capacity that is scalable based on application-specific parameters. The coprocessor (14) also includes a control device (38) coupled to the register bank (40) and the cryptographic processing device (34a-34n) for instructing the cryptographic processing device to perform a cryptographic processing operation unique to the cryptographic processing device (34a-34n) based on externally-received processing instructions.
GB0129287A 2000-03-31 2001-03-27 Scalable cryptographic engine Withdrawn GB2367404A (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US54002200A 2000-03-31 2000-03-31
PCT/US2001/009714 WO2001076129A2 (en) 2000-03-31 2001-03-27 Scalable cryptographic engine

Publications (2)

Publication Number Publication Date
GB0129287D0 GB0129287D0 (en) 2002-01-23
GB2367404A true GB2367404A (en) 2002-04-03

Family

ID=24153653

Family Applications (1)

Application Number Title Priority Date Filing Date
GB0129287A Withdrawn GB2367404A (en) 2000-03-31 2001-03-27 Scalable cryptographic engine

Country Status (5)

Country Link
AU (1) AU5297201A (en)
CA (1) CA2375749A1 (en)
GB (1) GB2367404A (en)
PL (1) PL354956A1 (en)
WO (1) WO2001076129A2 (en)

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* Cited by examiner, † Cited by third party
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US7653710B2 (en) 2002-06-25 2010-01-26 Qst Holdings, Llc. Hardware task manager
US7962716B2 (en) 2001-03-22 2011-06-14 Qst Holdings, Inc. Adaptive integrated circuitry with heterogeneous and reconfigurable matrices of diverse and adaptive computational units having fixed, application specific computational elements
US7752419B1 (en) 2001-03-22 2010-07-06 Qst Holdings, Llc Method and system for managing hardware resources to implement system functions using an adaptive computing architecture
US7400668B2 (en) 2001-03-22 2008-07-15 Qst Holdings, Llc Method and system for implementing a system acquisition function for use with a communication device
US20040133745A1 (en) 2002-10-28 2004-07-08 Quicksilver Technology, Inc. Adaptable datapath for a digital processing system
US6836839B2 (en) 2001-03-22 2004-12-28 Quicksilver Technology, Inc. Adaptive integrated circuitry with heterogeneous and reconfigurable matrices of diverse and adaptive computational units having fixed, application specific computational elements
US7489779B2 (en) * 2001-03-22 2009-02-10 Qstholdings, Llc Hardware implementation of the secure hash standard
US6577678B2 (en) 2001-05-08 2003-06-10 Quicksilver Technology Method and system for reconfigurable channel coding
US7248585B2 (en) * 2001-10-22 2007-07-24 Sun Microsystems, Inc. Method and apparatus for a packet classifier
US7046635B2 (en) 2001-11-28 2006-05-16 Quicksilver Technology, Inc. System for authorizing functionality in adaptable hardware devices
US6986021B2 (en) 2001-11-30 2006-01-10 Quick Silver Technology, Inc. Apparatus, method, system and executable module for configuration and operation of adaptive integrated circuitry having fixed, application specific computational elements
US8412915B2 (en) 2001-11-30 2013-04-02 Altera Corporation Apparatus, system and method for configuration of adaptive integrated circuitry having heterogeneous computational elements
US7602740B2 (en) 2001-12-10 2009-10-13 Qst Holdings, Inc. System for adapting device standards after manufacture
US7215701B2 (en) 2001-12-12 2007-05-08 Sharad Sambhwani Low I/O bandwidth method and system for implementing detection and identification of scrambling codes
FR2834361B1 (en) * 2001-12-28 2004-02-27 Bull Sa DATA SECURITY MODULE BY ENCRYPTION / DECRYPTION AND / OR SIGNATURE / VERIFICATION OF SIGNATURE
US7403981B2 (en) 2002-01-04 2008-07-22 Quicksilver Technology, Inc. Apparatus and method for adaptive multimedia reception and transmission in communication environments
US7493375B2 (en) 2002-04-29 2009-02-17 Qst Holding, Llc Storage and delivery of device features
US7328414B1 (en) 2003-05-13 2008-02-05 Qst Holdings, Llc Method and system for creating and programming an adaptive computing engine
US7660984B1 (en) 2003-05-13 2010-02-09 Quicksilver Technology Method and system for achieving individualized protected space in an operating system
US8108656B2 (en) 2002-08-29 2012-01-31 Qst Holdings, Llc Task definition for specifying resource requirements
US7937591B1 (en) 2002-10-25 2011-05-03 Qst Holdings, Llc Method and system for providing a device which can be adapted on an ongoing basis
US7478031B2 (en) 2002-11-07 2009-01-13 Qst Holdings, Llc Method, system and program for developing and scheduling adaptive integrated circuity and corresponding control or configuration information
US8276135B2 (en) 2002-11-07 2012-09-25 Qst Holdings Llc Profiling of software and circuit designs utilizing data operation analyses
US7225301B2 (en) 2002-11-22 2007-05-29 Quicksilver Technologies External memory controller node
US7609297B2 (en) 2003-06-25 2009-10-27 Qst Holdings, Inc. Configurable hardware based digital imaging apparatus
FR2863076B1 (en) 2003-11-28 2006-02-03 Bull Sa HIGH SPEED CRYPTOGRAPHIC SYSTEM WITH MODULAR ARCHITECTURE.
US7953221B2 (en) 2006-12-28 2011-05-31 Intel Corporation Method for processing multiple operations
US20090183161A1 (en) * 2008-01-16 2009-07-16 Pasi Kolinummi Co-processor for stream data processing
US9569633B2 (en) * 2012-06-29 2017-02-14 Intel Corporation Device, system, and method for processor-based data protection
KR101566145B1 (en) * 2014-10-23 2015-11-06 숭실대학교산학협력단 Mobile device and method operating the mobile device
GB2582900A (en) 2019-03-18 2020-10-14 Pqshield Ltd Cryptography using a cryptographic state
GB201911802D0 (en) 2019-08-16 2019-10-02 Pqshield Ltd Lattice Coprocessor
CN114629665B (en) * 2022-05-16 2022-07-29 百信信息技术有限公司 Hardware platform for trusted computing

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
Not Yet Advised *

Also Published As

Publication number Publication date
CA2375749A1 (en) 2001-10-11
AU5297201A (en) 2001-10-15
GB0129287D0 (en) 2002-01-23
PL354956A1 (en) 2004-03-22
WO2001076129A2 (en) 2001-10-11
WO2001076129A3 (en) 2002-05-23

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Legal Events

Date Code Title Description
WAP Application withdrawn, taken to be withdrawn or refused ** after publication under section 16(1)