GB2359702A - Recovering and distributing an MPEG data stream clock - Google Patents
Recovering and distributing an MPEG data stream clock Download PDFInfo
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- GB2359702A GB2359702A GB0004348A GB0004348A GB2359702A GB 2359702 A GB2359702 A GB 2359702A GB 0004348 A GB0004348 A GB 0004348A GB 0004348 A GB0004348 A GB 0004348A GB 2359702 A GB2359702 A GB 2359702A
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Classifications
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N21/00—Selective content distribution, e.g. interactive television or video on demand [VOD]
- H04N21/40—Client devices specifically adapted for the reception of or interaction with content, e.g. set-top-box [STB]; Operations thereof
- H04N21/43—Processing of content or additional data, e.g. demultiplexing additional data from a digital video stream; Elementary client operations, e.g. monitoring of home network or synchronising decoder's clock; Client middleware
- H04N21/443—OS processes, e.g. booting an STB, implementing a Java virtual machine in an STB or power management in an STB
- H04N21/4433—Implementing client middleware, e.g. Multimedia Home Platform [MHP]
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B29—WORKING OF PLASTICS; WORKING OF SUBSTANCES IN A PLASTIC STATE IN GENERAL
- B29C—SHAPING OR JOINING OF PLASTICS; SHAPING OF MATERIAL IN A PLASTIC STATE, NOT OTHERWISE PROVIDED FOR; AFTER-TREATMENT OF THE SHAPED PRODUCTS, e.g. REPAIRING
- B29C45/00—Injection moulding, i.e. forcing the required volume of moulding material through a nozzle into a closed mould; Apparatus therefor
- B29C45/14—Injection moulding, i.e. forcing the required volume of moulding material through a nozzle into a closed mould; Apparatus therefor incorporating preformed parts or layers, e.g. injection moulding around inserts or for coating articles
- B29C45/14065—Positioning or centering articles in the mould
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B29—WORKING OF PLASTICS; WORKING OF SUBSTANCES IN A PLASTIC STATE IN GENERAL
- B29C—SHAPING OR JOINING OF PLASTICS; SHAPING OF MATERIAL IN A PLASTIC STATE, NOT OTHERWISE PROVIDED FOR; AFTER-TREATMENT OF THE SHAPED PRODUCTS, e.g. REPAIRING
- B29C45/00—Injection moulding, i.e. forcing the required volume of moulding material through a nozzle into a closed mould; Apparatus therefor
- B29C45/14—Injection moulding, i.e. forcing the required volume of moulding material through a nozzle into a closed mould; Apparatus therefor incorporating preformed parts or layers, e.g. injection moulding around inserts or for coating articles
- B29C45/14065—Positioning or centering articles in the mould
- B29C2045/14147—Positioning or centering articles in the mould using pins or needles penetrating through the insert
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- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Mechanical Engineering (AREA)
- Software Systems (AREA)
- Multimedia (AREA)
- Signal Processing (AREA)
- Small-Scale Networks (AREA)
Abstract
A home network architecture has an internal digital network, e.g. Ethernet, interconnecting devices in the home. Entertainment services are introduced into the network through network interface units 32 that are coupled to an external network. The network units perform the necessary interfacing between the internal and external networks and perform MPEG clock recovery from an MPEG video data stream. To prevent jitter when the MPEG video data stream is transmitted over the internal network, the recovered MPEG clock is locked by the network interface unit to an internal network clock and then transmitted over the internal network. Set-top electronics 40 recover the MPEG clock using the internal network clock thus enabling the video data to be generated and displayed on a television 12, for example.
Description
1 METHOD AND APPARATUS FO DATA STRE1M CIT 1 i i i i i 1 0 2359702
RECOVERING OC The present invention relates t10 multimedia digital 1 networks, and more particularly, to the recovery and locking of the clock of a video data stream received at a digital home network for conversion for use or. display by in-home products, such as televisions The rapid gains in digit technology and telecommunications have increased: he desirability of having a network in the home to int rconnect a multitude of products in the home with each oth r and to the outside world. The range of available outside services includes interactive services, cable video and audio services, satellite networks, telephone compan ices, video on demand, and other types of informatidi penetration of the personal computei United States is approximately 33 slowly, although governments desi penetration to encourage "telecommuti traffic and pollution. Further pene in the home will originate from the entertainment and informational pro, embedded computer and.operating syste user interface. Such a product is box.
i services. However, into homes in the and only growing.re more extensive. ng" and reduce road tration of computers urchase of consumer Jucts containing an i hidden by an opaque a conventional set-top Set-top boxes are multimedia co the use of televisions. A convention2 external network interface module th 1 m i i puters that augment 1 set-top box has an t connects the set- 1 2 top box to the external network and data provider. The network interface module has to perform a number of sophisticated functions, such as interfacing to a specific external network, tuning, demodulation, error correcting, video descrambling, recovery of MPEG clock, and encryption and decryption specific to the external network. Consequently, the network interface module is a relatively expensive component of set-top boxes. This expense would be necessary even when a single television is present in the house. However, most homes contain multiple televisions, and providing each with its own set-top box and associated network interface module is a duplication of expensive components.
One of the functions of network interface units is Motion Picture Experts Group (MPEG) clock recovery, MPEG-1 and MPEG-2 being different accepted standards for transmitting digitized video data. MPEG data continuous stream of data normally clocked at 27 MHz.
is a In 20 conventional arrangements, where the network interface unit is coupled by a bus to the set-top electronics, there is little or no danger of degradation of the video signal due to jitter, since a local bus will not introduce substantial jitter. In contrast, if the video data is placed onto a shared network and distributed through a hub, jitter is likely to be introduced by the home network since the video data may be buffered behind other data at certain points in the network. The higher the jitter, the more difficult.it is to recover the clock at the set-top electronics as required.
In order to provide a relatively inexpensive home multimedia network, in which MPEG data is available to 1 3 i multiple settop electronics coupled to the network, it is necessary to accurately recover th MPEG clock at the separate set-top electronics units.
An aim of the present invention s to provide a method and apparatus for accurately recov ring the MPEG clock from a stream of MPEG data, add essing the problems described above or otherwise.
According to the present inventi on there is provided a method for distributing an MPEG cl ck over an internal network by recovering an MPEG clock rom a stream of data received from an external network, comprising the steps of: recovering an MPEG related clock from a stream of MPEG twork at a network rom the stream using local clock to the de an internal clock ed to said recovered MPEG data f rom the data received from the external n interface unit; selecting a program an MPEG transport chip interface unit; direct locking a recovered MPEG related clock to prov for the internal network which is loc MPEG related clock; transmitting th network interface unit over the internal network according to the internal clock; and synthesizing the MPEG clock at a set-top electronics coupled to the Lnternal network from the MPEG data transmitted over the internal network according to the internal clock.
located i i Preferably, the step of synthes.1 zing the MPEG clock includes supplying a frequency s,nthesizer with the internal clock and with a signal i dicating receipt of MPEG data.
1 1 4 Preferably, the method comprises the further steps of providing said internal clock to the MPEG synthesizing means, providing a local oscillator signal to the MPEG synthesizing means, and adjusting said local oscillator signal in accordance with said internal clock and said signal indicating receipt of the MPEG data, thereby providing an output signal from said MPEG synthesizing means which is locked to said recovered MPEG related clock.
t Preferably, the method comprises the further steps of using said signal indicating receipt of the MPEG data to gate said internal clock to MPEG synthesizing means when MPEG data is received, providing said gated internal clock 0 the MPEG synthesizing means, providing a local oscillator signal corresponding to the MPEG clock to the MPEG synthesizing means, and adjusting said local oscillator signal in accordance with said gated internal clock, thereby providing an output signal from said MPEG synthesizing means locked to said internal clock during times when said MPEG data is received.
Preferably, the step of synthesizing the MPEG clock includes supplying a frequency synthesizer with the internal clock which is locked to said recovered MPEG related clock; and comprising the further step of using said internal clock to adjust a local oscillator signal corresponding to said MPEG clock thereby providing an output signal from said frequency synthesizer which corresponds to said MPEG clock and is locked to said recovered MPEG related clock.
4 i Preferably, the step of synthes''zing the MPEG clock includes locking the synthesized MPEG clock to data received at the set-top electroni s via the internal network only in response to a signal indicating receipt of 5 MPEG data.
Preferably, said transmitting ste comprises the steps of: providing a direct synchronous connection between the network interface unit and the setJtop electronics; and avoiding delays in accessing the 'nternal network and upsetting of clock timing included data stream by using the direct sync transmit the MPEG data to the set- top n the received MPEG ronous connection to electronics.
Preferably, the internal network is an Ethernet network, and the MPEG clock is 27 MH and the local clock is 10 MHz.
According to a second aspect of t he present invention there is provided a method for recove an MPEG clock from a stream of MP recovering an MPEG related clock from ing and distributing G data, comprising: a stream of received MPEG data at a network interface unit coupled to an external network; selecting a program from the stream using an MPEG transport chip locate within the network interface unit; direct locking a ocal clock to the recovered MPEG related clock to provi e an internal clock; transmitting the MPEG data from the n e twork interface unit to a set-top electronics coupled to 'he internal network according to the internal clock; and synthesizing the MPEG clock at the set-top electronics cou le to the internal network f rom the MPEG data and the int rnal clock.
1 6 Preferably, said transmitting step comprises the steps of: providing a direct synchronous connection between the network interface unit and the set-top electronics; and avoiding delays in accessing the internal network and upsetting of clock timing included in the received MPEG data stream by using -the direct synchronous connection to transmit the MPEG data to the set-top electronics.
Further according to the present invention there is provided an arrangement for recovering an MPEG clock from a stream of MPEG data, comprising; a network interface unit that receives an MPEG data stream from an external network and transmits MPEG data to predefined set-top electronics; the network interface unit having an MPEG clock recovery circuit for recovering the MPEG clock from the stream of MPEG data, an MPEG transport chip for selecting a program from the stream, and a frequency synthesizer for locking an internal clock to the recovered MPEG clock; and said predefined set-top electronics having a frequency synthesizer for synthesizing the MPEG clock from MPEG data clocked over the internal network according to the internal clock.
Preferably, the internal network comprises a plurality of set-top electronics, including said predefined set-top electronics, and a switching hub connecting said network interface unit to at least said predefined set-top electronics having said second frequency synthesizer; said switching hub including direct synchronous connections for connecting said network interface unit to said predefined set-top electronics for transmission of said MPEG data from said network interface unit to said predefined settop electronics for synthesizing said MPEG clock at said 7 predef ined set-top electronics, there accessing the network and upsettinc timing included in said MPEG data str by avoiding delays in of clock reference eam.
Preferably, said second frequ ncy synthesizer is connected for receiving the internal clock which is locked to said recovered MPEG clock, and further comprising a local oscillator generating a local oscillator signal corresponding to said MPEG clock and ' said local oscillator using. said int the local oscillator signal genera providing an output signal from s synthesizer which corresponds to sa-i locked to said recovered MPEG related clock.
Preferably, the arrangement furt for providing to said second freq.signal indicating receipt of the internal network by said predefined means for adjusting rnal clock to adjust ed thereby, thereby id second frequency d MPEG clock and is 1 1 er comprises: means uency synthesizer a MPEG data over the set-top electronics, and means for gating the internal lock to said second frequency synthesizer when MPEG d ta is receivedin response to said signal indicating r 1 eceipt o f the MPEG data, thereby providing an output si g nal from said second frequency synthesizer which is lock d to said internal clock during times when said MPEG da,, is received.
The present invention provides a method and apparatus for accurately recovering the MPEG cl' p ck f rom a stream of MPEG data. In certain embodiments, the MPEG clock is recovered first at a network interfa coupled to an external network. A frequency synthesizer at the network interface unit locks the recovered MPEG clock to an internal network clock, such as an Et ernet clock. As an 8 example, the MPEG clock may be 27 MHz, and the Ethernet clock may be 10 MHz. Thus, when packets of data are transmitted from the network interface unit to the set-top electronics, the packets are locked to the recovered MPEG clock at 27 MHz. At the set-top electronics end of the internal network another synthesizer regenerates the 27 MHz clock from the locked version of the clock that is sent with the data packets over the internal network.
The present invention provides the advantage of allowing transmission of MPEG video data over a relatively inexpensive home network, such as Ethernet, without incurring jitter. A further advantage of the present invention is that once the signal is locked to the recovered MPEG clock, it is easier and faster for any settop electronics unit to lock onto the signal.
For a better understanding of the invention, and to show how embodiments of the same may be carried into effect, reference will now be made, by way of example, to the accompanying diagrammatic drawings in which:
Figure 1 is a schematic block network constructed in accordance embodiment of the present invention; diagram of a home with an exemplary Figure 2 is a depiction of an exemplary installation of the home network of the present invention within a home; Figure 3 is a logical diagram of the home network of Figure 1; 4 9 Figure 4 is a schematic dep interface unit and a set-top electrc in accordance with preferred embodl invention; Figure 5 is a block diagram of a the set-top electronics constructed exemplary embodiment of the present j Figure 6 is a block diagram of, of the network interface unit cons with an embodiment of the present ini i i i i i i 1 1 1 i i i i i t s a block diagram 'f a hub and direc constructed in ction of a network nics unit constructed ments of the present network interface of n accordance with an nvention; he network interface ructed in accordance ention; Figure 7 i t circuit crossbar, accordance with an embodiment of the present invention. icoupled to a network i interface unit and a set-top electron, cs unit; and Figure 8 is a logical diagram 9f an exemplary user interface for the home network of the present invention.
Figure 1 is a schematic depiction of a home multimedia network 10 constructed in accordance 'th an embodiment of the present invention. This embodime t is exemplary only, however, as the network 10 may be col f igured in any of a number of different ways within the scope of the invention, and include different del network 10. Additionally, the invent networks located in homes, but is ap installed in other types of structur apartment buildings, etc. For purpo however, the exemplary embodiment wil context of a home installation.
ices coupled to the on is not limited to plicable to networks es, such as offices, ses of illustration, - be described in the 1 The network 10 is a digital network that provides connectivity of different types of equipment to the world outside the home. This equipment can be, for example, analog television 12, digital television 14, digital VCR 16, digital camcorder 18, personal computers 20, audio equipment 22, printers 24, facsimile machines 26, and telephones 28, among others. In addition to connecting this equipment to the outside world, the network 10 also connects the digital video, digital audio, computer and telephone equipment together internally in the home. This unifies communication and control within the home, making the full power of the external network connections or internal data sources available to any terminal on the network 10.
Communication with the outside world is performed through a number of separate network interface units (NIU's) 32 and may be combined physically in an entrance unit 30, with each network interface unit 32 permitting a connection between a different external network and the home network 10. The different external networks may carry different example, broadcast analog/digital) Other types types of signals. These may be, for signals (digital or mixed carried on hybrid fiber coax or cable.
of signals are ISDN, broadcast/digital satellite service, MC, FTTH, ADSL, and others. At least the following data types may be carried: compressed video, compressed audio, compressed internet WWW graphics and data, internet e-mail and other data, computer file data and control message data.
11 Logically all terminals in the ho equal access to the network interfac, would be unaware of the physical 1 c) number of network interface units 32 determined by the number of streain e.g. the number of different prog video, audio, and other) required S-i the number of terminal units in a hom In certain preferred embodiment television is retained unmodified regular in-home coax (plain old tE POTS (plain old telephone service) is in-home digital network 10.
The digital signals are distrit home over an internal network 34. embodiments, the internal network i e network 10 receive units 32 and a user ation of them. The that are required is required per home, ram channels (i.e., multaneously, not by cable or antenna J1 ith distribution by levision, or POTV). also carried on the uted throughout the In certain preferred 34 is essentially Ethernet of type 10base-T or 100base-T twisted pair but a special switch hub is employed to make the network scalable to any number of terminal units each able to receive high bit-rate video.
i 1 t 1:
The home network 10 connects products with embedded computers, t networking bandwidth, protocols, rou addressing. other high bandwidth p support this complex functionality m host unit either directly or via' network to achieve interoperabill computers or products the home network 10, include: the network with embedded functioning a interface un hose computers, or a can suppor e ting, buffering and roducts that do not st attach to such a a local peripheral Y. Examples of omputers located on end user devices, ts's I/0 computers 1 r_ 12 performing external network to home network conversion and conditioning; computers, such as the set-top electronics (STE); PC's; workstations; high end printers; and special computers providing gateway/control functions. Other end user devices that can be coupled to the network 10 include video products: digital compressed (MPEG) and uncompressed video equipment; digital video camcorder products; digital video tape recording products and digital tv display products and analog tv display and recording products. Audio products that can be coupled to the network 10 include: digital compressed (MPEG) and uncompressed audio equipment; HIFI stereo; digital audio tape recording products. Other types of products that can connect to the network 10 are data products, such as printers and other peripherals. Still further products that can be controlled through the network 10 include home automation and appliances: central heating/AC, security controller, microwave oven and other kitchen equipment, lighting, sprinkler and other power control.
Certain embodiments of the home network 10 include one or more local peripheral networks 15 that provide local connection for future very high bit rate, motion-JPEG or I-frame-only-MPEG, video devices, audio devices, printers and such peripherals. These devices need continuous local digital connection at a high bandwidth, where the data transfer is continuous from, for example, digital camera to digital VCR. Accommodating such devices directly on the internal network 34 would require greater network bandwidth over the entire network 34 than normally needed. Instead, the local peripheral network 15 is normally connected by gateway to the internal network 34 for interoperability. However, in certain other embodiments 1 i i 13 i of the invention, the home network 10 is provided with hardware and software that accommo ates the high speed devices so that a local periphera network 15 is not necessary.
A home automation network 17 is provided for home automation. This home automation n twork 17 may run on the power line or other low bi rate network for controlling appliances, home security systems, lighting, etc. This spur originates from a control computer 20 located within the home.
An exemplary model of the inst llation network 10 of the present invention ithin a depicted in Figure 2. The home netw6k 10 is backbone capable of up to 100m cabl from a switched hub 38 that forms network 34. In the exe mplary inst Figure 2, the entrance unit 30 with interface units 32 are located in a house, along with the switched hub 38J of the home house 36 is a long range runs, for example, art of the internal llation depicted in its multiple network utility area of the Twisted pair cable is run to each 'room of the house 36 and terminates at a wall socket. cat 5 twisted pair (for 100 Mbits/s) for example, may be!used when doing an installation, as the majority of the cost is labor. For temporary retro-installation, twisted pair cable is small enough that it may be customer fitted under a carpet edge. A user in the home will connect a c mputer product in a room by plugging the Ethernet portof the computer product to the Ethernet wall socket.
i i i i i i 1 1 1 14 In the embodiment of Figure 2, the hub 38 is depicted as a separate device, but in other embodiments the hub 38 is integrated into one or more of the network interface units 32. The hub 38 provides the connectivity to all areas of the house and the one or more network interface units 32. Upgrading, expanding both the aggregate bandwidth and connectivity of the internal network 34, is accomplished by additional plugging or changing to a larger hub. The hub will be discussed in more detail later.
The present invention, as shown in Figures 1 and 2, separates the functionality of the network interface units 32 from the set-top electronics 40. Conventionally, a set-top box contains a network interface unit whose components are internally connected by a bus to the settop electronics components. By contrast, however, the present invention provides a separation of the network interface units 32 and the set-top electronics 40, with the internal network 34 interposed therebetween. This arrangement permits multiple set-top electronics to be distributed throughout the home 36 less expensively, since the electronics of a network interface unit do not have to be duplicated for each set-top electronics. Additionally, having separate network interface units 32 coupled to different external networks and a common internal network 34 frees the homeowner from being forced to receive all programming from a single source, such as the telephone or cable company. The separation also allows the homeowner to add, drop or change services simply by changing one of the network interface units 32, without the need for replacing all of the set-top electronics 40 throughout the home 36.
0 is i 1 i In certain embodiments, a "mas provided with multiple network inter this embodiment is logically the sam the network interface units ar ter" settop box is ace units. However, as described above, as connected in this embodiment to the internal network, and not by a bus to the set-top electronics.
1 Figure 3 is a logical view of t home network 10 of the present invention. r multi-port switched hub 38 forms the connections. In certain embodim packet jitter is adequately cont ro commercially available packet switc In other preferred embodiments, such Figure 3, the switched hub 38 1 networked ports and ports that a.
switched for the duration of a se connected ports (and systems) can be network (coded) clock. To provide th.
switched hub 38 therefore comprises and inexpensive hub 42 and a direct The hub 42, in certain preferred err commercially available device, manufactured by Advanced Micro Dev.
California. Details of the direct will be described later with respec't, As apparent om the diagram, the enter of the network which inter led, a traditional, ed hub is employed. as that depicted in combination of -e direct (circuit) ssion. The direct phase locked via the _s functionality, the a relatively simple circuit crossbar 44. bodiments, may be a such as Am79C981 Lces, of Sunnyvale, circuit crossbar 44 o Figure 7.
A star topology as defined by Et ernet 10/100bas-T is 30 used in conjunction with the switching hub 38. The switching hub 38 provides fan out to most rooms in the house 36. The maximum system bandwi th is a multiple of the wire bit rate ((bit rate x numb r of ports)/2), for 1 16 example, 20 ports and 100 Mbits/s aggregate maximum bandwidth.
The switched hub 38 enables heavily asymmetric traffic, e.g. and internet data by directly transmitter to receiver. This from the internal network 3 aggregate bandwidth to be expandability of the hub 38, limited by the 10Mbits/s per technology instead of 10base-T network if required.
bit rate = 1 GbIs special treatment for the compressed digital video routing these cases from traffic is thus separated 4 and allows an overall limited only by the although it will remain branch. Use of 100base-T technology will uprate the The switching hub's direct synchronous (Manchester or block encoded) connections are used primarily for the bit rate transmission of MPEG video where a continuous, high rate, long duration connection is required. High bit video in compressed form can be as high as 8 Mbits/sec and is needed for live video and high action moviesand sports. Low bit-rate Video is 1.5 Mbits/sec. According to the present invention, MPEG digital video is retained throughout the network 10. Conversion to real video takes place only at the display device (e.g., television 12) or the set-top electronics 40.
Two separate direct circuits are depicted as examples in Figure 3. For example, the network interface unit 32 that is coupled to an ISDN network is directly connected through the direct circuit crossbar 44 to the personal computer 20 of the local peripheral network 15. Another, separate direct circuit is provided by the direct circuit crossbar 44 between a different network interface unit 32 i 17 (coupled to hybrid fiber coax, for top electronics 40 coupled to the 't devices that are not directly connec 'I circuit crossbar 44 remain attached thus networked.
With respect to the switching hu a direct point-to-point path is c traversing this path is provided dire terminal of the path, even data in other terminals. Thus, in certain a rule is followed that data multil rate data.(typically messaging) networked terminals by the end point returning such packets to the hub messages sent over the ISDN network t for a device on the local peripherareturned by the local peripheral net hub 38 for distribution. This rule complication of having a packet routE with the demultiplexing. distributed rather than centrally, and works well flow and local destination, i.e., not switches.
1 1 e An advantage of directly swit potential delays in obtaining acces (and possibly upsetting the delic timing carried in the MPEG stream) ar The hub 38, in certain prefer required to be "full-duplex aware" me routed path connects only a transmitt i i i xample) and the setelevision 12. Those ed through the direct o the hub 42 and are architecture, where onfigured, all data ctly to the end point nded for one or more re ferred embodiments, lexed with the high must be issued to of the direct path 38. For example, hat are not intended network 15 will be work host 20 to the aves the expense and r type switched hub, at the end point (s) for asymmetric data subject to layers of hed paths is that to the network 34 te clock reference 'ded altogether. avol ed embodiments, is ning that a directly r terminal "up." path 1 18 only to a receive terminal "down" path. By contrast, the path down to the transmitter and path up to the receiver are not affected by the direct circuit and would normally be attached to the network, i.e., attached to all the 5 remaining terminal paths connected together.
Specific routing occurs in response to user service requests. Messages are picked up by the hub control and any direct routing changes implemented. Devices not switched from the network connect and no routing is required.
is The MPEG clock recovery is performed at the network interface units 32, as described later. With the MPEG clock recovery at the network interface units 32, and the establishment of a direct circuit to the home network destination, jitter in the signal received at the destination (such as the television 12) is substantially eliminated. Direct circuit capability works well for the heavily asymmetric point to point traffic expected in the entertainment (video) home scenario.
For analog only services, e.g., transitional cable this is not considered part of the digital network. mixed digital/analog services such (HFC) and newer forms of mixed considered a transition TV, For as hybrid fiber coax cable TV, this i S and dealt with as system of the present al state temporary addon to the all digital invention. The signal from the hybrid fiber coax is provided directly to a set-top electronics 40 or to a network interface unit 32/set-top electronics 40 combination. Two ports are required to connect to the home network 10, one for te network interface unit 32 and 4 19 one for the set-top electronics 40., in certain preferred embodiments signals across to the audio/video ci electronics 40. i 1 A bypass is provided to link the analog rcuits of the set-top The home
network 10 is contrlled via hand held commander or computer keyboard to software running at the local terminals, such as the perso al computers 20, or set-top electronics 40. Control so tware local to each home terminal manages source,,;vailability, source selection, path management by cormunication with the network interface units 32 and ext external network protocols are buf interface units 32 to provide a stan, E=al gateways. The ered in the network dard interface to the terminals on the home network 10. igure 8 depicts one example of a user interface. In this embodiment, the home network 10 is transparent and the user is only aware of it indirectly from the number of connected services.
Figure4 is a block diagram depic interface unit 32 coupled by the int single set-top electronics unit, portions of the home network 10, in( 1 hub 38, are not shown in Figure illustration and explanation.
The network interface unit 32 ha interface modules 50 that interface! unit 32 to a particular external net of Figure 4, the network interface n interface to an external network th data. The MPEG video data is prQ network interface device 52 that pi ting a single network =al network 34 to a 0. The remaining -luding the switching 4 for purposes of 3 one or more network the network interface.work. In the example todule 50 provides an.t carries MPEG video rided to an internal,epares the data for transport over the internal network 34. In certain preferred embodiments, the internal network 34 is an Ethernet network, so that the internal network interface device 502 is an Ethernet interface device.
The architecture of the present invention assumes that for some networks a first stage demultiplexing at the network interface unit 32 is necessary to stay within a definable bandwidth limit (one stream) rather than an arbitrary bandwidth set by the construction of the incoming stream (multiple streams). Making the assumption that MPEG-2 video is being used, there is a demultiplexing from a multiple program transport stream into a single program transport, as defined in the MPEG-2 specification. This is performed by an MPEG transport chip 54, such as the 9110B chip commercially available from C-Cube. (A second stage demultiplexing to separate the video, audio and other data still occurs in the set-top electronics, while decoding is preferably only performed at the display terminal or computer.) With this approach, it is not necessary to send high bandwidth streams throughout the house and the terminals in the home 36 need see only a standardized single program interface. Compression is required for video generated in the home, e.g. security front door camera or video conference camera- All the external network interfacing, decryption, access control, demultiplexing to a single program stream, etc., is performed by the network interface module 50.
Thus, the network interface module 50 buffers the home network hardware and software from the peculiarities of the attached external network. Multiple different programs require multiple network interface crossbar connections i ovider. In provided viding to k.
21 whether from one or multiple p embodiments, a dual module is connections to the crossbar, pr received from the same external netwo The MPEG transport chip 54 per recovery and provides the recovered selected program to an internal ne The 27 MHz clock is received by synthesizer 58 and example, when the Ethernet network selected converted to a internal networ k The 10 MHz clo k, program. are provided transceiver 60 (such as an Ethernet to the internal network 34). The sy lock the Ethernet clock to the recov6 certain with two programs orms the MPEG clock 27MHz clock and the work connection 56.
an MPEG to network MHz clock, for 34 is a 10base-T as well as the to a conventional ransceiver connected thesizer 58 acts to red MPEG clock. When the packet of data is transmitte from the network interface unit 32 to the set-top elec:: ronics 40, the set top electronics 40 is locked to the t covered MPEG data at 27 MHz. At the set-top electronics 40, the 27 MHz clock is regenerated from the Ethernet 10 M,, z clock by another synthesizer.
The data is received in the set-L electronics 40 by a network interface device 62 thatincludes a network Jered by the network the network 34 is PEG synthesizer 68.
unction is performed only when there is a packet of data p esent. The 10 MHz clock is converted to a 27 MHz clock provided to an MPEG decoder 70 and a video decoder /encoder 72. The selected program is provided by the network interface 64 to the interface 64. The 10 MHz clock reco interface 64 from the data stream of gated through gate 66 to a network to Gating is needed so that the locking f i i i i 22 MPEG decoder 70, which decodes the MPEG data and provides it to the video decoder/encoder 72. The data stream is converted by the video encoder 72 to a format (e.g., NTSC or Video) suitable for use by a display device, such as a television. The video decoder is for the case (HFC) where there may be an NTSC analog signal to digitize and merge with on-board graphics hardware.
The network 34 in Figure 4 is depicted schematically, and it should be understood from the previous description that the video data may through the hub 42, but network interface unit 32 through the direct circuit is preferred to provide a data.
be placed on the network 34 that a direct circuit of the and the set-top electronics 40 crossbar 44 of the network 34 jitter free transfer of video Figure 5 is a more detailed diagram of an exemplary embodiment of the network interface device 62 of the set- top electronics 40 depicted in Figure 4. The network interface device 62 includes the network synthesizer 68 coupled to a program logic device operating as the gating device 66. The network synthesizer 68 may be implemented by a commercially available chip, such a the MC145151 manufactured by Motorola. The program logic device 66 may be implemented by a commercially available chip, such as the MC7958, also manufactured by Motorola. A voltage controlled crystal oscillator 80 operated at 27 MHz and provides its signal to the program logic device 62, which gates the 10 MHz signal to the synthesizer 68 when there is a received data packet. The synthesizer divides down the 10 MHz and 27 MHz frequencies to a common frequency which is fed into a phase detector of the synthesizer 68.
23 i i i The output of the phase detector of the synthesizer 68 is provided as a control signal to the voltage controlled crystal oscillator 80 to adjust the Local frequency up or down to lock to the incoming Ethernet frequency.
The signal informing the progra t logic device 66 of the receipt of a data packet, and e 10 MHz clock, are provided by a serial interface adap ter 82 serving as a receive enable. A commercially avail for the serial interface adapter is by Advanced Micro Devices.
The data stream is transformer/filter 84, such as one C from Pulse Engineering, the p information is also received transformer/filter 86, which can b, transformer/filter as 84. The recei to a first network transceiver 88, su Ethernet transceiver plus (AM79C100).
first network transceiver 88 (the re available to the receive enable 82 The controller 90 may be a commercial such as the single-chip Ethernet (manufactured by Advanced Micro Devic is coupled to a bus 92, such as d interconnect (PCI) bus, for providin from the network 34 to the MPEG de cc d electronics 40. i A second network transceiver 9 controller 90, and may be implemented transceiver as the first network t bble product suitable 7992B, manufactured re eived through a er ially available 68026. Collision through another the same type of ved data is provided ch as a twisted pair The output of the eived data) is made nd a controller 90.
y available product, controller Am.79C970 es). The controller peripheral component g the received. data er 70 of the set-top is coupled to the by the same type of ansceiver 88. The 1 1 24 second network transceiver 92 provides the transmit path for data from the controller 90 to the network 34 through the transformer/filter 84.
Collision information is routed through transformer/filter 86 and the second transce-Jver 92 to the controller 90.
Figure 6 is a more detailed diagram of the internal network connection 56, which has an MPEG to network synthesizer 58 that synthesizes the 10 MHz clock from the 27 MHz MPEG clock recovered by the MPEG transport chip 54 (see Figure 4). A crystal oscillator 96 is coupled to the synthesizer 58 to provide a 10 MHz signal. In certain embodiments, the crystal oscillator 96 is a 20 MHz oscillator, and the frequency generated by the synthesizer is 20 MHz, which is then simply divided to 10 MHz at the receiver (the set-top electronics 40) A commercially available synthesizer is the MC145145-2, manufactured by Motorola.
The 10 MHz clock is provided to a microprocessor interface 98, which serves as interface for a microprocessor 100. The microprocessor interface 98, with the microprocessor 100, form the transceiver 60 that connects to the internal network 34 through a transformer/filter 102. The mLcroprocessor interface 98 may be, for example, a MC68160 chip manufactured by Motorola, and the microprocessor may be a MC68EN360, also manufactured by Motorola. The transformer/filter 102 may be the same type as transformer/filters 84, 86 of Figure 5.
4 i i r The separation of the network i the sep-top electronics 40 pro advantages, as described earlier, terface unit 32 from ides a number of n that the functions (responsibilities) of the conventional set-top boxes with integrated network interface uni s are divided in embodiments of the present inventi'n. For example, in preferred embodiments, the network interface unit 32 is responsible for performing exterh 1 network specific interfacing, tuning demodulation, an provides external network specific v encrypt ion /decrypt ion (credit card n etc.). The network interface unit external network specific program guide error correction. It 1deo descrambling and _imber, user password, 32 also provides an Additionally, performs MPEG transport demultiplexing to a single stream and MPEG reference clock reco embodiments of the invention, the n provides home network Etherent -MPEG/Ethernet clock locking.
software to support the external net protocols for multiple streams and network interface unit also has the s gateway for the home network and con data as necessary.
The sep-top electronics 40 e s' application computer with audio, vid television interface, in preferred ery. In preferred twork interface unit interfacing and it also provides the ork and home network ultiple users. The ftware to act as the rol the buffering of M 1 1 tially acts as an graphic and analog embodiments. For example the settop electronics provdes the home network specific interfacing and data buffering as necessary. It provides Ethernet clock/MPEG clock ocking in preferred embodiments. The set-top electron cs 40 decodes MPEG video and audio to recover digital audio/video. It performs digital to analog conversionfor audio and video, 1 1 26 and supports commands form and infrared remote control. The settop electronics 40 provides support for analog video input (NTSC). It interfaces printers, game ports, etc., supports boot level operating system and is able to down load; a full system form an external network. The set-top electronics 40 supports application programs and communications through the network interface units to a network provider and program video server.
Figure 7 is a block diagram depiction in more det-ail an exemplary embodiment of the hub 42 and direct circuit crossbar 44 arrangement embodiment of the hub 42 and direct circuit crossbar 44 arrangement of the present invention and its connection with a network interface unit 32 and set-top electronics 40. The direct circuit crossbar 44 and 42 selectively provide either a direct circuit between a particular network interface unit 32 and a set-top electronics 40, or a simple network connection through the hub 42 for these units. In Figure 7, only portions of the network interface unit 32 and the sep-top electronics 40 are depicted, for purposes of illustration and explanation.
In preferred embodiments of the present invention, the hub 42 is a relatively simple and inexpensive hub since it does not include any sort of packet routing switch or store and forward switch. There is no intelligence that examines the traffic and dynamically switches the hub according to the transmit and receive addresses as in hubs that have packet routing switches.
Although only one network interface unit 32 and one set-top electronics 40 are shown directly connected in 27 Figure 7, any number of directly co connected by the direct circuit cros, the size of the crossbar 44, The netw and the set-top electronics 40 are pin positions or connections, each being a pair. This coincides telephone plug, the telephone RJ45, positions.
Irl wi nected pairs may be bar 44, depending on rk interface unit 32 ach shown with f ive of the connections th a conventional Which has ten pin The internal network 34 prov des the connection between the network the network intE set-top electronics 40 and the direct In preferred embodiments the internal 100base-T Ethernet.
rface units 32, the circuit crossbar 44. network 34 is 10 or The selection of a network con circuit between the network interface top electronics 40 is established by 108, which are depicted in Figure 7 to distinguish them from each oth description. In the example of interface unit 32 and the set-top e directly connected with one anothe i i 1 ection or a direct unit 32 and the seta number of with letter r in the switches suffixes f ollowing,ure 7, the network tronics 40 are to be with the network interface unit 32 transmitting da a to the set-top electronics 40. A microprocessor 110 serves as the controller for the direct circuit cro and controls the positions of the switches 108 n response to user commands that require a direct circuiit to perform. For example, a user may choose to watch movie f rom a video on demand service and therefore makes this selection on a The microprocessor 110, in response to this selection, will then change the positions of the switches 108 to establish a di rect circuit between hand-held remote control.
1 2 8 the network interface unit 32 that is connected to the external network that carries the video on demand service, and the set-top electronics 40 that is coupled to the television receiver on which the user desires to view the movie.
In this case, switch 108a is moved to its illustrated position to connect the transmit lines of transceiver 88 of the network interface unit 32 to line 112 of the direct 10 circuit crossbar 44. The transmit lines of transceiver 88 are no longer connected to the network at the Txl port of the hub 42. Similarly, the receive lines of the transceiver 92 of the settop electronics 40 are connected through switch 108g to the same line 112 of the direct 15 circuit crossbar 44. With this direct circuit now established, data entering the home through the network network via to the set- interface unit 32 is not broadcast over the the hub 42, but instead is provided directly top electronics 40 at the location where the data will be used.
Although the direct circuit established by -the direct circuit crossbar 44 provides an excellent pathway for data form the network interface unit 32 to the set=top electronics 40, it may occur that not all of the data coming into the network interface unit 32 is meant for the set-top electronics 40. For example, it is possible that e-mail is received over this particular network interface unit 32, and the homeowner wants e-mail to be directed to a personal computer, and not to a television. However, there is no connection to the network 34 once a direct circuit is established.
4 29 i i To solve this problem, the s examines the addresses of the data performs a routing function for data this set-top electronics 40. The da set-top electronics 40 onto the net 42. This re-routing by the end poin top electronics 40 in this example the system to use an expensive ani The set- top electronics 40 has a m associated memory 122 to identify packets back to the network 34.
i i t-top electronics ackets it receives that is not meant ta is re-routed by rk 34 through the t connection (the setavoids the need f or complicated router.
icroprocessor 120 and and route the data and for the hub The direct circuit between the 7etwork interface unit 32 and the set-top electronics 40 provides a jitter-free connection for video data, but the re-routing of other data into the network 34 through th hub allows more than one type of data to be carried ii to the home by the network interface unite 32.
between a network interface unit electronics unit 40 is established, required by the set-top electronic transmit to the hub 42. The set-top to learn of collisions and re-tran network 34 if such collisions o interface unit 32 can be set, in ce disable collisions because they cann One the direct circuit 32 and a set-top ollision detection is to allow it to electronics 40 needs I mit the data to the cur. The network Ftain embodiments, to t occur on the direct circuit. However, in certain embo iments, in both the network interface unit port and th port (to the network 34 through the c 30 collision pair is included for conven settop electronics rossbar 44), the same ience.
In certain preferred embodimen s, one of the five pairs of wires is available to provide picture-in-picture capability for the system. For example, the network interface unit 32 may provide a second stream of data through another transceiver 88a over a second pair of transmit wires onto a senarate crossbar connection line 114. The set-top electronics 40, which has another transceiver 88a also connected to line 114, receives this second stream of data through the direct circuit to provide a picture-in-picture on a television Thus, both pictures may be provided without 10 separate direct circuits.
screen.
j itter by In certain preferred embodiments of the present invention, the crossbar switches 108 are implemented by an analog MOS array of transistors, controlled in response to signals from the controller 110. This is exemplary only, however, as other embodiments employ switches of different design, as appreciated by one of ordinary skill in the art.
Although the description of the invention depicts the arrangement with certain logical distinctions o 'L the functionality of various elements, these logical distinctions may be different in other embodiments.
example, the hub 42 is described as connected to internal network. However, the hub 42 may also logically considered as part of the internal network, or even forming the network, with the remaining wiring forming means for attaching end terminals to the hub 42. One of ordinary skill in the art, therefore, will appreciate that the logical distinctions depicted and described in the present specification are only exemplary.
For the be 31 The separation of the network in set-top electronics according to t provides a relatively inexpensiVE multitude of devices to each other wi 5 the outside world.
Although the present invention h illustrated in detail, it is clearly same is by way of illustration and ex 10 to be taken by way of limitation, the terface unit and the e present invention connection of a hin the home, and to as been described an understood that the ample only and is not scope of the present invention being limited only by the erms of the appended claims.
The reader's attention is direct documents which are filed concurrentl this specification in connection with which are open to public specification, and the contents of documents are incorporated herein by d to all papers and with or previous to this application and inspection with this all such papers and eference.
T All of the features disclosed i this specification (including any accompanying cla ms, abstract and drawings), and/or all of the step of any method or in any combination, except combinations where at least s ome of such features and/or steps are mutually exclusive.
Each feature disclosed in 'this specification (including any accompanying cla' ms, abstract and drawings), may be replaced by alternaiive features serving the same, equivalent or similar purp se, unless expressly stated otherwise. Thus, unless expres ly stated otherwise, process so disclosed, may be combine 32 each feature disclosed is one example only of a generi series of equivalent or similar features.
The invention is not restricted to the details of the foregoing embodiment (s). The invention extend to any novel one, or any novel combination, of the features disclosed in this specification (including any accompanying claims, abstract and drawings), or to any novel one, or any novel combination, of the steps of any method or process so 10 disclosed.
1
Claims (16)
- 33 1. A method for distributing an MPEG clock over an internal network by recovering an MPEG clock from a stream of data received from an external network, comprising the steps of:recovering an MPEG related clock from a stream of MPEG data received from the external network at a network interface unit; selecting a program from the stream using an MPEG transport chip located within the network interface unit; direct locking a local clock to the recovered MPEG related clock to provide an internal clock for the internal network which is locked to said recovered MPEG.related clock; transmitting the MPEG data from the network interface unit over the internal network according to the internal clock; and synthesizing the MPEG clock at a set-top electronics coupled to the internal network from the MPEG data transmitted over the internal network according to the internal clock.
- 2. The method of claim 1, wherein the step of synthesizing the MPEG clock includes supplying a frequency synthesizer with the internal clock and with a signal indicating receipt of MPEG data.34
- 3. The method according to claim 2, comprising the further steps of providing said internal clock to the MPEG synthesizing means, providing a local oscillator signal to the MPEG synthesizing means, and adjusting said local oscillator signal in accordance with said internal clock and said signal indicating receipt of the MPEG data, thereby providing an output signal from said MPEG synthesizing means which is locked to said recovered MPEG related clock.
- 4. The method according to claim 2, comprising the further steps of using said signal indicating receipt of the MPEG data to gate said internal clock to MPEG synthesizing means when MPEG data is received, providing said gated internal clock to the MPEG synthesizing means, providing a local oscillator signal corresponding to the MPEG clock to the MPEG synthesizing means, and adjusting said local oscillator signal in accordance with said gated internal clock, thereby providing an output signal from said MPEG synthesizing means locked to said internal clock during times when said MPEG data is received.
- 5. The method according to claim 1, wherein the step of synthesizing the MPEG clock includes supplying a frequency synthesizer with the internal clock which is locked to said recovered MPEG related clock; and comprising the further step of using said internal clock to adjust a local oscillator signal corresponding to said MPEG clock thereby providing an output signal from said frequency synthesizer which corresponds to said MPEG clock and is locked to said recovered MPEG related clock.A C
- 6. The method of claim 1, wherein the step of synthesizing the MPEG clock includes locking the synthesized MPEG clock to data received at the set-top electronics via the internal network only in response to a signal indicating receipt of MPEG data.
- 7. The method according to any of claims 1 to 6, wherein said transmitting step comprises the steps of:providing a direct synchronous connection between the network interface unit and the set-top electronics; and avoiding delays in accessing the internal network and upsetting of clock timing included in the received MPEG data stream by using the direct synchronous connection to t ransmit the MPEG data to the set-top electronics.
- 8. The method of any of claims 1 to 7, wherein the internal network is an Ethernet network, and theMPEG clock is 27 MHz and the local clock is 10 MHz.
- 9. A method for recovering and distributing an MPEG clock from a stream of MPEG data, comprising:recovering an MPEG related clock from a stream of received MPEG data at a network interface unit coupled to an external network; selecting a program from the stream using an MPEG transport chip located within the network interface unit; direct locking a local clock to the recovered MPEG related clock to provide an internal clock; A 36 transmitting the MPEG data from the network interface unit to a set-top electronics coupled to the internal network according to the internal clock; and synthesizing the MPEG clock at the set-top electronics coupled to the internal network from the MPEG data and the internal clock.
- 10. The method according to claim 9, wherein said transmitting step comprises the steps of:providing a direct synchronous connection between the network interface unit and the set-top electronics; and avoiding delays in accessing the internal network and upsetting of clock timing included in the received MPEG data stream by using the direct synchronous connection to transmit the MPEG data to the set-top electronics.
- 11. An arrangement for recovering an MPEG clock from a stream of MPEG data, comprising; a network interface unit that receives an MPEG data stream from an external network and transmits MPEG data to predefined settop electronics; the network interface unit having an MPEG clock recovery circuit for recovering the MPEG clock from the stream of MPEG data, an MPEG transport chip for selecting a program from the stream, and a frequency synthesizer for locking an internal clock to the recovered MPEG clock; and said predefined set-top electronics having a frequency synthesizer for synthesizing the MPEG clock from MPEG data clocked over the internal network according to the internal clock.
- 12. The arrangement according to claim 10, wherein the internal network comprises a plurality of set-top electronics, including said predefined set-top electronics, and a switching hub connecting said network interface unit to at least said predefined set-top electroni.cs having said second frequency synthesizer; said switching hub including direct synchronous connections for connecting said network interface unit to said predefined settop electronics for transmission of said MPEG data from said network interface unit to said predefined set-top electronics for synthesizing said MPEG clock at said predefined set-top electronics, thereby avoiding delays in accessing the network and upsetting of clock reference timing included in said MPEG data stream.
- 13. The arrangement according to claim 11 or 12, wherein said second frequency synthesizer is connected for receiving the internal clock which is locked to said recovered MPEG clock,. and further comprising a local oscillator generating a local oscillator signal corresponding to said MPEG clock and means for adjusting said local oscillator using said internal clock to adjust the local oscillator signal generated thereby, thereby providing an output signal from 1 38 said second frequency synthesizer which corresponds to said MPEG clock and is locked to said recovered MPEG related clock.
- 14.comprising The arrangement according to claim 13 further means for providing to said second frequency synthesizer a signal indicating receipt of the MPEG data over the internal network by said predefined set-top electronics, and means for gating the internal clock to said second frequency synthesizer when MPEG data is received in response to said signal indicating receipt of the MPEG data, thereby providing an output signal from said second frequency synthesizer which is locked to said internal clock during times when said MPEG data is received.
- is. A method for distributing an MPEG clock over an internal network by recovering an MPEG clock from a stream of data received from an external network, substantially as hereinbefore described with reference to the drawings.
- 16. An arrangement for recovering an MPEG clock from a stream of MPEG data, substantially as hereinbefore described with reference to the accompanying drawings.
Applications Claiming Priority (1)
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| US56153599A | 1999-02-26 | 1999-02-26 |
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| GB2359702A true GB2359702A (en) | 2001-08-29 |
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| GB0004348A Withdrawn GB2359702A (en) | 1999-02-26 | 2000-02-25 | Recovering and distributing an MPEG data stream clock |
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| EP1439699A1 (en) * | 2002-12-19 | 2004-07-21 | ABB Research Ltd | Arrangement for distributing digital video program information |
| US7801183B2 (en) | 2006-06-13 | 2010-09-21 | Imagine Communications Ltd. | Synchronous transmission over packet based network |
| WO2010111616A1 (en) * | 2009-03-26 | 2010-09-30 | Panduit Corp. | Physical layer management for interconnect configurations using rfid chip technology |
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| WO1997019554A1 (en) * | 1995-11-22 | 1997-05-29 | Samsung Information Systems America | Method and apparatus for recovering the clock of mpeg signals |
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| JPH09261241A (en) * | 1996-03-27 | 1997-10-03 | Oki Electric Ind Co Ltd | Variable speed data receiver, clock restoration device and variable speed data transmitter |
| KR0180501B1 (en) * | 1996-06-25 | 1999-05-01 | 김주용 | MPEG-2 transport stream packet detection device and method thereof |
| US6026080A (en) * | 1997-04-29 | 2000-02-15 | At&T Corporation | Method for providing enhanced H.321-based multimedia conferencing services over the ATM wide area network |
| JP3642180B2 (en) * | 1998-04-24 | 2005-04-27 | 三菱電機株式会社 | Clock regenerator |
-
2000
- 2000-02-24 KR KR1020000009034A patent/KR20010006688A/en not_active Ceased
- 2000-02-25 GB GB0004348A patent/GB2359702A/en not_active Withdrawn
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO1997019554A1 (en) * | 1995-11-22 | 1997-05-29 | Samsung Information Systems America | Method and apparatus for recovering the clock of mpeg signals |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP1439699A1 (en) * | 2002-12-19 | 2004-07-21 | ABB Research Ltd | Arrangement for distributing digital video program information |
| US7801183B2 (en) | 2006-06-13 | 2010-09-21 | Imagine Communications Ltd. | Synchronous transmission over packet based network |
| WO2010111616A1 (en) * | 2009-03-26 | 2010-09-30 | Panduit Corp. | Physical layer management for interconnect configurations using rfid chip technology |
| US8686870B2 (en) | 2009-03-26 | 2014-04-01 | Panduit Corp. | Physical layer management for interconnect configurations using RFID chip technology |
Also Published As
| Publication number | Publication date |
|---|---|
| KR20010006688A (en) | 2001-01-26 |
| GB0004348D0 (en) | 2000-04-12 |
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