GB2223949A - Apparatus for functional electrical stimulation - Google Patents

Abstract

In a two channel functional electrical stimulator, each channel has a transformer T1, T2, receiving high frequency pulses from a common HF generator IC2 according to a low frequency gating generator IC1. Two manually-operated switches are effectively connected to generator IC1 via sockets SO3, SO4, for ON/OFF control of the channels and are associated with ramp circuits R18/DI1/R8/C11 and R16/DI2/R9/C12 so that the output signal from each channel is switched between ON and OFF in a ramp manner. A three-position mode-control switch SW2 is also effectively connected to generator IC1 to establish three different output conditions of generator IC1 and when switch SW2 is switched between modes the ramp circuits R18/CI1/R8/C11 and R16/DI2/R9/C12 impose a ramp response on the output signal from each channel whilst time delay circuits C1/R6 and C1/R20 provide a time delay in implementation of the ramp response. The pulse frequencies of generators IC1 and IC2 are variable. <IMAGE>

Description

APPARATUS FOR FUNCTIONAL ELECTRICAL STIMULATION This invention relates to apparatus for functional electrical stimulation.

Functional electrical stimulation (FES) involves the application of an electrical charge to human tissue in order to elicit movement of one or more skeletal joints.

FES therapy is known and has found application in the treatment of opinal injuries as a result of which improvements in the rehabilitation process have been achieved eg. restoration of posture and limited forms of walking. FES is also a useful therapy for patients suffering from strokes, cerebral palsy and hemiplegia.

It is an objection of the present invention to provide a new and improved form of FES apparatus.

According to the present invention apparatus for functional electrical stimulation comprises a battery operated electrical circuit having first and second transformer operated output channels adapted to be connected to a patient to be treated, each transformer being driven by a gated high frequency pulse generator which is coupled to the output of a low frequency pulse generator, manually-operable control means being connected to said low frequency pulse generator and being arranged in a first control mode to inhibit output from each of said output channels, in a second control mode to establish output alternatively from said first and second output channels, and in a third control mode to establish simultaneous output from said first and second output channels, each said output being a train of high frequency pulses established by each low frequency pulse.

Preferably said control means comprises means operable on mode switching for incrementing or decrementing the amplitude of the pulses output by the output channels over a predetermined time interval for the purpose of graduating the change in output from said output channels.

Preferably said control means comprises means operable on switching from said first mode to delay for a predetermined time interval establishment of output from said output channels. Preferably also said high frequency pulse generator provides a train of three pulses for each gating pulse received from said low frequency generator.

Preferably also said low frequency pulse generator is variable in frequency output in the range 5-50Hz.

Preferably also said high frequency pulse generator is variable in amplitude to provide each output channel with a current in the range 0-150mA.

An embodiment of the present invention will now be described by way of example with reference to the accompanying drawings, in which: Fig. 1 is a circuit diagram of apparatus in accordance with the present invention; Fig. 2 generally illustrates waveforms occurring in the Fig. 1 apparatus; Fig. 3 is a simiplified version of the Fig. 1 circuit diagram when operating in one of its modes; and Fig. 4 illustrates the nature of the voltage waveform at various points in Fig. 3.

As is shown in circuit diagram form in Fig. 1 of the drawings apparatus for functional electrical stimulation comprises a circuit 10 which is operated by two 9v batteries of the PP3 type connected to a main ON/OFF switch SW1. Circuit 10 has two output channels respectively operated by transformers T1, T2 and provided with sockets SOl, S02 for connection of electrodes (not shown) to interface the circuit 10 with a patient.

The transformers T1, T2 are driven by power mosfet amplifiers IRF1, IRF2 respectively connected to junctions Junction 11A is connected via diode clamp D8, D9 to the output terminal 9 of integrated circuit IC2 which is of the 556 type and functions as a high frequency pulse generator gated by signals received at terminal 6 to produce for each received signal a train of three output pulses. Junction liB is similarly connected via diode clamp D10, D11. The amplitude of the pulses output by IC2 is adjustable by variable resistor RT2 which is connected via dropper resistor R15 to the stabilised voltage established by Zener diode DZ3 from the battery supply.

Junctions llA, liB in addition to being respectively connected to externally operable ON/OFF switches via sockets S03, S04 for ON/OFF control of the output channels are also connected to junctions 12A, 12B via ramp circuits R18/DI1/R8/C11, R16/DI2/R9/C12 respectively, which function as will be explained. Junctions 12A, 12B are either fed in common via diodes D2, D5 from terminal 8 of integrated circuit IC1 which is of the 40106 type or are fed alternatively via diodes D1, D4 from terminals 4, 10 respectively. IC1 is essentially a low frequency pulse generator the output of which is delivered at terminal 6, connected to terminal 6 of IC2, but terminals 4, 8 and 10 provide ON/OFF d.c. voltage levels depending upon the setting of manually operable mode-control switch SW2.When the common output terminals (C,C) of switch SW2 are connected to terminals 2,2 (the sit mode) the output levels at terminals 4, 8 and 10 are zero. When common output terminals (C,C) are connected to terminals 3,3 (the continuous mode) the output levels at terminals 4, 10 are zero and the output at terminal 8 is high. When common output terminals #C,C) are connected to terminals 1,1 of switch SW2 (the exercise mode) the output at terminal 8 of IC1 is zero and the outputs at terminals 4, 10 alternate to high for 4 second time intervals. When the switch SW2 is switched between modes the ramp circuits Rl8/DIl/R8/Cll, R16/DI2/R9/C12 impose a ramp response on the d.c. voltage level at junctions llA, liB respectively each ramp having a 4 second duration and R8, R9 being large valued resistors.

Additionally when switch SW2 is switched out of the sit mode into continuous mode components C1/R6 provide a 4 second time delay before operation of the continuous mode and when SW2 is operated in the reverse direction components C1/R20 provide the same delay before operation of the sit mode so that the voltage level at junctions 12A, 12B either takes 4 seconds to go high or 4 seconds to go low.

The pulse frequency at terminal 6 of circuit IC1 is variable according to the setting of variable resistor RT1 and is adjustable between 5 and 50Hz.

In operation of circuit 10 ICI is free running in so far as terminal 6 continuously delivers low frequency pulses to 1C2 which likewise is free running and for each received pulse outputs at terminal 9 a train of three pulses of the type shown in Fig. 2 ie. the three pulses are each 100As in duration, separated by 50#s and reappear each 40mS (with the circuit ICl set at 25Hz). These three high frequency pulses are applied to the primary windings of transformers T1, T2 depending upon the d.c. voltage level applied to junctions llA, 11B which essentially is set by the levels of junctions 12A, 12B respectively. When junctions 12A, 12B are high the pulses from IC2 are effectively applied via amplifiers IRFI, IRF2 to transformers T1, T2 respectively and the ceiling levels for the transferred pulses is adjustably set by RP1, RP2, which set the voltage clamping levels for the diode clamps D8/D9, D1O/D11. Components RP1, RP2 are under user control and have a voltage limit set by RT2 which is not user set. (Likewise RT1 is not user set).

More particularly, and with reference to Figs. 3 and 4, when switch SW2 is switched from the sit mode to the exercise mode the voltage at terminal 8 of IC1 is zero so that diodes D2 and D5 are off and junctions 12A, 12B are fed by diodes D1 and D4. This is the simplified circuit of Fig. 3.

IC1 includes invertors between terminal pairs 1/2, 10/11 and 12/13 which are connected to their external components as shown in Fig. 3. The invertor connected to R3/R4/C4 forms a very low frequency generator operating about 1/8Hz which drives the two branch circuits leading to junctions 12A, 12B. Fig. 4 shows the voltage waveforms occurring in the Fig. 3 circuit where V12 is the waveform at terminal 12 of IC1 V 4 is the waveform at terminal 4 of IC1 V10 is the waveform at terminal 10 of IC1 VilA is the waveform at junction 11A VllB is the waveform at junction 11B Where switch SW2 is switched from the sit mode to the exercise mode at time t=0.

Initially C5 is discharged so that V4 is zero but the voltage on capacitcr C12 is high. Voltage V4 therefore goes high after a delay of about 3 seconds caused by R5/C5 so that the voltage at junction 11A ramps up. When V12 goes low voltage V4 goes low after a delay of about 0.5 secs caused by R21/R5/D12/C5 resulting in ViiA ramping to zero.

Component R21 controls the pulse width of voltage V4.

In the other branch of the circuit when V12 is high V10 is zero. When V12 goes low V10 goes high after a 3 second delay caused by components R7/C2. When V12 goes high again, V10 goes low after about 0.5 secs delay caused by R22/R7/D13/C2. Component R22 controls the pulse width of voltage V10.

The waveform of VllB is almost the same at ViiA but they are alternately ramped up and down and depend not only on the envelope of the up/down ramp waveform but also on the high frequency generator output of IC2.

Because the voltage on capacitor C4 is zero at the beginning of the exercise mode its initial charging through R3 and R4 takes longer than later when the very low frequency generator is in the exercise mode and the lowest C4 voltage is the threshold voltage of the IC1 invertor at terminals 12/13 so that the first pulse width of V12 is greater than the succeeding pulses. The first pulse of V4 and V11A is also greater than succeeding pulses.

By virtue of the use of high frequency pulses provided by 1C2 transformers Ti, T2 can be both physically small and low in weight which enables the apparatus to by lightweight and compact; typically of weight in the range 8-12 ounces and having dimensions of 74x150x30 mm (including the PP3 batteries). The circuit is inexpensive to manufacture and because it is analogue in function is easily adjusted both by the user and by the clinical technician. The consumed power in the circuit is very low resulting in infrequent battery charging or changing and LED indicators DL1 DL2 connected in the output channels provide a visual indication of operation of the circuit to the user.

Claims (7)

1. Apparatus for functional electrical stimulation comprises a battery operated electrical circuit having first and second transformer operated output channels adapted to be connected to a patient to be treated, each transformer being driven by a gated high frequency pulse generator which is coupled to the output of a low frequency pulse generator, manually-operable control means being connected to said low frequency pulse generator and being arranged in a first control mode to inhibit output from each of said output channels, in a second control mode to establish output alternatively from said first and second output channels, and in a third control mode to establish simultaneous output from said first and second output channels, each said output being a train of high frequency pulses established by each low frequency pulse.

2. Apparatus as claimed in claim 1, wherein said control means comprises means operable on mode switching for incrementing or decrementing the amplitude of the pulses output by the output channels over a predetermined time interval for the purpose of graduating the change in output from said output channels.

3. Apparatus as claimed in either preceding claim, wherein said control means comprises means operable on switching from said first mode to delay for a predetermined time interval establishment of output from said output channels.

4. Apparatus as claimed in any preceding claim, wherein said high frequency pulse generator provides a train of three pulses for each gating pulse received from said low frequency generator.

5. Apparatus as claimed in any preceding claim, wherein said low frequency pulse generator is variable in frequency output in the range 5-50Hz.

6. Apparatus as claimed in any preceding claim, wherein said high frequency pulse generator is variable in amplitude to provide each output channel with a current in the range 0-l50mA.

7. Apparatus as claimed in claim 1, and substantially as hereinbefore described with reference to Figs. 1-4 of the accompanying drawings.