GB2222720A

GB2222720A - Opto-electronic devices

Info

Publication number: GB2222720A
Application number: GB8821304A
Authority: GB
Inventors: George Richard Antell; Peirs James Geoffrey Dawe; David Alan Hugh Spear
Original assignee: STC PLC
Current assignee: STC PLC
Priority date: 1988-09-12
Filing date: 1988-09-12
Publication date: 1990-03-14
Anticipated expiration: 2008-09-12
Also published as: GB8821304D0; GB2222720B

Abstract

In an opto-electronic integrated circuit, the optical devices are disposed each in a respective recess in a common semiconductor substrate. The dimensions of the optical devices are such that a substantially planar surface is provided. This facilitates processing of the circuit. <IMAGE>

Description

OPTO-ELECTRONIC DEVICES.

This invention relates to integrated circuits incorporating both electronic and optical elements on a common semiconductor substrate. The invention also relates to a method of fabricating such structure.

There is increasing interest in circuit devices which incorporate both electronic and optical elements on a common substrate chip. However, the introduction of such devices has been restricted by difficulties in manufacture arising from the differing requirements of the two types of element. In particular, electronic elements are generally about 0.5 microns in thickness whereas optical elements, e.g. photodiodes, typically require a thickness of 3 to 4 microns. This larger thickness is necessary as the absorption length of the wavelengths of about 1.55 microns generally employed is about 2 microns, the photodiode being illuminated from above or below. This thickness difference has, by necessitating a non-plasma structure, presented severe technical difficulties in manufacture.

The object of the invention is to minimise or to overcome this disadvantage.

According to the invention there is provided an integrated circuit device incorporating both electronic and optical elements disposed on a common semiconductor substrate, the optical elements being located each in a repetitive recess in the substrate whereby a structure having a substantially planar surface is provided.

According to the invention there is further provided a method of fabricating an integrated circuit device incorporating both optical and electronic elements, the method including providing a semiconductor substrate having one or more recesses in a major surface thereof, providing optical elements one in each recess, and providing electronic elements on the non-recessed part of said surface, the thickness of each optical element being such as to provide a substantially planar structure.

By providing a structure in which the surface of each optical element is substantially coplanar with the electronic part of the structure, the manufacturing problems inherent in a conventional non-planar structure are overcome.

An embodiment of the invention will now be described with reference to the accompanying drawings in which Figures 1 to 4 illustrate in schematic form successive stages in the fabrication of an opto-electronic integrated circuit.

Referring to the drawings, a semiconductor substrate 11 (Figure 1), typically of indium phosphide, is masked and etched to define recesses 12 in those positions at which optical elements, e.g. photodiodes, are to be formed. A first set of (typically four) epitaxial layers 13 (Figure 2) is then grown over the entire substrate surface including the recess 12. A further set (typically four) of expitaxial layer 14 is grown over the entire structure. The first set of expitaxial layers will ultimately provide electronic devices i.e. field effect transistors, whilst the said set of layers 14 is adapted to provide optical devices.

The lowest of the second layers 14 should be an n -type layer whereby to provide a back contact for the optical devices. Preferably the structure is provided with a cap layer 15.

Referring now to Figure 3, a photo lithographic mask 16 is applied to the structure to mask out each optical element. The structure is then etched to remove the second expitaxial layer from the unmasked regions to provide a substantially planar structure (Figure 4) in which each optical device mesa 17 disposed in its recess 13 has an upper surface in the plane of the surrounding electronic circuit structure.

In order to provide isolation of the optical elements, the mask is so configured that the etching process provides a trench 18 surrounding each mesa.

Typically this trench is about 3 microns in width and is thus narrow enough to be filled by photoresist or ployimide to provide a smooth overall structure. The structure may then be further proceeded by conventional techniques to provide field effect transistors in the first epitaxial layers 13 and photodiodes in the mesa 17.

In this further processing, metal contacts may be applied simultaneously to both types of devices. The p- and n-contacts may be defined using Ti/Pt/An and AnGe/Ni/An respectively. Mesa etching is used to isolate the field effect transistors of the structure and, where appropriate, to define integrated resistors which may comprise transistor channel material. Finally, a silicon nitride antireflective coating may be applied and low capacitance interconnection formed using polyimide insulator and Ti/An second level metal.

The structure described above is of particular application as a receiver 'front end' in an optical transmission system. It will however be appreciated that the structure can also be employed in other optoelectronic applications.

Claims

CLAIMS.

1. An integrated circuit device incorporating both electronic and optical elements disposed on a common semiconductor substrate, the optical elements being located each in a respective recess in the substrate whereby a structure having a substantially planar surface is provided.

2. An integrated circuit device as claimed in claim 1, wherein each optical element comprises a mesa structure disposed in a said recess, the sides of the mesa being isolated from the substrate.

3. An integrated circuit device as claimed in claim 1 or 2, wherein each said optical element comprises a photodiode.

4. An integrated circuit device as claimed in claim 1, 2 or 3, wherein said substrate comprises indium phosphide.

5. An integrated circuit device substantially as described herein with reference to and as shown on the accompanying drawings.

6. A method of fabricating an integrated circuit device incorporating both optical and electronic elements, the method including providing a semiconductor substrate having one or more recesses in a major surface thereof, providing optical elements one in each recess, and providing electronic elements on the non-recessed part of said surface, the thickness of each optical element being such as to provide a substantially planar structure.

7. A method as claimed in claim 6, wherein said optical elements are formed from a multilayer structure applied to the entire substrate surface and subsequently selectively etched to remove that multilayer structure for the non-recessed part of the substrate surface.

8. A method of fabricating an integrated circuit device substantially as described herein with reference to and as shown in the accompanying drawings.

9. An optical communication system provided with one or more integrated circuit devices as claimed in any one of claims 1 to 5.