GB2218881A

GB2218881A - Graphics control planes

Info

Publication number: GB2218881A
Application number: GB8908522A
Authority: GB
Inventors: Bruce S Borden; Tom Diede; Rodney Stock
Original assignee: Ardent Computer Corp
Current assignee: Ardent Computer Corp
Priority date: 1988-05-16
Filing date: 1989-04-14
Publication date: 1989-11-22
Anticipated expiration: 2009-04-14
Also published as: GB8908522D0; JPH0250720A; GB2218881B; DE3915439A1; IL90221A0; AU3308989A; FR2631474A1

Description

1 1 U 8 8 1 GRAPHICS CONTROL PLANES RACKGROUNT) OP THE INVENTION

1. Field of the Invention. '

The present invention relates to the field of graphics processing and computer systems and, more specifically, to the field of control planes for controlling presentation of pixel color information to a display.

2. Prior Art.

Control planes in graphics processing computer systems typically provide for the presentation of color graphics information to a display. The display is comprised of a number of independently selectable pixels. The control planes provide color information for each of the pixel locations of the display. in known systems, the control planes comprise a plurality of frame buffers. Typically, two frame buffers are provided. A first buffer may be utilized for writing of the display while a second buffer is being modified by the computer system for later display. It is known to provide such a double buffering technique on a screen-by-screen basis.

However, it is desired to provide such buffering in a computer which allows display of windows of information. Such a computer system typically provides for display of plurality of logically independent windows. In such a system, it would be useful to allow for selection of a frame buffer on a window-by-window basis.

Known graphics computer systems allow for the use of either pseudo-color codes or true color codes for presentation of color information to a display. True color codes are utilized to present red-green-blue (RGB) color information to a display. True color codes comprise three pluralities of bits, a first plurality of bits representing the intensity of the red color beam of the display, a second plurality of bits representing-the intensity of the green color beam of the display and a third plurality of bits representing the intensity of the blue color beam of the display.. Typically, each of these plurality of bits may comprise eight bits for a total of 24 bits of color information.

Many known systems provide for pseudo-color codes. Typically, pseudocolor codes comprise a plurality of bits which are utilized as inputs to a color look-up table. The color lo6k-up table provides as out puts either a true color code or an actual RGB color signal. The pseudo-color - code typically comprises a smaller number of bits than required for true color codes, allowing for a resulting savings in required memory space. In many known systems, the number of bits utilized by a pseudo-color code is variable and typically the code may comprise eight, ten or twelve bits of color information.

Although use of pseudo-color codes yields a savings in required memory space, typically use of true color codes provides for better color resolution and truer color. Therefore, know graphics computer systems allow for the color mode to be switched from screen to screen between true color mode and pseudo-color mode.

However, it is desired to allow switching between color modes in a computer system which allows display of windows of information and to allow for display for one 4 1W k window utilizing true-color mode and a second window utilizing pseudo-color mode.

1RUNMARY OF THE INVENTION The present invention relates to the field of control planes utilized in graphics computer systems for controlling the presentation of color information to a display. The present invention is particularly,useful in a computer system utilizing a plurality of logical windows on its display. The present invention is useful in providing for switching of color modes, between a true color mode and a pseudo-color mode, allowing a first logical window to utilize true color mode and a second logical window to utilize pseudo-color mode. The computer system of the present invention utilizes a plurality of logical buffers for storing pixel color information. A first buffer may be utilized for providing color information to a display while a second buffer is being updated with color information for later display. The present invention is useful for allowing selection of a buffer for display, and likewise selection of a buffer for updating, on a logical window-by- window basis.

The present invention, in one configuration, comprises a memory buffer having a first plurality of data bits, a second plurality of data bits and a third plurality of data bits for each pixel location on a display. The memory buffer further has a plurality of control bits for controlling logical groups of pixels on the display. The control bits control whether data bits are interpreted as representing color in true color mode or in pseudo-color mode. Further, the control bits are used for controlling which one of two buffers is used to obtain color information for display. In this first configuration, the Z present invention is capable of supporting double buffering in pseudo- color mode.

The present invention, in a second configuration, comprises additional memory buffers for supporting double buffering in true color rpOde.

These and other aspects of the present invention will be further described in connection with the detailed description set forth below and the figures.

BRTRr DESCMPTTON nr TIF, DRAWTN(;.1 Figure 1 is a block diagram illustrating the memory buffers of the present invention.

Figure 2 is an Illustration of a display device as may be utilized in conjunction with the present Invention.

Figure 3 is a flow chart illustrating a method 6f 10 present invention.

Figure 4 is a block diagram of a color look-up tabl memory as may be utilized by the present invention.

Figure 5 is a block diagram of a gamma correction circuit as may be utilized by the present invention.

_x 1 1 - 7 DETAILED DESCRTMON Or THE PRESENT TNVENTION An apparatus and method for controlling presentation of pixel information to a display is described. In the following description, numerous specific details are set forth such as number of bits, etc. in order to provide a thorough understanding of the present invention. It will be obvious, however, to one skilled in the art that the present invention may be practiced without these specific details. in other instances well known circuits and structures have not been shown in detail in order not to unneccessarily obscure the present invention.

The present invention is utilized in computer systems which support color displays and, more particularly, in computer systems which support color displays and windowing environments. Typically, such computer systems allow display of a number of logically independently windows of information on a single physical display. In such a system, it is desirable to control color-information on a window-by-window basis rather than on a screen-by-screen basis. Many such computer systems support either a true color mode or a pseudo-color mode. In a true color mode bits are'stored for each pixel on the display representative of the color of the pixel. In the preferred embodiment, true color mode utilizes 24 bits of information, eight bits representing the intensity for the red color beam of the display, eight bits representing the intensity of the green color beam and eight bits representing the intensity of the blue color beam. In pseudo-color mode a plurality of bits are used to represent the color of a pixel on the display and this plurality of bits is utilized as an address to look-up corresponding bits representing the intensity the red, green and blue guns for that color. It is desired to provide for selection of either trud color mode or pseudo-color mode for presentation of colors on a color display in_a computer system supporting a windowing environment.

Referring to Figure 1, color memory buffers as may be utilized by the present invention are described. The present invention comprises a first memory board 101 having three buffers 110, 111 and 112 for storing color information and a fourth buffer 113 for storing control information. In the preferred embodiment, each of buffers 110, Ill and 112 comprise a plurality of eight bit memory location, each memory location corresponding to a pixel location on the display.

Referring briefly to Figure 2, a display 201 as may be utilized by the present invention is shown. The display 201 may be any of several known raster-scanned display devices in which display of color information is accomplished by control of red, green and blue color guns. The rasterscanned display device 201 has a plurality of pixel locations which may be independently addressed by the color guns.

Pixel locations on a display 201 of the preferred embodiment are organized into groups, such as'groups 202, 203 and 204. In the preferred embodiment, each of the groups comprises an array of 20 pixel locations. The array of the preferred embodiment is 5 pixels wide and 4 pixels high. The control buffer 113 of Figure 1 in the preferred embodiment comprises of four bits-corresponding to each of these pixel groupings. One of these bits indicates whether 1 0 A the pixel grouping is operating in true color mode or pseudo-color mode. Two of the bits are utilized to determine which buffer is to be used to obtain color information for the pixel locations in the pixel group when double buffering is being utilized by the system. The fourth bit is unused in the preferred embodiment., Controlling logical pixel groups leads to efficiencies in operation of the present invention over independently controlling each individual pixel location. It will be' obvious to one of ordinary skill that the present invention may be utilized with control bits for each individual pixel location or with an array of different dimensions without departure from the spirit and scope of the present invention. A smaller number of bits in a pixel group leads to increased memory and processing requirements while allowing for greater color control.

When operating in pseudo-color mode, the preferred embodiment utilizes eight bits of color information for each pixel location of the display. Referring briefly to Figure 4, the eight bits of pseudo-color information 401 are used as the address inputs to a memory array 402. The memory array 402 logically comprises 256 addressable memory locations of 24 bits each, and is commonly referred to as a color look-up table. The particular memory may be comprised of three 256x8 memories or the equivilent. Eight bits of information represent the intensity of the red color beam on the display, eight bits of information represent the intensity the green color beam and eight bits represent the intensity the blue color beam.

The data output 403 of the memory 402 is the red, green and blue color information corresponding to the t pseudo-color 401 used as an input address. This red-greenblue (RGB) color information from the data output 403 may be used to control color on the display.

Referring again to Figure 1, in the preferred embodiment the pseudo-color mode utilizes two of the color data buffers, data buffers 110 and 111. The data buffer used at any particular time is determined from the control information stored in control buffer 113 for the pixel group containing a particular pixel. The data buffer 110 or 111 not currently being used for presentation of color information to the display may be updated with new color information. In this manner, control of double buffering is accomplished for each individual pixel group.

When operating in true color mode, memory buffers 110, Ill and 112 may be utilized for storing red, green and blue color information, respectively. Each of these memory buffers may store eight bits of color information for each pixel location on the display. The control information stored in buffer 113 indicates whether memory buffers 110, Ill and 112 are being utilized for a particular pixel group for storing true color information or pseudo-color information.

Referring briefly to Figure 5, the red, green and blue color information from memory buffers 110, 111 and 112 of Figure 1 are used as data inputs on lines 5011 502 and 503, respectively. The circuit of Figure 5 is used in the computer system of the preferred embodiment for gamma correction of colors. For example, the eight bits of color information representing the intensity of the red color of the display obtained for memory buffer 110 for a particular memory location is used as the address input to a 256x8 9 r_ a 1 A k 01 memory array 511. The contents of memory array 511 are adjusted for a particular operating environment and may take into consideration such factors as lighting, the particular display being utilized, etc. The data output 521 of memory array 511 comprises eight bits of color information representative of the intensity of the red color beam of the display. Similar gamma correction is accomplished for the green color bits utilizing memory array 512 having as an output 522 eight bits of green color information and gamma correction for blue is accomplished by memory.array 513 having as an output 523 eight bits of blue color information.

Referring again to Figure 1, the preferred embodiment of the present invention, in a second configuration, comprises two additional memory boards, memory board 102 and memory board 103. These memory boards are utilized to provide for double buffering of color information when operating in true color mode. Each of these boards comprises two memory buffers, memory buffers 120 and 121 in memory board 102 and memory buffers 130 and 131 in memory board 103. Each of the memory buffers 120, 121, 130 and 131 comprises an eight bit memory location corresponding to each pixel on the display. When a pixel location is selected in true color mode, buffers 110 and III store red color information, buffers 120 and 121 store green color information and buffers 130 and 131 store blue color information. Buffers 110 and Ill may be designated redo and redl, respectively, buffers 120 and 121 may be designated greeno and greenj and buffers 130 and 131 may be designated blueo and bluel. Control bits stored in control buffer 113 are utilized for determining whether to use - 12 color information stored in the redo 110, greeno buffer 120 and blueo buffer 130 or color information stored in redl buffer 111, greenj buffer 121 and bluel buffer 131. In this way, double buffering of true color information is 5 accomplished.

Although the preferred embodiment utilizes separate memory boards 101, 102 and 103 to allow for double buffering in true color mode, it will be obvious to one of ordinary skill that the present invention may be practiced utilizing a single memory board having two logically separate memories, a first logical memory for storing the redo, greeno and blueo color information and a second logical memory for storing the redl, greenj and bluel color information.

Referring now to Figure 3, a flow chart illustrating a method of the present invention is disclosed. Beginning at the left edge of each scan by the color beams of a display, a pseudo-color buffer switch is set to zero, block 301. This indicates to the system to begin displaying color information in pseudo-color mode at the left edge of each scan of the device. The control bit for controlling a selection of either pseudocolor mode or true color mode for the first pixel group is then tested, block 302. If this control bit is a zero, the computer system assumes the data bits for that pixel group are in pseudo-color mode, branch 303. If the control bit is a 1, the computer system switches to true color mode, branch 304 and block 305. For each new pixel group on the scan line, branch 306, the control bit is tested. The control bit acts as a toggle, toggling between pseudo-color mode and true color mode. The mode is toggled when the control bit is a I and is left j i -1.

- 13 in the existing mode if the control bit is a 0. At the beginning of each new line, branch 307, the system initializes the toggle (psuedo-c olor buffer switch) to pseudo-color mode, block 301.

A similar method is used for determining which buffer is used to obtain color information from when using double buffering. As discussed previously, two bits of control information are used for controlling which buffer to utilize in the present invention. A multiplexer is utilized for selecting between the two control bits. This allows the computer system to change one of the two control bits when updating color information without effecting the display. In the preferred embodiment, two bits of control information are not necessary for controlling selection of true color versus psuedo-color mode because changes between these modes take place at slower speeds than changes in the buffer being used.

Thus, an improved apparatus and method for controlling presentation of color information to a display in a computer is disclosed.

Claims

1. A circuit for controlling presentation of color information to a display in computer system, said display comprising a plurality of pixel locations, said circuit comprising: a first memory means having a first plurality of memory locations corresponding to said plurality of pixel locations, each of said first plurality of memory locations for stor-ing psuedo-color information; a second memory means having a second plurality of memory locations corresponding to said plurality of pixel locations, each of said second plurality of memory locations for storing psuedocolor information; a third memory means having a third plurality of memory locations, each of said third plurality of memory locations corresponding to a predetermined group of pixel locations, said third plurality of memory locations for controlling access to said first memory means and said second memory means.

2. The circuit as recited by Claim 1, wherein said each of said third plurality of memory locations comprises one bit of information.

3. The circuit as recited by Claim 2, wherein each of said first plurality of memory locations comprises eight bits of information.

1 j 1

4. The circuit as-recited by Claim 3, wherein each of said second plurality of memory locations comprises eight bits of information.

5. The circuit as recited by Claim 4, further comprising a color look-up table, said color look-up t-able for translating psuedo-color information to RGB color information.

6. The circuit as recited by Claim 5, wherein said _ predetermined group of pixel locations comprises an array of pixel locations.

7. The circuit as recited by Claim 6, wherein said array of pixel locations comprises twenty pixels, five pixels wide and four pixels high.

8. A circuit for controlling presentation of color information to a display in computer system, said display comprising a plurality of pixel locations, said circuit comprising: a first memory means having a first plurality of memory locations corresponding to said plurality of pixel locations, each of said first plurality of memory locations for storing true color information; a second memory means having a second plurality of memory locations corresponding to said plurality of pixel locations, each of said second plurality of memory locations for storing true information; a third memory means having a third plurality of memory locations, each of said third plurality of memory locations - 16 corresponding to a predetermined group of pixel locations, said third plurality of memory locations for controlling access to said first memory means and said second memory means.

9. The circuit as recited by Claim 8, wherein each of said first plurality of memory locations comprises eight bits of information.

10. The circuit as recited by Claim 9, wherein each of said second plurality of memory locations comprises eight bits of information.

11. The circuit as recited by Claim 10, further comprising a color lookup table, said color look-up table for translating psuedo-color information to RGB color information.

12. The circuit as recited by Claim 11, wherein said predetermined group of pixel locations comprises an array of pixel locations.

13. The circuit as recited by Claim 12, wherein said array of pixel locations comprises twenty pixels, five pixels wide and four pixels high.

14. The circuit as recited by Claim 1, wherein said each of said third plurality of memory locations comprises two bits of information.

1

15. A method for controlling presentation of color information to a display in a computer system, said display comprising a plurality of Pixels, said pixels being organized into a plurality of logical groups, said color information comprising a plurality of bits of information corresponding to each of said plurality of pixels, said compute; system further having a plurality of control information for selecting between color modes for said color information, said control information corresponding to said logical groups of-pixels, said method comprising the steps of:

for each pixel group:

(6) examining said control information corresponding to said pixel group to select said color mode; (b) presenting red-green-blue (RGB) signals to said display for each pixel in said pixel group, said RGB signals generated based on said color information corresponding to said pixel and said control information corresponding to said pixel group.

16. A method for controlling presentation of color information to a display in a computer system, said display comprising a plurality of pixels organized into a plurality of logical pixel groups, said color information comprising a plurality of bits of information corresponding to each of said plurality of pixels_,representing red-green-blue (RGB) color information in true color mode or in psuedo-color mode, said computer system further having a plurality of bits control information for selecting between color modes, each of said plurality of bits of control information corresponding to one of said logical groups of pixels, said method comprising the steps of:

- 18 for each scan line on said display: (a) setting a toggle switch to select a first color mode; (b) for each logical group of pixels:

(1) examining said bit of control information corresponding to said pixel group and toggling said toggle switch if said bit of control information is in first binary state; (2) presenting red-green-blue (RGB) signals to said display for each pixel in said pixel group, said RGB signals generated based on said color information corresponding to said pixel and said control information corresponding to said pixel group.

17. The method as recited by Claim 16, wherein said color information comprises 8 bits of information in psuedo color-mode and said color information comprises 24 bits of information in true color mode.

18. The method as recited by Claim 16, wherein said first color mode is psuedo-color mode.

19. The method as recited by Claim 16, wherein said first binary state is a high binary state.

20. A circuit for controlling presentation of color information to a display in a computer system, said display comprising a plurality of pixel locations, said pixel locations organized into a plurality of logical groups, said circuit comprising:

ll 4 k 1 a first memory means, said first memory means having a first plurality of memory locations corresponding to said plurality of pixel locations for storing color information, a second plurality of memory locations corresponding to said pixel locations for storing color information, a third plurality of memory locations corresponding to said plurality of pixel locations for storing color information and a fourth plurality of memory locations corresponding to said plurality of logical groups of pixel locations for storing control information.

21. The circuit as recited by Claim 20, further comprising a second memory means having a fifth plurality of memory locations corresponding to said plurality of pixel locations for storing true color information.

22. The circuit as recited by Claim 21, further comprising a third memory means having a seventh plurality of memory locations corresponding to said plurality of pixel locations for storing true color information.

23. The circuit as recited by Claim 22, wherein said second memory means further comprises a sixth plurality of memory locations corresponding to said plurality of pixel locations for storing true color information.

24. The circuit as recited by Claim 23, wherein said third memory means further comprises an eighth plurality of memory locations corresponding to said plurality of pixel locations for storing true color information.

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25. The circuit as recited by Claim 24, further comprising a color lookup table for converting psuedo-color information to red-green-blue (RGB) color information.

26. The circuit as recited by Claim 25, further comprising a gamma correction circuit for accepting color information and producing RGB color information

27. A circuit for controlling presentation of color information to a display in computer system, substantially as hereinbefore described with reference to the accompanying Jrawings.

28. A method for controlling presentation of color information to a display in a computer system substantially as hereinbefore described.

Published 1989 atThe Patent Office, State House, 66/71 High Holborn, LondonWClR4TP. Further copies maybe obtainedfromThe PatentOffice. EWes Branch, St Mary Cray, Orpington, Kent BR5 3RD. Printed by Multiplex techniques ltd, St Mary Cray, Kent, Con- 1/87 1