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GB2209641A - Drivers for emitter coupled logic circuit - Google Patents

Drivers for emitter coupled logic circuit Download PDF

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Publication number
GB2209641A
GB2209641A GB8721227A GB8721227A GB2209641A GB 2209641 A GB2209641 A GB 2209641A GB 8721227 A GB8721227 A GB 8721227A GB 8721227 A GB8721227 A GB 8721227A GB 2209641 A GB2209641 A GB 2209641A
Authority
GB
United Kingdom
Prior art keywords
transistor
emitter
driver
transistors
voltage
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
GB8721227A
Other versions
GB2209641B (en
GB8721227D0 (en
Inventor
Rodney James Lawton
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
GE Healthcare UK Ltd
Plessey Co Ltd
Original Assignee
GE Healthcare UK Ltd
Plessey Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by GE Healthcare UK Ltd, Plessey Co Ltd filed Critical GE Healthcare UK Ltd
Priority to GB8721227A priority Critical patent/GB2209641B/en
Publication of GB8721227D0 publication Critical patent/GB8721227D0/en
Priority to DE19883829898 priority patent/DE3829898C2/en
Priority to JP63226321A priority patent/JPH01157120A/en
Publication of GB2209641A publication Critical patent/GB2209641A/en
Application granted granted Critical
Publication of GB2209641B publication Critical patent/GB2209641B/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K19/00Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/01Modifications for accelerating switching
    • H03K19/013Modifications for accelerating switching in bipolar transistor circuits
    • H03K19/0136Modifications for accelerating switching in bipolar transistor circuits by means of a pull-up or down element
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K19/00Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/08Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
    • H03K19/082Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using bipolar transistors
    • H03K19/086Emitter coupled logic

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Power Engineering (AREA)
  • Logic Circuits (AREA)
  • Electronic Switches (AREA)

Description

1 WROVEMENTS IN OR RELATINQ!Q LQQ1C CIRCUITS 220c.641, This invention
relates to logic circuits. At the present time, two types of logic families predominate when very fast circuits are re quired. They are ECL (Emitter Coupled Logic) and CML (Current Mode Logic). Both these types employ current steering and, for both, the logic can be in many tiers.
CM1 circuits are used most often when the speed-power product is critical, but ECL circuits are used where ultimate speed is the deciding factor.
ECL circuits require emitter follower drivers. CM[L circuits do not have this requirement. The use of such drivers increases the drive capability of the circuit but only at the expense of increased power requirement and the loss of one potential tier of logic.
It is an object of the present invention to provide an emitter coupled logic circuit wherein the aforesaid disadvantage is overcome.
According to the present invention, there is provided an emitter coupled logic driver comprising a pair of emitter follower transistors whereto an input signal may be applied, one of the transistors providing an output, and switching means responsive to a voltage difference on the emitters of the transistors to cause the output to change in a directionto minimise the voltage difference.
The invention also provides an emitter coupled logic driver comprising a pair of transistors in push-pull arrangement and a third transistor paralleling the push-pull pair for establishing voltage levels on the push-pull pair, the third transistor and the push transistor being emitter followers and being arranged to be fed with 2 the same input signal, and means for sensing when the emitter voltage of the push transistor exceeds the emitter voltage of the third transistor for switching on the pull transistor.
The invention will he described further, by way of example, with reference to the accompanying drawings, in which:- Figure 1 is a schematic circuit diagram illustrating the principle of an emitter coupled logic driver according to the present invention; Figure 2 is a schematic circuit diagram of a first embodiment emitter coupled logic driver in accordance with the present invention; and, Figure 3 is a diagram, similar to Figure 2 of a second embodiment of an emitter coupled logic driver.
1 Referring firstly to Figure 1, there is shown an ECL (emitter coupled logic) driver embodying the principle of the present invention. As shown, two emitter follower transistors Q, and Q2 provide a drive stage of an ECL circuit. The transistors Q, and Q2 are substantially identical NPN transistors and the emitter of the transistor Q2 is loaded by a capacitative load C (shown as a capacitor).
The emitter voltage of the transistor Q, approaches the ideal response of an output transistor in following closely the input voltage at the input 10 applied thereto by the ouput gate of the ECL circuit (not shown). The emitter voltage of the transistor Q2, with the same input voltage applied thereto, is affected by the capacitative load and changes more slowly as the voltage on the capacitor Cl is charged or discharged. In principle, if the emitter voltages were applied to a difference amplifier 12, the output of the amplifier could be used to operate a current controller to cause the emitter voltage of the 1 k 3 1 transistor Q2 to follow more closely that of the transistor Qp The capacitative load, capcitor Cl would then be driven at the same speed as the speed of operation of an unloaded emitter follower transistor. In practise, it is only necessary that the current controller should drain current from the.capacitor Cl on occasions when the emitter voltage is held high. The current controller can then take the form of a transistor Q3 switched on to discharge the capacitor Cl when the emitter voltage of the transistor Q2 is held to. 01 high. The difference amplifier 12 is then arranged to switch the transistor Q3 hard off when the emitter voltage of the transistor -Q2 is relatively low.
Figure 2 illustrates a first practical embodiment of an ECL driver. In this figure, similar parts have been similarly identified.
In this circuit, emitter resistors 14 have been employed to establish switching voltage levels, in operation, on the base of a transistor Q4 (from the emitter of transistor Q,) and on the collector of the transistor Q4 (from the emitter of the transistor Q2)..
The collectors of the drivers Q, and Q2 are connected to a rail at, for example, 3.2V, and the inputs to the bases of these transistors Q, and Q2 are biased to a mid-point of approximately 3.0 volts. A negative going pulse applied to the bases of transistors Q, and Q2 causes them to conduct and a current to flow in the collectorlemitter path of the transistor Q,, through the resistor 14 to establish a base voltage of the transistor Q4 turning this transistor on.
Simultaneously, the negative going pulse is applied to the base of the transistor Q2 causing current to flow therethrough. In this case, however, the current flowing in the collectorlemitter path and 4 the resistor 14 does not establish a voltage on the base of transistor Q3 sufficient to turn this transistor on but is diverted through the transistor Q4 to ground. With the transistor Q3 off, the transistor Q2 drives the capacitative load (capacitor Cl).
When the voltage on the input swings positive, transistors QI and Q2 are switched off as also is transistor Q4. the capacitative load provides a voltage on the output sufficient, through the resistor 14, to turn on the transistor Q3. The capacitative load (capacitor Cl) is thereby discharged. It can be seen that the transistor Q2 acts as a "push" transistor whilst the transistor Q3 acts as a "pull" transistor in driving the capacitative load, whilst the transistor QI acts as a reference transistor to provide the necessary switching voltages to control this push-pull drive. Further, in the WF' state of the transistors Q, and Q2, only leakage current is taken so that the power requirement is reduced.
The embodiment shown in Figure 3 is very similar in design and operation to that shown in Figure 2. Consequently, similar reference numerals have been employed to identify like parts. In this embodiment, a diode 16 has been inserted in the emitter path of each of the transistors Q, and Q2. The forward voltage drop of the diodes 16, by reducing the effect of the resistors 14, increases the sensitivity of the transistors Q3 and Q4 to voltage differences between the emitters of transistors Q1 and Q2 to ensure a more rapid cut off of both the "push" and the "pull" operations described above in relation to Figure 2.
The circuits described above rely for their operation on a single type bipolar transistor i.e. NPN transistors. It will be appreciated Q k that the use of a single transistor type greatly facilitates the manufacture of the drivers as parts of integrated logic circuits. The integrated circuits so formed have the required drive capability of conventional emitter follower drivers without the power dr in requirement normally associated with such drivers. Further, the speed of the emitter coupled logic is maintained.
The invention is not confined to the precise details of the foregoing example and variations may be made thereto. For example, a similar all PNP driver is possible. The levels of biasing above described may be modified to meet particular requirements. Saturation protection by diode coupling around the transistor Q4 may be necessary if the biasing levels are changed.
6

Claims (1)

1. An emitter coupled logic driver comprising a pair of emitter follower transistors whereto an input signal may be applied, one of the transistors providing an output, and switching means responsive to a voltage difference on the emitters of the transistors to cause the output to change in a direction to minimise the voltage difference.
2. A driver as claimed in claim 1 wherein the switching means comprises a third transistor paralleling the emitter path of that transistor providing the output arranged to be switched on whenever the output voltage exceeds the voltage on the emitter of the other emitter follower.
3. A driver as claimed in claim 2 further including sensing means for sensing the voltage difference between the emitters of the pair of emitter followers and for switching the third transistor off whenever the output voltage is less than the voltage on the emitter of the other emitter follower.
4. A driver as claimed in claim 3 wherein the sensing means comprises a fourth transistor for shunting the base of the third transistor.
5. A driver as claimed in any of claims 1 to 4 wherein all the transistors are of the same type.
11 7 6. An emitter coupled logic driver substantially as hereinbefore described with reference to and as illustrated in Figures 1 and 2 or Figures 1 and 3 of the accompanying drawings.
t 7.' An emitter coupled logic driver comprising a pair of transistors in push-pull arrangement and a third transistor paralleling the pushpull pair for establishing voltage levels on the push-pull pair, the third transistor and the push transistor being emitter followers and being arranged to be fed with the same input signal, and means for sensing when the emitter voltage of the push transistor exceeds the emitter voltage of the third transistor for switching on the pull transistor.
8. A driver as claimed in claim 7 wherein the sensing means comprises a fourth transistor shunting the base of the pull transistor.
9. A driver as claimed in claim 7 or 8 wherein all the transistors are of the same type.
10. A driver as claimed in any of claims 7 to 9 wherein the transistors are all NPN transistors.
11. An emitter coupled logic circuit comprising an integrated circuit having integrated therewith a driver as claimed in any preceding claim.
tns..P.t.nt. office. state House. 66111 High Holborn. London WC1R 4TP. Further copies maybe obtained from The Patent Office,
GB8721227A 1987-09-09 1987-09-09 Improvements in or relating to logic circuits Expired - Lifetime GB2209641B (en)

Priority Applications (3)

Application Number Priority Date Filing Date Title
GB8721227A GB2209641B (en) 1987-09-09 1987-09-09 Improvements in or relating to logic circuits
DE19883829898 DE3829898C2 (en) 1987-09-09 1988-09-02 Driver circuit for emitter-coupled logic gates
JP63226321A JPH01157120A (en) 1987-09-09 1988-09-09 Improved logic circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GB8721227A GB2209641B (en) 1987-09-09 1987-09-09 Improvements in or relating to logic circuits

Publications (3)

Publication Number Publication Date
GB8721227D0 GB8721227D0 (en) 1987-10-14
GB2209641A true GB2209641A (en) 1989-05-17
GB2209641B GB2209641B (en) 1991-06-26

Family

ID=10623527

Family Applications (1)

Application Number Title Priority Date Filing Date
GB8721227A Expired - Lifetime GB2209641B (en) 1987-09-09 1987-09-09 Improvements in or relating to logic circuits

Country Status (3)

Country Link
JP (1) JPH01157120A (en)
DE (1) DE3829898C2 (en)
GB (1) GB2209641B (en)

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59168720A (en) * 1983-03-14 1984-09-22 Nec Corp Emitter follower output circuit
JPS63302621A (en) * 1987-06-02 1988-12-09 Fujitsu Ltd Semiconductor integrated circuit

Also Published As

Publication number Publication date
DE3829898A1 (en) 1989-04-06
DE3829898C2 (en) 1997-03-06
GB2209641B (en) 1991-06-26
JPH01157120A (en) 1989-06-20
GB8721227D0 (en) 1987-10-14

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Legal Events

Date Code Title Description
732 Registration of transactions, instruments or events in the register (sect. 32/1977)
PCNP Patent ceased through non-payment of renewal fee

Effective date: 19970909