GB2289170A - Printed circuit board solder thief - Google Patents
Printed circuit board solder thief Download PDFInfo
- Publication number
- GB2289170A GB2289170A GB9508857A GB9508857A GB2289170A GB 2289170 A GB2289170 A GB 2289170A GB 9508857 A GB9508857 A GB 9508857A GB 9508857 A GB9508857 A GB 9508857A GB 2289170 A GB2289170 A GB 2289170A
- Authority
- GB
- United Kingdom
- Prior art keywords
- solder
- fixing
- adsorbing
- area
- printed circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/341—Surface mounted components
- H05K3/3431—Leadless components
- H05K3/3442—Leadless components having edge contacts, e.g. leadless chip capacitors, chip carriers
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/11—Printed elements for providing electric connections to or between printed circuits
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/11—Printed elements for providing electric connections to or between printed circuits
- H05K1/111—Pads for surface mounting, e.g. lay-out
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/3457—Solder materials or compositions; Methods of application thereof
- H05K3/3468—Applying molten solder
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/09654—Shape and layout details of conductors covering at least two types of conductors provided for in H05K2201/09218 - H05K2201/095
- H05K2201/09772—Conductors directly under a component but not electrically connected to the component
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/09654—Shape and layout details of conductors covering at least two types of conductors provided for in H05K2201/09218 - H05K2201/095
- H05K2201/09781—Dummy conductors, i.e. not used for normal transport of current; Dummy electrodes of components
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
- H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
- H05K2201/10621—Components characterised by their electrical contacts
- H05K2201/10636—Leadless chip, e.g. chip capacitor or resistor
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/04—Soldering or other types of metallurgic bonding
- H05K2203/046—Means for drawing solder, e.g. for removing excess solder from pads
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
- Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Electric Connection Of Electric Components To Printed Circuits (AREA)
- Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
Abstract
So as to attract excess fixing material e.g. solder when a chip component is mounted, a printed circuit board (20) comprises a substrate (22) for mounting a chip component (30), electrode lands (23a, 23b) to be joined together with electrode portions (31a, 31b) of the chip component (30) with solder, and solder attracting lands (25a, 25b) or holes which slightly protrude from below the chip component (30) to be mounted and have a specified clearance between the solder attracting lands (25a, 25b) or holes and the electrode lands (23a, 23b). On the printed circuit board (20) parts of a wiring pattern may be used as the solder adsorbing lands (25a, 25b), those areas other than the areas corresponding to the solder attracting lands (25a, 25b) and the electrode lands (23a, 23b) being covered with a solder mask (24). The solder attracting lands (25a, 25b) may be provided with through holes. <IMAGE>
Description
PRINTED . CIRCUIT BOARD
The invention relates to printed circuit boards.
In printed circuit boards, electrode portions of chip components are connected to electrode lands.
Chip components which comprise resistors and capacitors for forming specified circuits can be mounted on printed circuit boards on which a specified wiring pattern is printed in advance and connected with electrode lands which are provided on the substrate of the printed circuit board by a reflow soldering method.
Figs. 1A to 1C of the accompanying drawings are respectively a sectional view illustrating a state of junction of a conventional printed circuit board and a chip component.
As shown in Fig. 1A, the conventional printed circuit board 1 comprises an insulating substrate 2 mainly made of a glass epoxy resin, electrode portions 11 of a chip component 10 formed on this substrate 2 and electrode lands 3 to be jointed with the electrode portions with solder 12.
Parts of the electrode lands 3 except upper parts thereof on the substrate 2 are covered with a solder mask 4 which is free from adhesion of solder 12.
For mounting the chip component 10 on such printed circuit board as described above, the specified chip component 10 is aligned above the electrode lands 3 while being held by a suction collet, not shown, after a specified quantity of solder paste 12 has been applied onto the electrode lands 3 by, for example, a screen printing process.
Next, as shown in Fig. 1B, the chip component 10 is depressed onto the substrate 2 to push down the electrode portions 11 of the chip component 10 into the solder paste 12.
With this, the substantially lower half parts of the electrode portions 11 of the chip component 10 are buried into the solder paste 12 and the chip component 10 is mounted on the substrate 2 owing to viscosity of the solder paste 12.
In this case, the solder 12 spreads over the electrode lands 3 to get into the underside of the chip component 10.
Subsequently, the solder 12 is melted by passing the printed circuit board 1 on which the chip component 10 is mounted through a reflow furnace or the like, not shown, as shown in Fig. 1C and the electrode portions 11 of the chip component 10 and the electrode lands 3 on the substrate 2 are joined together with the solder 12.
The solder 12 is preheated in the reflow furnace (heating, for example, at a temperature of approximately 1200C to 1600C) before melting the solder 12 for efficient spreading and adhesion.
The viscosity of solder 12 is lowered by this preheating and the solder 12 spreads efficiently on the electrode lands 3 and further spreads under the chip component 10.
After preheating, 'the solder 12 is completely melted by heating (for example, at a temperature of approximately 2000C to 2400C).
The electrode portions 11 of the chip component 10 and the electrode lands 3 of the printed circuit board are soldered by this heating and simultaneously solder 12 which has gotten under the chip component 10 is also melted to form a solder ball 12a.
This solder ball 12a separates from the solder 12 on the electrode lands 3 and remains on the solder mask 4.
However, the solder ball 12a as shown in Fig. 1C not only impairs an appearance of soldering finish but also causes short-circuiting between, for example, terminals of the other chip component resulting from easy exfoliation which may occur when the substrate 2 encounters with vibration or twisting force since the solder ball remains away from the electrode lands 3.
Such solder ball will greatly deteriorate reliability of electronic apparatuses.
According to one aspect of the invention there is provided a component fixing substrate comprising:
a substrate for fixing a component;
an area for fixing at least part of said component provided on said substrate; and
an area for adsorbing part of a fixing material for said component provided at a position adjacent to said fixing area.
According to another aspect of the invention there is provided a printed circuit board comprising:
a substrate for fixing a chip component;
an area for fixing at least part of said chip component provided on said substrate; and
an area for adsorbing part of a solder for fixing said chip component provided at a position adjacent to said fixing area.
According to a further aspect of the invention there is provided an electronic apparatus comprising:
a substrate for fixing a chip component;
an area for fixing at least a part of said chip component provided on said substrate; and
a printed circuit board which is provided at a position adjacent to said fixing area and provided with an area for adsorbing part of solder for fixing said chip component, wherein part of said substrate is fixed to a chassis.
According to a still further aspect of the invention there is provided a printed circuit board comprising:
a substrate for fixing a chip component;
an area for fixing electrode portions of said chip component provided on said substrate; and
a solder adsorbing area provided at a position adjacent to said fixing area and at part of a wiring pattern area.
According to a yet further aspect of the invention there is provided a printed circuit board comprising:
a substrate for fixing a chip component;
an area for fixing electrode portions of said chip component provided on said substrate; and
a solder adsorbing hole provided at a position adjacent to said fixing area.
Thus a printed circuit board comprising a substrate for mounting a chip component and electrode lands which are provided on this substrate and joined with electrode portions of a chip component with solder, has solder adsorbing lands provided with a specified clearance between the chip component and the electrode lands so that solder slightly protrudes from the underside of the chip component to be mounted on the substrate.
If, in a printed circuit board, a specified wiring pattern is provided on the substrate positioned below the chip component to be mounted, parts of the wiring pattern can be used as the solder adsorbing lands, and those areas other than areas corresponding to the solder adsorbing lands and the electrode lands on the substrate can be covered with a solder mask which is free from adhesion of solder.
The printed circuit board can be provided with through holes having a specified depth in the solder adsorbing lands.
The solder adsorbing lands can be provided with a specified clearance from the electrode lands and therefore the solder which is depressed and protrudes from the electrode lands when the chip component is mounted comes in contact with the solder adsorbing lands.
The solder which has contacted the solder adsorbing lands can be separated into the electrode land side and the solder adsorbing land side by surface tension and adhering force of the solder when the solder is melted, and the solder is fixed to the solder adsorbing lands in the status of junction.
A wiring pattern can be used not only for conducting signals but also for adsorbing the protruding solder by providing the wiring pattern on the substrate positioned below the chip component to be mounted using parts of the wiring pattern as the solder adsorbing lands.
In this case, by covering the areas on the substrate except for those areas corresponding to the solder adsorbing lands and the electrode lands with a solder mask which is free from adhesion of solder, molten solder will be separated without adhesion to the solder mask and joined and fixed to the solder adsorbing lands.
The solder which has protruded from the electrode lands is drawn to the solder adsorbing lands and introduced into the through holes, which are provided in the solder adsorbing lands, by capillarity when the solder is melted.
Therefore, a force of drawing the solder, which has protruded from the electrode lands, to the solder adsorbing lands increases to prevent the solder from being formed into a ball type lump.
The invention is diagrammatically illustrated by way of example in the accompanying drawings, in which:
Figs. 1A to 1C are respectively a sectional view illustrating an example of a conventional printed circuit board provided with electrode lands;
Figs. 2A and 2B are respectively a schematic diagram illustrating a printed circuit board which is a first embodiment of the present invention; Fig. 2A is a perspective view and Fig. 2B is a plan view.
Figs. 3A to 3C are respectively a sectional view for illustrating steps of progress of junction of a chip component;
Figs. 4A to 4C are respectively a rough plan view for illustrating an example of the printed circuit board on which the wiring pattern, as a second embodiment of the present invention, is provided with solder adsorbing areas; and
Figs. 5A and 5B are respectively a schematic plan view for illustrating an example of a printed circuit board provided with solder adsorbing through holes which is a third embodiment of the present invention.
Referring to the accompanying drawings, schematic diagrams for illustrating a printed circuit board of the invention are shown as a perspective view in Fig. 2A and a plan view in Fig. 1B.
Specifically, a printed circuit board 20 is intended to form a specified circuit by mounting a chip component 30 composed of resistors and capacitors with solder and mainly comprises a substrate 22 for mounting the chip component 30, electrode lands 23a and 23b to be joined together with electrode portions 31a and 31b of the chip component 30 mounted on the substrate 22 with solder, and solder adsorbing lands 25a and 25b provided nearby the electrode portions 23a and 23b.
The areas except the upper portions of the electrode lands 23a and 23b and the solder adsorbing lands 25a and 25b on the substrate 22 are covered with a solder mask 24 which is free from adhesion of solder to prevent electric short-circuiting due to solder adhering to other portions.
The solder adsorbing lands 25a and 25b are provided with a specified clearance d between the solder adsorbing lands and the electrode lands 23a and 23b in an arrangement where the solder adsorbing lands slightly protrude from the underside of the chip component 30 to be mounted.
This clearance d is set to a distance (for example, approximately 0.2 mm) which permits the solder applied to the electrode lands 23a and 23b to come in contact with the solder adsorbing lands 25a and 25b when the solder protrudes from the electrode lands 23a and 23b due to mounting of the component chip 30 and, moreover, molten solder to be separated to the side of electrode lands 23a and 23b and the solder adsorbing lands 25a and 25b owing to surface tension and adhering force of solder in the soldering process of the chip component 30.
A status of junction of the printed circuit board 20 is described referring to the sectional views shown in Figs. 3A to 3C.
As shown in Fig. 3A, specified quantities of solder pastes 32a and 32b are applied onto the electrode lands 23a and 23b provided on the substrate 22 of the printed circuit board 20.
In this arrangement, the chip component 30, which is held by a suction collet, not shown, is arranged above the electrode lands 23a and 23b.
Then, as shown in Fig. 3B, the chip component 30 is depressed onto the substrate 22 so that approximately lower half parts of the electrode portions 31a and 31b are buried into solder pastes 32a and 32b.
In this case, the solder pastes 32a and 32b are squashed to protrude out of the electrode lands 23a and 23b and also get into below the chip component 30.
Protruded solders 3a and 32b spread over the solder mask 24 on the substrate 22 to come in contact with (or reach nearby) the solder adsorbing lands 25a and 25b.
As shown in Fig. 3C, the printed circuit board on which the chip component 20 is mounted is passed through the reflow furnace to make the printed circuit board undergo preheating and main heating to melt solders 32a and 32b.
The viscosity of solders 32a and 32b which have been squashed and have protruded from the electrode lands 23a and 23b is reduced by preheating and, even when the solders have reached nearby the solder adsorbing lands 25a and 25b, the solders 32a and 32b come in contact with the solder adsorbing lands 25a and 25b.
Solders 32a and 32b are completely melted by main heating and separated to the electrode lands 23a and 23b side and the solder adsorbing lands 25a and 25b side by the surface tension and adhering force of solder.
In other words, solders 32a and 32b come in a vapor phase status to increase its surface tension and also its adhering force to a metal (so-called solder wettability) and therefore solders 32a and 32b are separated to adhere to the electrode lands 23a and 23b side and the solder adsorbing lands 25a and 25b side with the solder mask 24 free from adhesion of solders 32a and 32b as a boundary.
The electrode portions 31a and 31b of the chip component 30 and the electrode lands 23a and 23b of the printed circuit board 20 are soldered and separated solders 32a and 32b are fixed to the solder adsorbing lands 25a and 25b, by cooling and solidifying solders 32a and 32b under this condition.
Consequently, solders 32a and 32b which have protruded from the electrode lands 23a and 23b are fixed to the solder adsorbing lands 25a and 25b without remaining on the solder mask 24 as ball-shaped lumps and cannot be easily exfoliated even when a force such as vibration or a twisting force is applied to the substrate 2.
A reason why two solder adsorbing lands 25a and 25b are provided between two electrode lands 23a and 23b as shown in Fig. 2B is that protrusion of solders 32a and 32b from both sides of the chip component 30 when the chip component 30 is mounted on the substrate is taken into consideration.
A second embodiment of the invention is described below referring to Figs. 4A to 4C.
In an example shown in Fig. 4A, there are shown solder adsorbing lands 45a and 45b which are respectively provided with the least required area as large as enough to adsorb solders 32a and 32b (see
Fig. 3b) protruding from electrode lands 43a and 43b.
Though the solder adsorbing lands 45a and 45b can be provided in any type of shape if these solder adsorbing lands have an area as large as enough to adsorb and hold solders 32a and 32b (see Fig. 3B) which protrude as described above, a clearance d between the solder adsorbing lands 45a and 45b and the electrode lands 43a and 43b should be maintained at a distance as described above.
In other words, maintenance of this clearance d allows the protruded solders 32a and 32b (see Fig. 3B) to come in contact and to be separated to the electrode lands 43a and 43b side and the solder adsorbing land 45a and 45b side owing to the surface tension and adhering force of solder when solders 32a and 32b are melted and to be prevented from being bridged between the electrode lands 43a and 43b and the solder adsorbing land 45a and 45b after soldering.
In an example shown in Fig. 4B, a specified wiring pattern 46 is provided between two electrode lands 43a and 43b on the substrate 42 below the chip component 50 (see the 2-dot broken line in the drawing) to be mounted and parts of this wiring pattern 46 are simultaneously used to serve as the solder adsorbing lands 45a and 45b.
In addition, the area other than those areas corresponding to the solder adsorbing lands 45a and 45b and the electrode lands 43a and 43b is covered with the solder mask 44 to prevent adhesion of unnecessary solder.
This wiring pattern 46 is used as a common signal transmission line and, in a conventional example, entirely covered with the solder mask 44.
In this embodiment, the wiring pattern 46 can be used for signal transmission by opening the solder mask 44 for parts of the wiring pattern 46 corresponding to the solder adsorbing lands 45a and 45b and for adhering solders 32a and 32b (see Fig. 3B) protruding from the electrode lands 43a and 43b.
When the wiring pattern 46 is provided below the chip component 50 to be amounted, parts of the wiring pattern 46 can be used as the solder adsorbing lands 45a and 45b by opening the solder mask 44 on the corresponding area even though new solder adsorbing lands 45a and 45b are not additionally provided.
An example shown in Fig. 4C is a combination of the above-described two examples (shown in Figs. 4A and 4B), wherein parts of the wiring pattern 46 are used as the solder adsorbing lands 45a and 45b, which are respectively given the least required area where the solders 32a and 32b protruding from the electrode lands 43a and 43b can be adsorbed.
Moreover, the solder mask 44 on the corresponding area above the solder adsorbing lands 45a and 45b is opened.
Consequently, the clearance between the electrode lands 43a and 43b and the solder adsorbing lands 45a and 45b can be positively adjusted and the wiring pattern 46 can be used for signal transmission and adsorption of solder.
As a third embodiment of the invention, an example that solder adsorbing lands 55a and 55b are provided with through holes 57a and 57b is shown in Figs. 5A and 5B.
Specifically. Fig. 5A shows an example that the through holes 57a and 57b are provided about the centre of the solder adsorbing lands 55a and 55b which are separately provided, and Fig. 5B shows an example that parts of the wiring pattern 56 are used as the solder adsorbing lands 55a and 55b and the through holes 57a and 57b are provided about the centre therebetween.
As described above, the solders 32a and 32b protruding from the electrode lands 53a and 53b can be separated and adsorbed to the electrode lands 53a and 53b side and the solder adsorbing lands 55a and 55b side owing to the surface tension and adhering force of solder when the solders are melted by providing the solder adsorbing lands 55a and 55b.
In this case, the through holes 57a and 57b having a specified depth are provided in the solder adsorbing lands 55a and 55b and therefore the solder to be adsorbed to the solder adsorbing lands 55a and 55b is drawn into the through holes 57a and 57b.
In other words, drawing of solder into the through holes 57a and 57b causes the solder adsorbing capacity and the solder drawing force of the solder adsorbing lands 55a and 55b to increase, thereby enabling positive separation and junction of solder protruded from the electrode lands 53a and 53b.
In addition, since solder is drawn into the through holes 57a and 57b, the quantity of solder remaining on the surfaces of the solder adsorbing lands 55a and 55b and solder balls are prevented from being formed thereon. Therefore a sufficient force for adsorbing the protruded solder can be obtained.
The depth of the through holes 57a and 57b can be halfway or through out the holes and can be determined in accordance with the solder adsorbing capacity.
Since parts of the wiring patter are used to serve as the solder adsorbing lands, the solder adsorbing lands need not be additionally provided, and the solder adsorbing lands can be provided with the through holes to increase the solder adsorbing force to enable positive adsorption and maintenance of solder.
Therefore, the protruded solder will not be easily exfoliated even when a force or stress such as vibration or twist is applied to the substrate and electrical reliability of the printed circuit board can be increased.
Claims (23)
1. A component fixing substrate comprising:
a substrate for fixing a component;
an area for fixing at least part of said component provided on said substrate; and
an area for adsorbing part of a fixing material for said component provided at a position adjacent to said fixing area.
2. A component fixing substrate according to claim 1, wherein a pair of said component fixing substrates are provided at positions opposing to said fixing area and said adsorbing area.
3. A component fixing substrate according to claim 2, wherein said component is a chip component.
4. A component fixing substrate according to claim 2, wherein an angle at which said fixing area and said adsorbing area are opposed to each other is set as required.
5. A component fixing substrate according to claim 4, wherein said angle is set at an approximately right angle.
6. A printed circuit board comprising:
a substrate for fixing a chip component;
an area for fixing at least part of said chip component provided on said substrate; and
an area for adsorbing part of a solder for fixing said chip component provided at a position adjacent to said fixing area.
7. A printed circuit board according to claim 6, wherein at least a pair of said adsorbing areas are provided.
8. A printed circuit board according to claim 6, wherein said adsorbing area is provided between said pair of fixing areas and an angle at which said fixing areas and said adsorbing area are opposed to each other is set as required.
9. A printed circuit board according to claim 6, wherein said angle is set at an approximately right angle.
10. An electronic apparatus comprising:
a substrate for fixing a chip component;
an area for fixing at least a part of said chip component provided on said substrate; and
a printed circuit board which is provided at a position adjacent to said fixing area and provided with an area for adsorbing part of solder for fixing said chip component, wherein part of said substrate is fixed to a chassis.
11. An electronic apparatus according to claim 10, wherein a printed circuit board provided with at least a pair of said adsorbing areas is employed.
12. An electronic apparatus according to claim 10, wherein a printed circuit board on which said adsorbing area is provided between said pair of fixing areas and an angle at which said fixing areas and said adsorbing area are opposed to each other is set as required.
13. An electronic apparatus according to claim 12, wherein a printed circuit board on which said angle is set at an approximately right angle is employed.
14. A printed circuit board comprising:
a substrate for fixing a chip component;
an area for fixing electrode portions of said chip component provided on said substrate; and
a solder adsorbing area provided at a position adjacent to said fixing area and at part of a wiring pattern area.
15. A printed circuit board according to claim 14, wherein at least a pair of said adsorbing areas are provided at both sides of an opposing line of electrode portions of said chip component.
16. A printed circuit board according to claim 15, wherein an angle at which said fixing area and said adsorbing areas are opposed to each other is set as required.
17. A printed circuit board according to claim 16, wherein said angle is set at an approximately right angle.
18. A printed circuit board comprising:
a substrate for fixing a chip component;
an area for fixing electrode portions of said chip component provided on said substrate; and
a solder adsorbing hole provided at a position adjacent to said fixing area.
19. A printed circuit board according to claim 18, wherein at least a pair of said solder adsorbing holes are provided respective at both sides of the opposing line of the electrode portions of said chip component.
20. A printed circuit board according to claim 18, wherein said holes are provided as through holes.
21. A printed circuit board according to claim 18, wherein said holes are provided in a pair of solder adsorbing areas provided between a pair of said fixing areas.
22. A printed circuit board according to claim 18, wherein at least one of said holes is provided in a wiring pattern provided between said pair of fixing areas.
23. A component fixing substrate substantially as hereinbefore described and illustrated with reference to Figures 2 to 5 of the accompanying drawings.
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP11761294A JP3365048B2 (en) | 1994-05-06 | 1994-05-06 | Chip component mounting board and chip component mounting method |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| GB9508857D0 GB9508857D0 (en) | 1995-06-21 |
| GB2289170A true GB2289170A (en) | 1995-11-08 |
| GB2289170B GB2289170B (en) | 1998-06-24 |
Family
ID=14716075
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| GB9508857A Expired - Fee Related GB2289170B (en) | 1994-05-06 | 1995-05-01 | Circuit board |
Country Status (5)
| Country | Link |
|---|---|
| JP (1) | JP3365048B2 (en) |
| KR (1) | KR950035538A (en) |
| CN (1) | CN1080082C (en) |
| GB (1) | GB2289170B (en) |
| TW (1) | TW423265B (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US9591763B2 (en) | 2015-04-28 | 2017-03-07 | Fujitsu Limited | Substrate with embedded component |
Families Citing this family (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP3400634B2 (en) | 1996-02-28 | 2003-04-28 | 富士通株式会社 | Method of modifying wiring pattern of printed circuit board and method of cutting wiring pattern of printed circuit board |
| CN100531514C (en) * | 2004-07-12 | 2009-08-19 | 鸿富锦精密工业(深圳)有限公司 | Short-proof printed circuit board structure |
| JP2006041409A (en) * | 2004-07-30 | 2006-02-09 | Toshiba Corp | Wiring board and magnetic disk device |
| US7312403B2 (en) * | 2004-09-24 | 2007-12-25 | Matsushita Electric Industrial Co., Ltd. | Circuit component mounting device |
| EP3099754B1 (en) * | 2014-01-31 | 2019-01-16 | Trüb Emulsions Chemie AG | Aqueous primer coating for use in digital printing |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| GB1062928A (en) * | 1964-09-15 | 1967-03-22 | Standard Telephones Cables Ltd | Multi-wafer integrated circuits |
| US4777564A (en) * | 1986-10-16 | 1988-10-11 | Motorola, Inc. | Leadform for use with surface mounted components |
| US5227589A (en) * | 1991-12-23 | 1993-07-13 | Motorola, Inc. | Plated-through interconnect solder thief |
| EP0578880A1 (en) * | 1992-07-14 | 1994-01-19 | General Electric Company | Plated D-shell connector |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH01251788A (en) * | 1988-03-31 | 1989-10-06 | Canon Inc | Printed board |
-
1994
- 1994-05-06 JP JP11761294A patent/JP3365048B2/en not_active Expired - Fee Related
-
1995
- 1995-04-18 TW TW084103790A patent/TW423265B/en not_active IP Right Cessation
- 1995-05-01 GB GB9508857A patent/GB2289170B/en not_active Expired - Fee Related
- 1995-05-04 KR KR1019950010944A patent/KR950035538A/en not_active Withdrawn
- 1995-05-05 CN CN95104667A patent/CN1080082C/en not_active Expired - Fee Related
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| GB1062928A (en) * | 1964-09-15 | 1967-03-22 | Standard Telephones Cables Ltd | Multi-wafer integrated circuits |
| US4777564A (en) * | 1986-10-16 | 1988-10-11 | Motorola, Inc. | Leadform for use with surface mounted components |
| US5227589A (en) * | 1991-12-23 | 1993-07-13 | Motorola, Inc. | Plated-through interconnect solder thief |
| EP0578880A1 (en) * | 1992-07-14 | 1994-01-19 | General Electric Company | Plated D-shell connector |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US9591763B2 (en) | 2015-04-28 | 2017-03-07 | Fujitsu Limited | Substrate with embedded component |
Also Published As
| Publication number | Publication date |
|---|---|
| TW423265B (en) | 2001-02-21 |
| CN1113069A (en) | 1995-12-06 |
| CN1080082C (en) | 2002-02-27 |
| KR950035538A (en) | 1995-12-30 |
| GB2289170B (en) | 1998-06-24 |
| JPH07302970A (en) | 1995-11-14 |
| GB9508857D0 (en) | 1995-06-21 |
| JP3365048B2 (en) | 2003-01-08 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PCNP | Patent ceased through non-payment of renewal fee |
Effective date: 20020501 |