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GB2285353A - A transmit reference oscillator for satellite communications - Google Patents

A transmit reference oscillator for satellite communications Download PDF

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Publication number
GB2285353A
GB2285353A GB9425738A GB9425738A GB2285353A GB 2285353 A GB2285353 A GB 2285353A GB 9425738 A GB9425738 A GB 9425738A GB 9425738 A GB9425738 A GB 9425738A GB 2285353 A GB2285353 A GB 2285353A
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United Kingdom
Prior art keywords
divider
mhz
divide
signals
output
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
GB9425738A
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GB9425738D0 (en
Inventor
Dae Ig Chang
Jeong Ho Kim
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Electronics and Telecommunications Research Institute ETRI
KT Corp
Original Assignee
Electronics and Telecommunications Research Institute ETRI
KT Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Electronics and Telecommunications Research Institute ETRI, KT Corp filed Critical Electronics and Telecommunications Research Institute ETRI
Publication of GB9425738D0 publication Critical patent/GB9425738D0/en
Publication of GB2285353A publication Critical patent/GB2285353A/en
Withdrawn legal-status Critical Current

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Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04BTRANSMISSION
    • H04B7/00Radio transmission systems, i.e. using radiation field
    • H04B7/14Relay systems
    • H04B7/15Active relay systems
    • H04B7/185Space-based or airborne stations; Stations for satellite systems
    • H04B7/19Earth-synchronous stations
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/16Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
    • H03L7/18Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
    • H03L7/183Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between fixed numbers or the frequency divider dividing by a fixed number
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03DDEMODULATION OR TRANSFERENCE OF MODULATION FROM ONE CARRIER TO ANOTHER
    • H03D7/00Transference of modulation from one carrier to another, e.g. frequency-changing
    • H03D7/16Multiple-frequency-changing
    • H03D7/161Multiple-frequency-changing all the frequency changers being connected in cascade

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Astronomy & Astrophysics (AREA)
  • Aviation & Aerospace Engineering (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Transmitters (AREA)
  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
  • Radio Relay Systems (AREA)

Description

A TRANSMIT REFERENCE OSCILLATOR FOR SATELLITE COMMUNICATIONS 2285353 The
present invention relates to a Transmit Reference Oscillator (TRO) for satellite communications, and it has especial, but not exclusive, reference to a transmit reference oscillator of a Very Small Aperture Terminal (VSAT) for generating a reference frequency by using a frequency synthesizer so that data can be transmitted over the whole of the 500 MHz band, which is the bandwidth for satellite communication transponders.
Generally speaking, the conventional remote station of a VSAT has the problem that because it is fixed for use only in a specific band out of the bandwidth of 500 MHz, which is that for satellite communication transponders, the remote station, or a Radio Frequency (RF) part of a VSAT, has inevitably to be modified to is change the band to be used.
In an embodiment to be described, as an example, there is a transmit reference oscillator for generating a reference frequency by using a frequency synthesizer so that data can be transmitted over the whole of 500 MHz band, which is the bandwidth for satellite communication transponderst without modifying a remote station or a Radio Frequency (RF) part of a VSAT, a divide-by-fifteen divider for dividing input reference signals by 15; a Voltage Controlled Oscillator (VCO) for outputting oscillation signals; a divide-by-four divider for dividing the oscillating signals outputted from the voltage controlled oscillator; a divide-by-N divider for dividing by N the signals divided by the divide-by-four divider; a phase detector for outputting phase difference signals, which are the signals of the phase differences obtained by comparing the output signals of the divideby-N divider and those of the divide-by-fifteen divider; and a low pass filter for varying the oscillation signals of the voltage controlled oscillator by filtering the difference signals output from the phase detector, and applying the filtered difference signals to the voltage controlled oscillator.
Arrangements for use in carrying out the invention will now be described, as examples, with reference to the accompanying drawings, in which:
Fig. 1 is a schematic diagram illustrating a method of converting the transmit frequencies of a remote station of a VSAT, Fig. 2 is a block diagram illustrating a 3 - configuration of a transmit reference oscillator, Fig. 3 is a detailed circuit diagram of one embodiment of a transmit reference oscillator, Fig. 4 is a detailed circuit diagram of another embodiment of a transmit reference oscillator TRO.
In the drawings similar elements are referred to by the same reference numeral.
Fig. 1 shows a process for converting the transmit frequencies of a remote station of a VSAT. A Binary Phase Shift Keying (BPSK) modulator 11 modulates digital data (base band data), which are input for transmission, into an Intermediate Frequency (IF) between 1456 - 1584 MHz, where the modulatable bandwidth is 128 MHz, by using double frequency converters. A Transmit Block Unit (TBU) 12 converts the signals modulated by the BPSK modulator 11 up to a frequency level of 14 GHz through a frequency Division Multiplexing (FDM) technique by using the four reference frequencies input from a Transmit Reference Oscillator (TRO) 13.
The TRO 13 generates a reference frequency for converting the signal modulated by the BPSK modulator 11 up to a frequency of 14.0 - 14.5 GHz so that data can be transmitted over the range of 500 MHz, which is the bandwidth for communication satellites. The reference frequencies output from the TRO 13 are 130 2/3 MHz for converting the modulated signal of 1456 - 1584 MHz into a signal of 14.000 14.128 GHz; 132.0 MHz for converting the modulated signal of 1456 - 1584 MHz into a signal of 14.128 - 14.256 GHz. 133 1/3 MHz for converting the modulated signal of 1456 1584 MHz into a signal of 14.256 - 14.384 GHz; and 133 1/3 MHz for converting the modulated signal of 1456 - 1584 MHz into a signal of 14.384 - 14.500 GHz.
The IF signals modulated at a remote station of a VSAT, as mentioned above. are converted up to a band Ku of 14 GHz and amplified by a Solid State Power Amplifier (SSPA) to access communication satellites by the values calculated in a link budget. In the meantime, the frequency upconverter and SSPA are incorporated into the TBU 12r since a remote station of a VSAT should characteristically be small and simple in size.
Fig. 2 shows the configuration of a transmit reference oscillator. A signal having a frequency level of 130 MHz is set as a transmit reference frequency to minimize the influence of inter-modulation during the conversion of the frequency in TBU 12 as mentioned. dividing factors of the frequency synthesizer are set respectively to 15 and 4 in consideration of phase and - other spurious noise and simple implementation. The values of N for a divide-by-N divider 27 are set at 98, 99, 100, and 101 respectively to obtain Transmit Reference Signals 130 2/3 MHz, 132 MHz, 133 1/3 MHz and 134 2/3 MHz. In the meantime, a reference input frequency of the TRO 13 uses a reference signal of 5 MHz locked to a reference frequency of a hub station, while an output frequency of the TRO 13 is locked to the hub station, and finally the RF signals of a remote station are locked to the hub station.
In other words, the transmit reference oscillator 13 has a divide-by-fifteen divider 22 for dividing the input reference signals by 15, a Voltage Controlled Oscillator (VCO) 25 for outputting the oscillator signals, a divideby-four divider 26 for dividing the oscillator signals output from the voltage controlled oscillator 25, a divide-by-N divider 27 for dividing by N the signals divided by the divide-by-four divider 26, a phase detector 23 for outputting phase difference signalsf which are the signals of the phase differences obtained by comparing the output signals of the divide-by-N divider 27 and those of the divide-by-fifteen divider 22, a low pass filter 24 for varying the oscillation signals of the voltage controlled oscillator 25 by filtering the difference signals output from the phase detector 23 and applying the filtered difference signals to the voltage controlled oscillator 25, and a TRO alarm device TRO ALM 28 for generating an alarm when phase differences output from the divide-by-15 divider 22 and the divide-by-N divider 27 are detected by the TRO ALM 28. 10 The operation of the arrangement described above will now be explained. A reference signal 21 of 5 MHz locked to a hub station is divided into 333 1/3 KHz by the divide-byfifteen divider 22. The oscillator signal from the VCO 15 25 is divided into 32 2/3 MHz, 33.0 MHz, 33 1/3 MHz and 33 2/3 MHz respectively by the divide-by-four divider 26. The.signals divided by the divide-by- four divider 26 are again divided into 98, 99f 100 and 101 respectively by the divide-by-N divider 27 to become a signal of 333 1/3 20 KHz. The dividing ratio of the divide-by-N divider can be controlled by the data of a Central Processor (CP) or by a switch. The phases of the 333 1/3 KHz signal divided respectively by the divide-by-fifteen divider and the divide-by-N divider, as mentioned above, are compared, and the component providing a phase difference is detected by a phase detector 23. The signal of the phase difference detected is converted into a direct current control voltage through a low pass filter 24.
Accordingly. the WO 25 oscillates at a frequency corresponding to the input direct current control voltage, and the oscillator frequency becomes a stabilized frequency by forming a loop after being locked by a reference signal of 5 MHz, and is converted to a desired frequency by the ratio determined by the divide- by-N divider. A TRO alarm device 28 detects whether the output of the TRO 13 (a transmit reference frequency) is locked by the reference signal of 5 MHz and generates alarms. Such alarms are reported to the CP of a VSAT remote station and used for a network management system (NMS). Fig. 3 is a detailed circuit diagram of an embodiment of a transmit reference oscillator suitable for use in the present invention. The reference 20 frequency 21 of 5 MHz is divided by 15 according to the CP data of a VSAT remote station by using the divider 22 of a phase locked loop (PLL) frequency synthesizer Ul. The output signal of the oscillator WO 25 is divided by 4 in the divide-by-4 divider 26 and then divided by N in the divide-by-N divider 27. The divideby-N divider 27 operates according to the CP data from a VSAT remote station by using the phase locked loop (PLL) frequency synthesizer Ulf a dual modulus prescaler U2, and one desired frequency selected out of the frequencies divided by N. At the divide-by-15 divider 22 and the divide-by-N divider 271 the CP data from the VSAT remote station consist of a 3-bit addressi 4-bit data and a 1bit strobe signal. The CP of the VSAT remote station transmits the address, the data and the strobe eight times successively in order to store data values in registers RrN, and A inside the PLL frequency synthesizer Ul.
The output frequency of the TRO shown is set according to the data values of the CP. Here, the value of the register R is always 15. A transmit frequency of 130 2/3 MHz is output when the value of the register N is 9 and that of the register A is 8. A transmit frequency of 132 MHz is output when the value of the register N is 9 and that of the register A is 9. A transmit frequency of 133 1/3 MHz is output when the value of the register N is 10 and that of the register A is 0. A transmit frequency of 134 2/3 MHz is output when the value of the register N is 10 and that of the register A is 1.
The 4-bit data, 3-bit address and 1-bit strobe signal, which are output from a CP 29, are input respectively to the data input terminals (DO, D1f D2r D3), the address input terminals (A0. Al, A3) and the strobe input terminal (ST) of a PLL frequency synthesizer Ul. Additionally, the reference signal 21 of 5 MHz is applied to a terminal (OSCI) of the PLL frequency synthesizer U2 and the output (MTLL) of a dual modulus prescaler U2 is applied to a terminal (FI) of the PLL frequency synthesizer. A terminal (VDD) of the PLL frequency synthesizer 22 is connected to a power supply (VCC) and a terminal (VSS) of the PLL frequency synthesizer is connected to ground (GND).
The signals output through the terminals (FRf FV) of the PLL frequency synthesizer Ul, reference 22, are applied to a phase detector 23 which detects any phase difference between the two signals. The data output from the terminal (MOD) of the PLL frequency synthesizer Ul are applied to a terminal (ES) of the dual modulus prescaler U2 and determine the dividing ratio of the signal input from the divide-by-4 divider 26.
Additionally a terminal LD of the PLL frequency synthesizer Ul, reference 22, is connected to the negative terminal of a comparator U3 inside the TRO alarm device 28 in order to detect the status of the TRO alarms. In other words, the TRO alarm device 28 detects the status of the lock of the TRO output frequency by a 1 - 10 comparing the voltage output through the terminal LD of the PLL frequency synthesizer Ull reference 22, with a reference voltage determined by two divider resistors (Rl, R2)j by using the comparator U3 and, and generates alarms according to the detected results.
In the meanwhile, a TRO signal divided by four by the divide-by-four divider 26 is applied to the clock terminal (CLK) of the dual modulus prescaler U2 and the terminals (El, E2, E3, E4) of the dual modulus prescaler U2 are grounded, so that it can be used as a 10/11 dividing prescaler. A terminal E5 of the dual modulus prescaler U2 is connected to a terminal MOD of the PLL frequency synthesizer Ul and selects the 10/11 dividing ratio, according to the value of the data output through the terminal MOD.
Additionally, in the dual modulus prescaler U2, a terminal Q is connected to a terminal IN, a terminal QN to a terminal INN, terminals VBB, VSS to ground, and terminals VCCO, VDD, MVCC to a power supply (VCC), respectively.
The output of the phase detector 23 provides the phase difference component applied to a low pass filter LPF 24 as a direct current voltage, which is then applied to a voltage controlled oscillator VCO 25, which oscillates at a frequency determined by the applied direct current control voltage.
The signal frequency output from the voltage controlled oscillator 25 is divided by 4 by the divideby-four divider 26 and stabilized by the PLL loop, and this stabilized frequency is applied to a TBU.
Fig. 4 is a detailed circuit diagram of another embodiment of a transmit refetence oscillator TRO where a divide-by-N divider and a divide-by-fifteen divider are designed by using presettable counters U4, U5 which are controlled by the CP29 or a switch. The TRO outputs the transmit reference frequencies of 130 2/3 MHz, 132.0 MHz, 131 1/3 MHz and 134 2/3 MHz respectively according to the values of the data from the CP29 or a switch, namely, 1110, 1101, 1100 and 1011.
To design divide-by-98, -99, -100 and -101 dividers using a presettable counter, two 4 bit presettable counters are needed. The divide-by-98, -00, -100 and - 101 dividers can be made by controlling the input values of the presettable counter to 10011110, 10011101, 10011100, 10011011t respectively. Accordingly, the upper 4 bits are fixed to 1001 and only the lower 4 bits are controlled by the CP or the switch.
The 4-bit control signals output from the CP or the a switch are applied to the terminals (A, B# C, D) of the first presettable counter U4 according to the data value, and the output terminal RCO of the second presettable counter US is connected to the input terminal LOAD of the first presettable counter. The output signal of a divide-by-four divider 26 is applied to the clock terminal CLK of the first presettable counter U4. A power supply VCC is applied to the terminals ENP, ENTr CLR of the counter U4. The output terminal RCO of the counter U4 is connected to an input terminal ENT of the second presettable counter US.
In the meantime, to input data 1001 to the second presettable counter US, terminals A, and D are connected to a power supply and terminals B, and C are connected to ground. Power is supplied to the terminals ENP, and CLR to operate the second presettable counter.
Additionally, the output terminal RCO of the first presettable counter U4 is connected to the input terminal ENT of the second presettable counter US. The output terminal RCO of the second presettable counter US is connected to the terminal LOAD of both the first presettable counter U4 and the second presettable counter U5, a phase detector 23 and the clock terminal CLK of the second D-flip-flop U7 respectively.
13 - A reference frequency 21 of 5 MHz is applied to a divide-by-fifteen divider 22, which is implemented by a presettable counter, whose output is divided by 15 and applied to a phase detector 23.
In the meantime, a TRO alarm device 28 is constituted by two D-flip-flops, an Exclusive OR gate and a multi-vibrator. In other words, the signal applied to the divider 22 is divided by fifteen and is applied to the clock terminal of a first D-flip- flop U6, and the inverted output of the terminal of the first D-flipflop U6 is fed back to its input terminal D and its output is applied to one input terminal of an Exclusive OR gate.
Additionally, the inverted output terminal of the second D-flip-flop U7 is fed back to its input terminal D and its output is applied to the other input terminal of an Exclusive OR gate U8. The output of the Exclusive OR gate U8 is applied to the terminal B of a multi-vibrator U9.
Power on terminal VCC is supplied to the input terminals CLR, RXET/CEXT, CEXT of the multi-vibrator U9 and its terminal A is grounded. Accordingly, the multivibrator U9 provides at its output an alarm signal TRO ALM via its terminal Q.
a 14 - The above described configuration is able not only to transmit data over the whole of the 500 MHz band, which is the bandwidthfor satellite communication transponders, but also has the specific advantages set out below.
Firstly, it minimises the effect of phase noise and spurious interference, and can be simply implemented in order to enable both its size and cost to be reduced.
Secondly, a system employing the arrangement described can be simplified through the fact that it can be installed inside a TBU, which can be used indoors and, if necessary, outdoors, and there is therefore less limitation on the design of the product.
Thirdly, a transmit reference frequency of a TRO, which is a remote station, can be automatically controlled by the control of a network management system (NMS) or manually controlled by manipulating a swtich.
Although the preferred embodiments of the present invention have been disclosed for illustrative purpose, those skilled in the art will appreciate that various modifications, additions and other embodiments are possible within the scope of the invention as defined in the accompanying claims.
- is

Claims (6)

1. A transmit reference oscillator, including a divide-by-fifteen divider for dividing input reference signals by 15. a voltage controlled oscillator for providing oscillation signals. a divide-by-four divider for dividing the oscillation signals from the voltage controlled oscillator, a divide-by-N divider for dividing by N the signals that have been divided by the divide-byfour divider. a phase detector for providing at its output phase difference signals, which are the signals of the phase differences obtained by comparing the output signals from the divide-by-N divider and those from the divide-by-fifteen divider, and a low pass filter for varying the oscillation signals of the voltage controlled oscillator by filtering the difference signals obtained at the output of the phase detector and applying the filtered difference signals to the voltage controlled oscillator.
2. A transmit reference oscillator as claimed in claim 1, further including a TRO alarm device for generating an alarm when a phase difference is detected by the phase detector.
4 - 16
3. A transmit reference oscillator as claimed in claim 1, wherein the oscillation signal obtained at the output of the voltage controlled oscillator is divided by the divide-by-four divider into one of four signals at a frequency of 32 2/3 MHz, 33.0 MHz, 33 1/2 MHz and 33 2/3 MHz.
4. A transmit reference oscillator as claimed in claim 3, wherein the signal, which has been already divided by the divide-by-four divider into one of the four signals at a frequency of 32 2/3 MHz, 33.0 MHz, 33 1/2 MHz and 33 2/3 MHz. is again divided by N by the divide-by-N divider to provide an output signal at 333 1/3 KHz.
5. A transmit reference oscillator as claimed in claim 1, wherein the reference signal applied from a reference frequency of 5 MHz is divided by 15 at the divide-by-fifteen divider and the divided signal is 333 1/3 KHz.
6. A transmit reference oscillator as claimed in claim 1 including an arrangement substantially as described herein with reference to any one of the accompanying drawings.
GB9425738A 1993-12-29 1994-12-20 A transmit reference oscillator for satellite communications Withdrawn GB2285353A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019930030901A KR960014676B1 (en) 1993-12-29 1993-12-29 Satellite telecommunication

Publications (2)

Publication Number Publication Date
GB9425738D0 GB9425738D0 (en) 1995-02-22
GB2285353A true GB2285353A (en) 1995-07-05

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GB9425738A Withdrawn GB2285353A (en) 1993-12-29 1994-12-20 A transmit reference oscillator for satellite communications

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JP (1) JPH07273644A (en)
KR (1) KR960014676B1 (en)
CA (1) CA2139191A1 (en)
DE (1) DE4447142A1 (en)
GB (1) GB2285353A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7796024B2 (en) 2007-02-07 2010-09-14 Db Systems, Llc Automated multi-purpose alert system with sensory interrupts

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3932821A (en) * 1974-11-08 1976-01-13 Narco Scientific Industries, Inc. Out of lock detector for phase lock loop synthesizer
GB2003300A (en) * 1977-08-22 1979-03-07 Rca Corp Time interval control apparatus
GB2118382A (en) * 1981-12-22 1983-10-26 Sony Corp Tuning apparatus of phase-locked loop type
EP0186854A2 (en) * 1984-12-28 1986-07-09 Fujitsu Limited Frequency synthesizer having means for suppressing frequency instability caused by intermittent PLL operation
GB2258096A (en) * 1991-07-24 1993-01-27 Matsushita Electric Industrial Co Ltd Clock changeover apparatus

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60107920A (en) * 1983-11-16 1985-06-13 Toshiba Corp Communication equipment using phase synchronizing circuit
JPH01256224A (en) * 1988-04-05 1989-10-12 Fujitsu Ltd Synthesizer channel detecting circuit

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3932821A (en) * 1974-11-08 1976-01-13 Narco Scientific Industries, Inc. Out of lock detector for phase lock loop synthesizer
GB2003300A (en) * 1977-08-22 1979-03-07 Rca Corp Time interval control apparatus
GB2118382A (en) * 1981-12-22 1983-10-26 Sony Corp Tuning apparatus of phase-locked loop type
EP0186854A2 (en) * 1984-12-28 1986-07-09 Fujitsu Limited Frequency synthesizer having means for suppressing frequency instability caused by intermittent PLL operation
GB2258096A (en) * 1991-07-24 1993-01-27 Matsushita Electric Industrial Co Ltd Clock changeover apparatus

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7796024B2 (en) 2007-02-07 2010-09-14 Db Systems, Llc Automated multi-purpose alert system with sensory interrupts

Also Published As

Publication number Publication date
GB9425738D0 (en) 1995-02-22
KR950022254A (en) 1995-07-28
KR960014676B1 (en) 1996-10-19
CA2139191A1 (en) 1995-06-30
JPH07273644A (en) 1995-10-20
DE4447142A1 (en) 1995-07-06

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