GB2127238A - Control circuits and zero-current- crossing semiconductor-thyristor gate feed shunting in power control of all cos-0 loads - Google Patents

Abstract

Firing of semiconductor thyristor gates is usually done with currents in great excess of the minimum needed and/or by zero-voltage-crossing means, to prevent or minimize RFI and di/dt damage. For an inductive load, zero- voltage-crossing firing distorts the load current because of commutation before next zero-voltage crossing. This invention proposes to fire thyristor gate at zero-current-crossing point of load, using minimum possible gate current, by supplying correcting leading-current gate-feed means (3, 3a), with current lead of either exactly 90 DEG el. ahead of load current, when load- current lag is known, or at least 45 DEG el. ahead of load current, when said gate current is 1.414 times the minimum needed for firing. Said gate-feed means are permanently connected to thyristor (2) gate via tap resistor (5), and protective resistor (4). Further characterizing the invention is the use of shunting means controlling load current by reducing gate current below minimum necessary at control point. Interface means (9, 17, 18) are optionally used between shunting means and gate-tap means. Various low-power circuits are developed, most being powered directly from gate current itself, for variegated control functions, without use of integrated circuits and/or external power supply, for automatic, manual, proportional, reset, and/or nonreset applications. Positioning gate-feed means before the load gives quasi-d.c-gate firing. <IMAGE>

Description

SPECIFICATION Control circuits and zero-current-crossing semiconductor-thyristor gate feed shunting in power control of all cos- loads This invention is related to P.A. Ser. No. 8114861.

This invention relates to further developments in the power-switching and control circuits mentioned in the above Application, for loads of any powerfactor, even when latter changes during turn-on and/or operation. It also deals with low-power discretecomponent auxiliary circuits to be used in conjunction with above, whereby timing, astable, and/or monostable control power is attained directly from gatecurrent source (impedance from mains).

Forthe known reasons of limiting RFI and possible di/dt damage, the use of zero-voltage switching is indicated in the Art, wherebythe semiconductor thyristor gate can be turned on only nearthe zero-voltage crossing of mains voltage, e.g., within 100 us of zero crossing (see, e.g., Siemens A. N., "Single-phase and three-phase control with Triacs & BR< Diacs," pp.23 - 27; Grayhill Engineering Catalog, No.

1, Sept., 1980, pp. F-3-4).

Most electrical loads are not purely resistive, having some inductive component of lesser or greater degree, and the lag in load current after mains voltage, , is given by = = tan- wUR, as is verywell known. Moreover, said angle 0 can very often vary during turn on, or operation: if the inductive reactance changes because of saturation effects; because of high in-rush current; because of magnetizing current; in a fluorescent device, there are various stages in the turn-on process, some in which R is much greaterthan wL, giving a small , and some where wL is greater than R, as is true in normal operation.

The complete solution forthe currentthrough an RL circuit supplied with a sinusoidal voltage, for zero initial energy of coil (zero initial coil current) is i(t) = (Vp/Z) (sin(wt + e - ) + e-tR/Lsin ( - 6)), where up is the peakmainsvoltage; Zisthe impedance ofthe series coil-resistor combination; and 8 is the voltage phase angle upon power-up. (The two components ofthe current are the steady-state ("forced") current, and the transient ("natural") current, respectively.) It can be seen that, if6 = , i.e., if thea.c. voltage is applied just atthe zero crossing of current (which, for the general non-purely-resistiveload case is notthe zero-voltage-crossing point), as for example by turning on the semi-conductor switch at said point, then the initial steady-state current will be zero, and the transient must also not only be initially zero, but must vanish completely for all times.

Therefore, the zero-voltage switching mentioned is satisfactory for resistive loads only, not only because of transient problems, but also because an inductive load will commutate sometime after zero-voltage crossing, and will remain off until the next zero crossing ofvoltage, causing itto receive only part of the half-cycle power, and distorting the waveform from the sinusoidal.

The Siemens reference mentioned above mentions the i.c. TCA780 which can give a triggering pulse of variable duration, by using a pulse extension capaci tor, uptothefull 10 msof a halfwave of 50 Hz; however, it is necessary in such a case to provide a separate power supply (15v at55ma').

It is therefore the object ofthe present invention to provide a simple self-powered non-integrated-circuit means to connect a load to mains voltage via a semiconductorthyristor at load zero-current crossing (ZCC), by firing said thyristor at said point; It is also the object ofthe present invention to provide a simple self-powered non-i.c. meansto connect a load with changing cos- to mains voltage via a semiconductor thyristor at load ZCC by firing said thyristor at said point; It is a further object of the present invention to provide a simple apparatus as above to connect any load or combination of loadsto mainsvoltage at load (combination) ZCC; Another object of the present invention isto provide self-powered non-i.c. circuits forthe periodic switching of any load using the above ZCC means;; A still further object of this invention is to provide self-powered non-i.c. circuits for interval timing, with initial on-delay, for sensitive compressor loads, in conjunction with above ZCC means; One more object of this invention is to provide self-powered npn-i.c. means for interval timing of fluorescent devices, according to the above ZCC circuits, wherein, when the said semiconductorthyristor is a triac, one mode is cut off shortly before the other, providing a warning of impending darkness, without damaging the fluorescent device;; Afinal objectofthis invention isto provide self-powered non-i.c. means for interval timing, with on-delay option, combined with photo-control, whereby any device may be turned on near sunset, remain on for a predetermined time, automatical!y shut offthen, and then come on again the next evening, using above ZCC means.

P.A. No. 81 14861 presented a general means for power control and switching viatriacs and SCRs whereby the thyristor gate is permanently connected via static impedance to the mains voltage, to provide a normally-closed circuit, and wherein the thyristor is prevented from firing by shunting the gate with the switching or control means. Preferred embodiments are the use of capacitive gate feed, wherein thyristor fired essentially 90 ahead of maximum load current (for resistive loads); and, quasi-d.c. gate feed, where gate fed from before load, so that sinusoidal (or co-sinusoidal, in case of capacitive feed) gate current flows all the time; an especially preferred embodi mentisthecombination of quasi-zero voltage switching and quasi-d.d. feed.The use of minimum possible gate current, considering ambient temperature extremes and thyristorvariations also characterised the above circuits wherever possible, thyristors of relatively low (but not too low) gate-current require The drawing(s) originally filed was/were informal and the print here reproduced is taken from a later filed formal copy.

ments were used 1-10 ma); this same gate current powered the control or switching circuit, which gave the advantage of requiring low-power components; not heating temperature sensors when used; etc.

Notwithstanding, external power was not needed in most embodiments shown.

As mentioned, in order to precludetransientforma- tion, RFI, and "hot spots," mains voltage must initially be applied to the impedance (e.g., RL) circuit at the phase angle 6 of voltage equal to the current-lag angle . Since we are dealing with gate control of SCR's and triacs, this means that the gate signal must be applied at its maximum value when the load current is zero crossing. In the proposed method, using sinusoidal gate excitation, the phase angle of the gate current musttherefore be 90 ahead of = = 6, o or, = = (ZI - 90 , E.g., for an RL load, the current crosses zero somewhere after zero voltage crossing, so that the gate current must cross zero before zero mains-voltage crossing: this indicatea an RC gate-feed circuit.From economic and power-saving considerations, a parallel RC circuit is indicated (with a safety resistor of minimum possible value in series with the capacitor).

Once the value of g is knows, the values of the feed capacitor, Cf, and the parallel feed resistor, Rf, are determined: Cf = sing/wZ Rf =ZIcosg, where Z is the maximum impedance admitting the minimum necessary gate current under prevalent conditions, atthe mains-voltage peak. (A similar derivation can be made for series Cf and Rf.) (Theoretically, itwould also be possible to use and RLgate-feed circuitfor an RC load, but this might not be practical as a large inductorwould be necessary, to limitgate current.) As further mentioned, many inductive loads have changing cos - 8 during turn-on, or operation.

Furthermore, a non-linear load such as a fluorescent device produces harmonics ofthefundamental frequency, each harmonic having its own cos component. Thus, there is not one solitary value of g in many practical cases. Also, a switching apparatus, e.g., an interval timer, should be capable of applica tion to loads of various natures, perhaps even ranging from almost purely resistive (electrical heaters, etc.), to highly reactive; i.e., it should be more or less universal. Therefore, this invention proposes to choose a central, or average value for (a (and therefore for a, also), and dimension the minimum gate current so thatthe entire active area, say from 0 - 90" el. is covered.For example, if QI is chosen es +45 el., the maximum gate current will also occur at this angle, and twill fall offto 0.707 this value at 0" and 90 : said maximum value is therefore madel .414 times the minimum needed (again considering ambientconditions, etc.), so thatthe maximum gate current from 0"- 90"will never drop below the minimum necessary for firing. Of course, wheneverthe maximum available gate current is above minimum needed, the shunting means must be capable of sufficient shunting to correctforthis,when shunting occurs.

It is, of course, possibleto choose another "aver age" value of (a, for instance, if the loads will all be inductive, when a higher Ci would be chosen.

The uncertainty in the exactvaiue of i precludes the use of steady-characteristic heat sensors, for example, for then, as the sensor approached the turn-off point, the thyristor would turn on each half cycle at different values of mains voltage, causing RFI, etc. Only abrupt-characteristicsensors can be used. (Or, a steady-characteristic sensor may control a regenerative switch shunting the gate.) ltshould be noted thatwhile, ideally,thethyristor should be fired at power-up atthe ZCC, it is much more im portantthat al I the subsequentgate firings occurthen: 1) RFI and di/dtforthe first half cycle of a.c. are usually acceptable; 2)Arangeof IgtandVB (thyristorforward blocking voltage) values exist where it is possible to fire the thyristor, since gate-current maximum does not coincide with VB minimum; this situation is enhanced both at highertemperature, and when the maximum gate current supplied bythefeed components is greater than the minimum needed, as mentioned.

The proposed circuits ensure this, since the thyristor commutates at ZCC, and, the maximum, or nearmaximum available gate current is then applied to the gate for refiring atthe nexthalf-cyclecommencement.

The above-mentioned Application showed means of using simple non-i.c. circuits, powered directly from a tap on the gate-feed impedance, for interval and astable timing applications. This Application shows further innovations in this direction, such as the use of low-voltage zener and rudimentaryfilterforstabilizing operation of various multivibratortimers, which feed a regenerative-switch or a Darlington gate-shunt before said filter, said shunting when occurring not interfering with the timing function, the NOR-logic combination of an interval timerwith a monostableto give initial delay, which said monostable has special means to turn on after powerfailure; the back-to-back combination oftwo regenerative-switch intervaltimers for independent control of each mode of a triac.

All the above will be gone into in detail below.

FIG 1 General outline of invention principle.

FIG. 2 Interval timers.

FIG.3 Cycling relay controlling transformer.

FIG.4 Delayed-turn-on interval timer.

FIGS. 5 & Photo-controlled interval timer.

FIG. 7 Missing-phase relay.

Referring to FIG. 1, the general invention principle is shown. (Although a triac is shown, a bridge-connected SCR, forfull-waveoperation, with load after bridge, and gate currenttaken from between bridge and load, can be used in most circuits shown, when pulsating d.c. can be used; in that case, of course, no low-power bridge is necessary between gatetap and shunting means.) The load 1, having inductive component, is switched via thetriac 2, by the shunting means atA B, to the source of mains voltage. The triac gate receives currentfrom the parallel gate-feed source comprising feed capacitor 3 in series with protector resistor 4, together in parallel with feed resistor 3a, via top resistorS. As mentioned,thevalues of the above impedances are determined bythe necessary max imum gate current, and the phase angle ofthe inductive load, . FIG. 1 b - 1 show some possible gate-shunt means and/or interface means: some of these will be described in detail below.

Referring to FIG. 2a, an interval timer based on regenerative switch comprising transistors 17 and 18 is shown. The operation is as mentioned in P.A. No. 81 14861, exceptthatthe gate-feed means is adapted for the inductive load; there is no hold-overcapacitor across bridge 9 output, as it has been found that the timing capacitor 15, itself, holdsthe reg. switch on when bridge output is near 0, because the baseemitter voltage of transistor 17 jumps upon switch turn-on, and, because of the base-emitter-timercapacitortime constant, timing capacitor 15 retains enough charge, until bridge 9 voltage rises again, to assure switch turn-on on next half-cycle; and, the addition of transient-bypass capacitor 77a prevents overheadturn-on bylinetransients.

The above interval timer may be used for any load, including fluorescent lighting.

FIG. 2b illustrates a similar interval timer with separate mode control, as applied to fluorescent light control. (Here, and below, components with same function are identically enumerated.) The circuit consists of back-to-back timers, as in FIG. 2a, with slight modifications, as each timing capacitor, 15 and 15a, receives charge from timing resistors 16and 16a, respectively, only on each alternating half cycle; therefore, it was necessary to add reservoir capacitors 117 and 11 7a, which, because of the high values of resistors 16 and 16a, may have very low relative capacitances (0.02 uf, here). Capacitor 77 also has both hold-over and filterfunctions, in addition to capacitor 77a.

Instead of one reset switch, 80, as in FIG. 2a, here, of course, two ganged switches, 80 and 80a, are necessary.

Since prolonged application of d.c. to a fluorescent tube can damage it, variable resistance 1 6a should be adjusted so that the turn-offofthe Ill-mode should not be too long after the 1±modeturn-off, or vice versa.

The load ofthis embodiment may be a mixer, so that, by adjusting resistance 16a,the full power may be applied until one mode shuts off, when half-power will be applied until the second regenerative switch turns off.

The use of a Darlington pair the input of which is fed from a capacitor which is being charged by atiming resistance is not possible as a shunting means for inductive loads, as it is for resistive loads with purely-capacitive gate feed, since the action is not abrupt, because a phase-control would occur, causing intolerable RFI, especiallyforthe half-wave voltage occurring after one mode shut off, because of the presence of the fundamental frequency.

To preclude firing of the i- mode, regenerative switch 17a-18a should come on before regenerative switch 17 - 18, or a triac with inoperative or insensitive l-mode should be used, as mentioned.

In FIG. 3we see a cycling relay, suitable for, inter alia, even a high-voltage-transformer load, wherein the timing function is not disturbed by high-voltage discharges (the circuit shown was used for and insect killer, where the h.v. is on 0.5 sec., and offfor 2.0 secs., for safety purposes; the transformer is a May & BR< Christe, Z1 0050 E).The astable multivibrator, transistors 68 and 69, operates at a very low voltage (1.8 v.), supplied byzener 120, from the filter consisting of resistors 118and 119, and capacitor 117; capacitor 117 holds the astable over during the off (shunting) period of 2 secs., more specifically, during that period, on either side of the gate-current zero crossing, where the voltage drop across resistor 84 falls below the minimum to supply both the zener and the astable with sufficientcurrentto maintain proper operation, considering also the drop across diode 115; resistor 118 limitsthecurrentto capacitor 117 during the on (non-shunting) period; resistor 119 limits the discharge rate of said capacitor; and diode 115 prevents reverse discharge of said capacitor via resistor 84 when the Darlington is shunting.

The use of lowvoltage to supply the astable increases stability and precision, as does the use of high-htransistors, 68 and 69; the astable output must be high enough, however, to overcome the base-emitterjunctionsoftransistors 13 and 14.

Therefore, a voltage of 1.8 - 2.1 v is indicated.

Capacitor79b contributes very greatly to timing stability; without it, the proximity ofthe control unit to the h.v. transformer caused complete distortion of the timing function, greatly reducing the off safety period of 2 secs.

FIG. 4 reveals an interval timer with on-delay,for use in turning compressor-containing loads on and off: it consists of a regenerative-switch timer, as above, NORedwith a Darlington-pair shunt driven by a monostable output, which latter is supplied by resistor 118 and 1.8-v. zener 120 (since this is a monostable, the power supply is simpler than for the astable of FIG. 3, which switches every few seconds, whilethis monostableswitchesfrom its normal state only on power-up, or powerfailure, and then switches back after about 5 min, when the triac can be fired again).

The regenerative-switch timer action is as above.

Resistor 84a is added to produce a voltage drop, if Darlington 13-14 goes on, to keep regenerative-switch operation continuous, and capacitor 117 holds over the monostable at gate zero-current crossing. The monostable, transistors 68 and 69, has a novel means of ensuring that itwill initially not be in the normal state: the addition of capacitor 71 a across the base-emitterjunction of transistor 68 holds it off at power-up, so that transistor 69 comes on, and stays on for the timing-period duration (about 5 min.). There fore, the initial output from the collector oftransistor 68 is high, saturating the Darlington, and shunting the triac gate.

Any occurrence which will momentarily lower the voltage across the monostable (zener 120) will trigger the circuit out of its stable state, e.g., power-up; power failure; initial turn-on of regenerative switch.

The values of the components can be calculated from the gate current needed; voltage bridge input with regenerative switch and Darlington off; voltage across bridge input with regenerative switch and/or Darlington on.

As in the ci rcuit of FIG.2a, so here, the timing resistor 16 may have a very high value, due to the very high base input resistance ofthe regenerative switch at the switching point, so that lower-valuetiming capacitors 15 may be employed, which is economical and space-saving; the very-lowvoltage across said capacitoralso leads to economy and reduced volume, in that lower-voltage components may be used.

FIG. 5 shows an interval timer, with optional on-delay, for loads including sensitive compressors, controlled byan LDR 7, sothatany load 1 will be turned on nearsunset, turned offafterthe timing period determined by time constant 15 - 16 and the regenerative switch switching voltage (across capacitor 15), and turned on again the following evening, etc.

Examination ofthe circuit shows the similarity to FIG.

4, and the same enumeration is used for similar functioning components. The main differences are: the increase in the value of capacitor 71 a, which will be explained below; the addition of LDR 7, and adjustment resistors 21 - 21 a across said capacitor 71 a, which, when of low-enough combined value, ensure triac shunting; use of a second regenerative switch 17c-18a, in place of Darlington, to amplify monostable output (also to be described); addition oftransistor 17b to timing regenerative switch 17 - 18 to form a Darlington regenerative switch (called "DARLSCR" in previous Application), which turns on faster with the large-value timing capacitor 15 than the ordinary regenerative switch; addition of shorting transistor 1 5a instead of manual shorting switch (reset) 80; addition of delay circuittotiming-capacitordischarge transistor 1 5a, comprising transistors 110 and 1 Sb, and delay capacitor 121; and, increase in filler capacitor 11 7a (see FIG. 3), as opposed to capacitor 117OfFIG.4.

Operation is as follows: assuming low ambient light level, LDR 7 resistance is high, and l.h. monostable transistor 68 will have turned on, so that output via diode 133 low, so that input to monostable (light) regenerative switch 17c-18a can not turn it on.

Therefore bridge 9 voltage is not reduced, and reservoir (timing) capacitor 117 charges to zener voltage, minus LED 27a and diode 115 drops, and charges timing capacitor 15, via very-high-value timing resistor 16, which may optionally be variable.

When the voltage on capacitor 15 reaches the switching point,the regenerative switch turns on, shunting the gate current sufficiently to turn triac off (i.e., so that it will notturn on after ZCC). As mentioned above, use ofthe DARLSCR gives rapid turn-on, even with timing capacitors of 2500-uf nominal value. This is importantfor inductive loads such asfluorescents, to prevent blinking. (It should be mentioned that the phenomena involved with regenerative-switch turn on might profitably be studied by observing the "slow-motion" turn-on of a regular regenerative switch with a large-value capacitor across input.) When said regenerative switch has turned on, LED 27a gives visual indication (in the prototype, it was of red color).Zener86 improves accuracy, by regulating the supply voltageforthe timing; it might be desired to include a diode in series with it (and bridge minus) to temperature correct diode 115, which later prevents discharge ofreservoircapacitor 117.

Said timer regenerative switch will remain on, and the load will remain unpowered, until the early morning (or later, possibly, on a cloudy day), when LDR 7 resistance will drop, causing discharge (accord ing to the time constant) of capacitor71 a, and turning off of I.h. transistor 68, which will turn photo-control regenerative switch 17c-18a on. This voltage change is coupled to capacitor 108 (low-value, so as not to latch regenerative switch on), which charges (this capacitor stabilizes regenerative switch operation), and turns on light regenerative switch 17c-18a.As there is now a voltage drop across said regenerative switch load, resistor84a and LED 27b,transistor 15b is saturated due to base current via resistor 109, and in turn supplies base currentthrough high-value resistor 111, to transistor 15b, after delay capacitor 121 charges up.

The time for 121 to charge should be at least 2 - 3 times the monostable off-period, to prevent spurious discharge of timing capacitor when monostable fired due to powerfailure under low-ambient-lightconditions (i.e., while the timer is timing, or after end of timing period, at night). Once 121 reaches the proper voltage, capacitor 15 is rapidly discharged via the discharge transistor: since the transistor is saturated, its voltage is very low, so that a very low voltage remains on capacitor 15.

As mentioned, capacitor71a is increased: this increases the non-stableon-stateofthe monostable, which is done to prevent immediate reaction to rapid ambient light changes, e.g., if a bird, etc., crosses the photo-sensor's light path; the inertia is nonsymmetrical, in that change of state is slow from light to darkness, but more rapid, from darkness to light Capacitor 11 7a is also increased, as mentioned, as the monostable is still an on-delay device, so that, whenever the voltage across zener 1 20a drops enough, I.h. transistor 68 turns off, and will remain so forthe monostable timing period.Therefore, after initial turn-on, capacitor 11 7a will regulate justwhen the voltage across zener 1 20a will drop enough to turn the device off. So, by changing said capacitor in value, the period in which the device is immune to shut-off by powerfailure, etc., may be varied. However,the ratio of capacitors 71 to 71 a determines the speed with which change of state can take place, and therefore the effectiveness of capacitor 1 17a to impede shut-off, more for a low ratio, almost none for 1:1 values, while the speed of state change is in opposite direction, being slowed down by a low ratio.

Discharge transistor 1 5a may be connected so that the emitter of transistor 1 7cfeeds its base directly (i.e., the base-emitter diode oftransistor 1 5a is connected between transistor 17c emitter and bridge minus), while the output from collector of transistor 68 is connected via a resistor to the input of regenerative switch, i.e., to base oftransistor 17c. In this case, a very-low-value resistor is connected across transistor 1 5a's base-emitter, whereby an even-lower saturation voltage is attained.

On a bright day, the photo-control regenerative switch, after having sided in discharging timing capacitor 15, takes over, and LED 27b turns on (yellow in prototype). Voltage across it, and regenerative switch 17c-18a, however, remaining enough forzener 1 20a and diode 115a drop, so that proper monostable action is assured. On a cloudy day, although the photo-control regenerative switch may discharge the timing capacitor 15,the monostable may revertto the stable state, so that the device controlled mayturn on, for some period: this may be desirable, for example, if lighting is controlled, etc. The sensitivity is controlled by resistors 21 -21 a, one or both ofwhich may be optional.The higherthe value ofthe combination 7 21 - 21 a, the earlier in the daythetriacwill be ableto turn on, to supply power to the load.

Capacitor 78a stabilizes the monostable against power-line noise. Capacitor79b is a low-value elec trolyticwhich improves monostable state change.

LED 27 (green in prototype) indicates triac is enabled.

Zeners 29a - b improve operation at higher ambient temperatures, to prevent spurious triggering during shunting.

The above actionswill repeat diurnally; since, depending on the geographic location, the difference in day length between the equinoxes and the solstices can be an hour or more, timing resistor 16 may have to be varied accordingly, throughoutthe year. Changing ofthetime-constant 15 - 16may be accomplished by push-button switches, or any other means.

FIG. 6a brings a simpler photo-controlled interval timer, with some similarfeatures, such as the timing section, which is identical to that of FIG. 5, as well as the gate-feed circuit. In the light-controlled shunt however, regenerative switch 95a-c is now directly controlled by LDR 7 voltage, change of which is delayed by capacitor 124 against sudden ambient light changes.

Said regenerative switch when turned on will conduct currentfrom resistor 11,so that normally-on transistor 10, which is biased by said resistor 11 to shunt the gate current and turn triac off, will be turned off itself, allowing triacto conduct. When, under high-ambient-light conditions, regenerative switch will be forced off, transistor 10 will shunt the triac off.

Resistor 11 is of high-enough value so that turning on of associated regenerative switch will not shunt triac off.

Thus, in the morning, transistor 10 will come on, shunting triac, and the currentthrough 10's load, LED 27b and resistor84a will cause a voltage drop sufficientto turn transistor 15b on, after dischargedelay capacitor 121 charges up to proper value, which is similarto the circuit of FIG. 5. Similarly, timing capacitor 15 is then discharged by transistor 1 5a, the base of which is fed from transistor 1 5b's emitter. In the evening, light regenerative switch will turn on, turning on triac.The bridge voltage will suddenly rise, and then distinguishing means, zener 130, via resistor 131,will turn on delay-capacitor dischargetransistor 122, which will discharge said capacitor immediately, so that no disturbance of the charging oftiming capacitor 15 can occur by unwanted leakage.

It should be noted that by changing the setting of potentiometer21, different delay characteristics may be obtained: 1) at high setting there is a long delay in power turn-on when the LDR, originally in high ambient light, is suddenly shielded from light; also, after a power break, there is a turn-on delay, as in the previous circuit, but depending on duration of power break, as opposed to the set delay in the previous; 2) at lower settings there is a delay in turning power off when the LDRgoesfrom darknessto light-at near minimum setting, it is impossible to turn power off by light, which might be advantageous in some circumstances; together with this, the powerwill come on soon after a power break ends, as capacitor 124 can recharge rapidly.The light regenerative switch will only go off with ambient light, when potentiometer 21 is near minimum, when the timing regenerative switch is also on, because then the bridge voltage, and therefore the voltage across 7 - 21, is lower. Thus, the beneficial situation that, during the night, no light source can interfere, is attainable, if desired; 3) for intermediary positions, substantial delay v.s.

changes in light, in both directions, is attained.

FIG. 6b is a block diagram of the method.

Both circuits, FIG. and FIG. 6a, have diurnal repeatability of within a few minutes, and timing precision of better than 1 min/h r. For the circuit of FIG.

6, a difference in turn-on time near duskof about40 min was found between potentiometer 21 minimum (early) and maximum (late) settings.

The light regenerative switch of FIG. 6 has very large hysteresis (2 - 3 orders of magnitude) regarding the resistance of resistors 7 - 21 needed to turn it on, v.s.

that needed to force it off once on. This makes it very stable, and also is the reasonforthe rapid change from one state to the other, once necessary resistance reached. Such rapid change is beneficial in the turn-on of a fluorescents, which were observed to come on immediately.

Any circuit with good hysteresistic characteristics can be used in place of the regenerative switch above, e.g., a Schmitttrigger, although an interface may be needed to raise input impedance.

FIGS. 7 d-e exemplify a missing-phase relay which also will function as an undervoltage relay for large-enough deviations from the set voltage. N.C.

relay la, FIG. 1 5d, isthe load ofthetriac of FIGS. la + 1 i, with opto-coupler of FIG. 1 i reproduced here in FIG.

15e. When the said opto-coupler is turned on, it will shunt the triac gate, and the relay will be de-energized.

Since it is an N.C. relay,the three phase contacts R, S, and Twill be connected to outputs 40a-c, energizing the three-phase load connected to same. The input of the coupler is fed from the combined and smoother voltages developed by currents flowing through resistances 61 a-c, from R, S, and T, respectively and independently, to neutral (ground). When one of the phases is missing,the voltage developed will not suffice to pass zener 33, and the opto-couplerwill be off, so that the three-phase output of40a-cwill be cut off. Diodes 59a-f steer the current to the capacitors 31 a-c, and isolate them to prevent discharge. The said capacitors hold over the opto-couplerwhen ground is negative v.s. R, S, and/orT, and also give a time-delay in case of short phase imbalance, before the optocouplerturns off, and also before itturns on again. The N.C. relay may also have N.c. contacts so that warning lamps maycome on whenthe relay pulls in.The same principle may be used for a low-voltage relay, where too-low voltage will not suffice to pass zener 33; for a one-phase system, triplication is unnecessary, of course.

Claims (47)

1. A switching or control circu it for controlling or switching the flow of electric currentfrom an essentially-sinusoidal alternating-current source via a normally-closed powerthyristorto an apparatus load comprising: permanent static-impedance gate-feed means admitting gate currentthe maximum value of which is from 1 to 1.414times the minimum necessary for required initial gate firing of said thyristor at prevalent conditions, and the phase angle of which is such that said maximum gate current occurs within 45" el. of said load zero current crossing; permanent gate-protector means, and gate-tap means connecting said gate-feed means to said thyristor gate from MT2/anode side; gate shunting means, whereby gate shunting increases sufficiently, either abruptly or steadily, at switching or control point, to cut off said thyristor load to degree required; and, interface means connecting said gate shunting means to said gate-tap means.

2. A circuit according to Claim 1 wherein said maximum gatecurrentisthe minimum necessary to initially fire gate of said thyristor at prevalent conditions, and the phase angle of which is such that said maximum gate current occurs at said load zero current crossing.

3. A circuit according to Claim 1 wherein said maximum gate current is 1.414 times the maximum necessary to initiallyfire gate of said thyristor at prevalent conditions, and the phase angle of which is such that said maximum gate current occurs at 45" el.

from said load zero current crossing.

4. A circuit according to Claim 1 wherein said load is a partially inductive load with phase angle , and said gate-feed means is a partially capacitive means with phase angle g = 25 - 900.

5. A circuit according to Claim 1 wherein said load is a partially inductive load, and said gate-feed means is a partially capacitive means with phase angle -45 .

6. A circuit according to Claim 1 wherein said load is a partially inductive load, and said gate-feed means comprises the parallel combination of feed resistor and a feed capacitor, said feed capacitor in series with a proper low-value safety resistor.

7. A circuit according to Claim 6wherein said feed-resistorvalue is given by Rf = Z/cos(a,, and said feed-capacitorvalue is given by Cf = sing/wZ, wherein Z is the maximum impedance of said parallel combination giving minimum desired gate current at peak mains voltage, and w is mains frequency in radians.

8. A circuit according to Claim 1 wherein said gate shunting means is steadily increasing, and wherein said interface means includes abruptswitching means, which said switching means may be either temporary or permanent, whereby switching abruptness increased.

9. A circuit according to Claim 1 wherein said thyristor may be any one ofthe group comprising: a triac; and, a SCR.

10. A circuit according to Claim 9 wherein the combination of gate feed, gate-protector resistor, and gate-tap means is connected to said thyristor gate from before said controlled or switched load, where said load is on MT2/anode side ofthyristor, and where quasi-d.c. gate firing is attained.

11. Astaticswitching circuit according to Claim 9 wherein said gate shunting means comprises the series combination of a mechanical switch and a proper low-value resistor, and which said combination is connected directly across gate and MT1/ cathode.

12. A circuit according to Claim 1 wherein the said apparatus load is an electromechanical relay.

13. An automatic-reset circuit according to Claim 1 wherein said cutting off ofthyristor load current is automatically reversed upon sufficiently lowering said gate shunting, thereby allowing load currentto flow.

14. An abrupt manual-reset circuit according to Claim 1 wherein said cutting off ofthyristor load current at switching or control point is rapid, and for bidirectional thyristors, may be in one mode only or simultaneous in both modes, and which additionally comprises: latching means, whereby arrival of shunting means at said switching point causes permanent gate current removal; and, reset means, whereby, after said gate shunting reduced, said latching is rapidly negated by external means.

15. A circuit according to Claim 9wherein bidirectional semi-conductor means is switched or controlled in only one mode, the second mode always conducting, where said bidirectional semiconductor means is one of the group comprising: a triac; and, the combination of a SCR back-to-back with a diode.

16. A circuit according to Claim 1 wherein said gate shunting means is one or both of the group comprising: avariable-sensor; and, a switch means, where said switch means may be one or more of the group comprising: a mechanical switch contact means; and, a semi-conductor switch.

17. A circuit according to Claim 16 wherein any number of properly connected parallel gate shunting means are combined, whereby a NOR-logic circuit is formed such thatonlythe absence of total said sufficient gate shunting will allowthyristorto remain on.

18. A circuit according to Claim 1 or 17 wherein said gate shunting means is/are directly connected across gate and MTI/cathode, optionally via low-value gate-shunt-protector resistor.

19. Acircuit according to Claim 1 wherein said interface means is one or more of the group comprising: diode, for SCR thyristor; transistor current-amplifier means from said gate-tap means to cathode/MT1 Where input said currentamplifier means connected to said gate-shunting means; diode bridge from said gate-tap means to MT1 oftriac, where d.c. bridge output connected to said shunting means; the combination comprising diode bridgefrom said gate-tap means to MT1 of triac tog ether with transistor current-amplifier means connected across said d.c.

bridge output and where input said current-amplifier means connected to gate shunting means; and, the combination comprising two parallel transistor current-amplifier means of opposite polarity, con- nected from said gate-tap means to MT1 of triac, where combined input of said current-amplifier means connected to said gate shunting means.

20. A circuit according to Claim 14, where latch means are provided from an interface or gate shunting means, comprising in partatransistorcurrentampli- fier, by addition of opposite-polaritytransistorto form regenerative switch, where said transistor current amplifier is chosen from the group comprising: single transistor; input or output member of Darlington; and, transistor-member of opto-electric counter, where said reset means is provided by external means interrupting said regenerative switch conduction, and where a low-value series resistor protects said regenerative switch from momentary current peaks.

21. A separate switching or control ci rcuit contain- ing the said circuit of Claim 1 with means connecting to a.c. mains; means connecting to load, which both said connecting means may be chosen from the group comprising: socket; plug; and interlock, and where said gate shunting means may be at a distance from said unit, connected by proper insulated connecting means.

22. Asolenoid-valveswitching or control circuit according to Claim 15 wherein said bidirectional semiconductor means originally conducting in both modes, whereby solenoid originally receives full pulsating-d.c. power, whereby said gate shunting means is a time-sensor comprising charging capacitor, current-source means and regenerative switch, where said capacitor connected across said regenerative switch input, and whereby power reduced to half-wave d.c. at end of timing period.

23. Acircuitaccordingto Claim 16wherein said switch means is semiconductor multivibratortimebase means wherein output of said time-base means causes shunting of said thyristor gate, said shunting occurring after time base switches, where time-base output chosen determines nature of control, and whereby load current varies accordingly.

24. An interval/delay timing circuit according to Claim 23 wherein switch means is a monostable multivibrator means, where thyristor gate shunted or unshunted until end oftiming period, according to output taken.

25. An interval timing circuit according to Claim 14 where gate-feed is quasi-d.c., where said latching means comprises regenerative switch means interfaced with said gate-tap means, input of said regenerative switch being connected to timing capacitor, leakage of said timing capacitor having sufficientlysmall value, said timing capacitor being fed by current-source meanswherebyan increasing d.c.

voltage appears across it with increasing time passage according to total charge accumulated across said capacitor, where said voltage causes increasing cu rrentflow across emitter-base junction of said regenerative switch input, whereby said thyristor may be cut off simultaneously in both modes at end timing period in case oftriacthyristor, where said reset means reduces said timer-capacitorvoltage below minimum necessary for cut-off, and where timing period increased by one or more of the group of means comprising: increasing capacitor value; reducing capacitor charging current; and, increasing leakage across said capacitor.

26. A cycling relay circuit according to Claim 23 wherein said switch means is an astable multivibrator means, in combination with proper current-amplifier means, where thyristor gate alternately shunted and unshunted, whereby load current goes off and on accordingly.

27. An interval-timer circuit with delayed turn-on according to Claim 17,24, or 25 where a NOR-logic circuit is formed from the combination of a regenerative-switch interval timer in proper parallel combination across and with proper interface with said gate-tap means, with monostable-multivibrator means and proper high-impedance current-transformer means, wherein thyristor held initially off for delay period, wherein thyristor on fortiming interval minus said delay period, and off again after timing interval ends.

28. Atwo-mode interval timing circuit according to Claim 25 wherein said thyristor a triac, wherein two independent back-to-back regenerative-switch interval timers connected across gate tap, wherein timing period of one said interval timer different from second said interval-timer period, whereby one mode cut off before other, giving half-poweroperation in remaining mode until end second said timing period, and where reset simultaneous in both modes.

29. In a circuit according to Claim 23,27, or 28, the use of reservoir-capacitor means to hold over shunting means near zero-current crossing of gate current.

30. A touch-to-permanent-off switching circuit according to Claim 14, where said latching means comprises the combination of regenerative-switch means suitably interfaced with gate-tap means, with suitable contact means connected to base of each transistor member respectively, via two or more high-value safety resistors, with transient-protection means across input-transistor emitter-base, where cut-off immediate, amd simultaneous in both modes fortriac, and where reset immediate by reset-switch means.

31. An interval-timer circuit according to Claim 29 wherein said reservoir-capacitor means is identical with timing capacitor, time constant said capacitor and base-emitter input resistance at regenerativeswitch saturation point large enough to hold over said regenerative switch at gate zero-current crossing.

32. Atwo-mode interval timing circuit according to Claim 28 wherein load is a fluorescent device, wherein timing period of both said regenerativeswitch means close enough notto cause damage to said fluorescent device, and where switching on of one regenerative-switch means reduces light power output, giving warning of impending darkness.

33. A self-powered discrete-component circuit according to Claim 23 wherein said multivibrator time-base means comprises two hig h-hFE transistors for multivibrator in combination with two orthree high-hfE transistors forming Darlington or regenerative-switch amplifier, said amplifier amplifying chosen output said multivibrator, said multivibrator coupled to said amplifier via series resistor of value which will not significantly change timing period, or via diode, output said current amplifier shunting gate via gate-tap interface means, said multivibrator being powered from 1 -8 - 2.1-volt zener or series-diodes means, said zener- or series-diodes means being in turn powered from said gate-tap means via resistance, and optionally reservoir capacitor means.

34. A circuit according to Claim 33 where said multivibratortime-base means an astable multivibrator, the improvement to which comprises bypassing the base-emitterof non-outputtransistorwith suitab capacitor, whereby timing function stabilized against EMI.

35. A circuit according to Claim 33 where said multivibratortime-base means a monostable multivibrator, the improvement to which comprises bypassing the base-emitter of output transistor with suitable capacitorwhereby switching to non-stable state upon power-up or powerfailure assured.

36. Aself-powered circuit according to Claim 23 wherein said multivibratortime-base means is a MOS, or similar, low-power means, such as the SCL4528.

37. Acircu it as in Claim 1 the improvement to which comprising the addition oftransient-bypass means, which said means may be chosen from the group: connection of suitable capacitorfrom gate-tap means to cathode, for SCR; connection of suitable capacitor across bridge output from gate-tap means, fortriac; connection of suitable capacitor across gate-MT1/cathode; connection of va riator across thyristor.

38. A photo-controlled interval timer with variable delayed turn-on option according to Claim 17,24, or 25 where a NOR-logic circuit is formed from the combination of a regenerative-switch interval-timer means, in proper parallel combination with and with proper interfacewith said gate means,togetherwith light-controlled shunt means; connected to said light-controlled shunt means is propercurrent-trans- former means, also connected to said light-controlled means a light-sensitive controlling means, with timing-capacitor discharge means slaved in said shunt means via discharge-delay means, whereby enablement of said shunt means discharges timing capacitor of said interval timer, after discharge-delay period, wherethyristororiginally held offforturn-on delay period, where thyristor on for timing period, and off again aftersaidtiming interval, in low-lightcondi- tions; where thyristor held off in high-light conditions; where said discharge-delay period sufficiently larger than turn-on delay period, and where said dischargedelay means reset in low-light conditions at com mencementoftiming period.

39. A photo-controlled interval timer according to Claim 38 wherein the regenerative-switch timer means is a DARLSCR, the shunt means a multivibrator or regenerative switch, the current-transformer means a second regenerative switch or transistor, respectively, the light-sensitive means an LDR, the timing-capacitor discharge means a low-saturationvoltage transistor, the discharge-delay means a timeconstant, and where the turn-on delay can be increased by increasing either ofthe multivibrator capacitances, or both.

40. A photo-controlled interval timer according to Claim38theimprovementtowhich comprises: employment of abrupt reset meansfor resetting said discharge-delay means; and a distinguishing means whereby said abrupt reset means enabled only when said bridge voltage is high, wherein said dischargedelay means a time-constant, said abrupt-reset means a low-saturation-voltage transistor, and said distinguishing means a zener diode suitably connected to the bridge.

41. A photo-controlled interval timer as in FIG. 5 wherein the inertia toturn-offat power failure can be increased by increasing the monostable reservoir capacitor.

42. A photo-controlled interval timer according to Claim 38 wherein an electronic Shabbat clock is attained.

43. A photo-controlled interval timer according to Claim 38 wherein a burglarfoileris attained.

44. A diurnal timer according to Claim 38 or40the improvement to which comprises addition of attachment means such as such as suction cups and/or brackets for attachmentto window giving access to outside ambient light

45. The use or manufacture for use of any integrated circuit according to Claim 1.

46. A switching or control circuit substantially as described herein with referenceto Figures 1-7 ofthe accompanying drawing.

47. Asolid-state missing phase/undervoltage relay according to Claim 12 or 16 wherein said thyristor load is a normally-closed mechanical relay supplying a main load with proper number of phases, wherein application of gate shunting will cut off thyristor, not allowing said relay to pull in, whereby power is supplied to main load, where said line voltage is divided by voltage-divider means and said divided voltage rectified, smoothed, and delayed by capacitor means for each phase independently, said smoothed voltage added to total peak voltage fraction, said total voltage applied to voltage-sensor means which said means is isolated galvanicallyfrom thyristor,whereby undervoltage due to missing phase or other cause will haltthyristor shunting, whereby said mechanical relay will energize and pull in, whereby powerto main load will be completely cut off.