GB2111348A - V.F. receivers for use in digital switching systems - Google Patents

Abstract

A 1VF receiver is used to extract 1VF signalling tone (2,280 Hz) from p.c.m. speech channels using recursive filter techniques. Four filters (FILTER 1; FILTER 2; FILTER 3; and FILTER 4) are used to serve a full 32 channel p.c.m. data stream i.e. each filter serving 8 channels. To test the operation of the receiver test tones are injected into certain of the channels corresponding to each of the four filters. As the normal operation of the channels can not be disturbed, during testing, vacant channels 0 or 16, corresponding to time-slots TSO or TS16, are employed to temporarily transfer channel data while the test is performed. Because of the nature of the recursive filters a channel data overlap period is required both before and after the test. Accordingly during the overlap periods, data in the channel to be injected and the channel to which data is to have data temporarily transferred to it has identical data for a short period of time. To effect this two temporary buffer stores (BS1 and BS2) are employed in the receiver the relevant data being switched to and from the stores (switches S2 and S5) as appropriate. Test results are stored in a test result store (TRS). <IMAGE>

Description

SPECIFICATION V.F. receivers for use in digital switching systems.

The present invention relates to v.f. receivers for use in digital switching systems employing time division multiplexed data channels in a pulse code modulated data stream.

According to the present invention, there is provided a voice frequency receiver for use in a digital switching system in which the receiver comprises a pulse code modulated input path carrying a stream of data channels the input path being connectable to a plurality of recursive filters by means of a demultiplexer, each recursive filter being dedicated to handle a different plurality of said data channels, a pulse code modulated output path to which the recursive filters are connectable by a multiplexer, test signal source means and channel data transfer means, wherein the receiver is so arranged that in order to perform a test on any of the plurality of recursive filters a test signal from said test signal source means is injected into one of the channels associated with the recursive filter to be tested, said channel data transfer means previously temporarily transferring the channel data of said one channel to a vacant channel of the stream of data channels associated with one of said recursive filters other than the recursive filter to be tested.

The invention will be better understood from the following description of an exemplary embodiment which should be read in conjunction with the accompanying drawing in which; Fig. 1. shows a schematic circuit diagram of the use of recursive filters for extraction of signalling information from a pulse code modulated (p.c.m.) channel; and, Fig. 2. shows a further schematic circuit diagram of a 1 VF receiver in accordance with this invention.

One of the functions of a 1 VF tone receiver is to extract 2280 Hz signalling information from a pulse code modulated (PCM) channel. The detection and verification of the 2280 Hz signal is accomplished by second order recursive filters.

Due to the computation speed of the hardward, one filter is arranged to handle 8 channels only.

Therefore, a 32-channel PCM stream would require 4 identical filters to cover all channels. The block diagram shown in Fig. 1. illustrates this concept, switch SD serving as a demultiplexer and switch SM serving as a multiplexer.

It is desirable to incorporate testing facilities into the receiver, however, testing must be achieved without stopping any channels from normal operation. As far as the filter is concerned there are two vacant slots (TSO and To16), which can be utilised to carry out the test. Accordingly, to implement this, a test signal in the form of test tones (ON and OFF) is injected, via these timeslots (TSO or TS 16) into the filter under test. This method, however, can only test FILTER 1, since both time-slots TSO and TS 16 go to FILTER 1.

To overcome this problem, a method of channel data transfer is adopted. For simplicity, FILTER 1 and FILTER 2 are used to illustrate the channel data transfer method, and it should be understood that this concept can easily be extended to the testing of the other two filters.

The principle of this method is to transfer the channel data which goes to the filter under test to either time-slot TSO or TS 6. For instance, data oí time-slot TS 1 is switched to FILTER 1 in time-slot TSO, while time-slotTS1 is used to carry test tones for FILTER 2. Subsequently, the transferred data of time-slot T51 (the data now in time slot TSO) is output in time-slotTS1.

The characteristics of a recursive filter are such that the output depends on the present input as well as the previous outputs, therefore, care must be taken in switching channel data from one filter to another filter. Internal stores of the two filters should be equal, or very close, before a switch over takes place. To guarantee this, the two timeslots, concerned with data transfer are overlapped before switching of data is affected. For instance, the data of time-slot TS1 will occupy both tineslot TSO and time-slot TS 1 concurrently for a period long enough to prevent the switching from affecting the filtering characteristics. For the same reason, a corresponding overlap is required following the test.The overall test sequence can be summarised as:-- overlap; channel data transfer; apply test tones; overlap.

A more detailed description of the operation will be discussed with reference to the block diagram shown in Fig. 2. switches S1 to S6 are shown symbolically for the ease of explanation and look very different in the actual hardware implementation. The switches are controlled from a common control logic CONT which in turn is fed with timing pulses from a common channel frame counter CLK.

Switches S3 and S4 are used for the demultiplexing and multiplexing respectively the channels in respect of the four filters, FILTER 1; FILTER 2; FILTER 3; and FILTER 4, and they are identical with those switches SD and SM respectively shown in Fig. 1. Switch S1 latches data from the input IP into a temporary buffer store RS 1, while switch S2 controls the injection of test tones and channel data transfer.

Rearranging the disturbed channel sequence back into the normal order for transmission to the output OP, is accomplished by switches S5 and S6. It should be noted that the input to the filters is preceded by a unit ALL which is an A-law-tolinear coding device.

During the first data overlap period, no test tones are injected. In time-siot TS 1, switch S1 is closed, while switch S2 is switched to position 1.

Time-slot TS 1 data which is now stored in a temporary store BS1 is transferred to time-slot TSO by switching switch S2 to position 2 during time-slot TSO. As a result, time-slot TSO and timeslot TS 1 contain identical data or information, thus overlapping is achieved. Switch S5 is connected to position 3 and switch S6 in position 2 during overlapping since the channel sequence is not disturbed.

When the two time-slots have been overlapped for a predetermined period of time, time-slot TSO is ready to take the place of time-slot TS 1, and test tones from a test signal source TT can then be injected into time-slot TS 1 to test Filter 2. During channel data transfer, switch S1 operates the same way as before, but switch S2 is switched to position 3 in time-slot TS 1 to inject the test tones.

Test results are stacked in a test result store TRS, via switch S5 position 1 , during the output of time-slotTS1 from FILTER 2. The data of time-slot TS1 previously transferred to time-slot TSO and stored in a temporary buffer store BS2 through position 2 of switch 5, is output in time-slot TS1 through position 1 of switch S6.

It should be noted following the test tone injection, a second channel overlap period is required, and the sequence of operations of switches S1 to S6 is similar to that described for the first overlap period.

Time-slots Tis 18 and Tis 19 are the channels used for testing FILTER 3 and FILTER 4 respectively and the sequence of operations is similar as those described in connection with FILTER 1 and FILTER 2.

Claims (9)

1. A voice frequency receiver for use in a digital switching system in which the receiver comprises a pulse code modulated input path carrying a stream of data channels the input path being connectable to a plurality of recursive filters by means of a demultiplexer, each recursive filter being dedicated to handle a different plurality of said data channels, a pulse code modulated output path to which the recursive filters are connectable by a multiplexer, test signal source means and channel data transfer means, wherein the receiver is so arranged that in order to perform a test on any of the plurality of recursive filters a test signal from said test signal source means is injected into one of the channels associated with the recursive filter to be tested, said channel data transfer means previously .temporarily transferring the channel data of said one channel to a vacant channel of the stream of data channels associated with one of said recursive filters other than the recursive filter to be tested.

2. A voice frequency receiver as claimed in claim 1, in which a first buffer store stores input channel data of the said one channel.

3. A voice frequency receiver as claimed in claim 2, in which said input channel-data is arranged to be transferred to said vacant channel ciuring said vacant channel time.

4. A voice frequency receiver as claimed in claim 3, in which the input channel-data in said one channel and said vacant channel are identical for a predetermined period of time providing a first data overlap period.

5. A voice frequency receiver as claimed in claim 4, in which following said predetermined period of time said test signal is injected into said one channel.

6. A voice frequency receiver as claimed in claim 5, in which the test signals are tones which produce test results which are stacked in a test result store when said test results are output from the filter under test during said one channel output time.

7. A voice frequency receiver as claimed in claim 6, in which a second buffer store stores output channel-data of said one channel during said vacant channel time.

8. A voice frequency receiver as claimed in claim 7, in which said output channel-data is output during said one channel output time.

9. A voice frequency receiver as claimed in claim 8, in which said output channel-data in said vacant channel and said one channel are identical for a predetermined period of time providing a second data-overlap period.

1 0. A voice frequency receiver substantially as described herein, with reference to, and as shown, in Fig. 2. of the accompanying drawings.