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GB2194658A - Circuit and process for coefficient transmission - Google Patents

Circuit and process for coefficient transmission

Info

Publication number
GB2194658A
GB2194658A GB08719958A GB8719958A GB2194658A GB 2194658 A GB2194658 A GB 2194658A GB 08719958 A GB08719958 A GB 08719958A GB 8719958 A GB8719958 A GB 8719958A GB 2194658 A GB2194658 A GB 2194658A
Authority
GB
United Kingdom
Prior art keywords
coefficients
transmission
ram
addresses
sets
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
GB08719958A
Other versions
GB2194658B (en
GB8719958D0 (en
Inventor
Thomas Hirschberg
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Bosch Telecom GmbH
Original Assignee
ANT Nachrichtentechnik GmbH
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by ANT Nachrichtentechnik GmbH filed Critical ANT Nachrichtentechnik GmbH
Publication of GB8719958D0 publication Critical patent/GB8719958D0/en
Publication of GB2194658A publication Critical patent/GB2194658A/en
Application granted granted Critical
Publication of GB2194658B publication Critical patent/GB2194658B/en
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/76—Arrangements for rearranging, permuting or selecting data according to predetermined rules, independently of the content of the data
    • G06F7/78—Arrangements for rearranging, permuting or selecting data according to predetermined rules, independently of the content of the data for changing the order of data flow, e.g. matrix transposition or LIFO buffers; Overflow or underflow handling therefor
    • G06F7/785—Arrangements for rearranging, permuting or selecting data according to predetermined rules, independently of the content of the data for changing the order of data flow, e.g. matrix transposition or LIFO buffers; Overflow or underflow handling therefor having a sequence of storage locations each being individually accessible for both enqueue and dequeue operations, e.g. using a RAM
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04H—BROADCAST COMMUNICATION
    • H04H60/00—Arrangements for broadcast applications with a direct linking to broadcast information or broadcast space-time; Broadcast-related systems
    • H04H60/02—Arrangements for generating broadcast information; Arrangements for generating broadcast-related information with a direct linking to broadcast information or to broadcast space-time; Arrangements for simultaneous generation of broadcast information and broadcast-related information
    • H04H60/04—Studio equipment; Interconnection of studios

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Mathematical Physics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Signal Processing (AREA)
  • Complex Calculations (AREA)
  • Information Transfer Systems (AREA)
  • Cable Transmission Systems, Equalization Of Radio And Reduction Of Echo (AREA)

Abstract

Sets of coefficients have to be fed in close succession and in an alternating manner from one of two RAM memories (RA, RB) to a transmission component (U) for digital signals, for example a level selector, comprising a channel processor (KP). The sets of coefficients coming from a processor, (P) which can be controlled by an adjusting element, arrive in alternation at the RAM memory which precisely is not delivering its memorized data to the channel processor (KP). In the event of fast transmission of the coefficients, the obstacle is that the latter have to be stored in the RAM memories under disseminated addresses. A transmission circuit (AR, DR, S1 to S8), in which the RAM addresses and coefficients are stored in an intermediate memory in parallel under the same continual addresses supplied by an address generator (AG), ensures rapid transmission of the coefficients.
GB8719958A 1985-08-02 1986-06-10 Transfer circuit and transfer process for the transfer of co-efficients Expired GB2194658B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE8522297 1985-08-02

Publications (3)

Publication Number Publication Date
GB8719958D0 GB8719958D0 (en) 1987-09-30
GB2194658A true GB2194658A (en) 1988-03-09
GB2194658B GB2194658B (en) 1989-08-16

Family

ID=6783811

Family Applications (1)

Application Number Title Priority Date Filing Date
GB8719958A Expired GB2194658B (en) 1985-08-02 1986-06-10 Transfer circuit and transfer process for the transfer of co-efficients

Country Status (4)

Country Link
JP (1) JPS63501451A (en)
DK (1) DK161087D0 (en)
GB (1) GB2194658B (en)
WO (1) WO1987000943A1 (en)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5023913A (en) * 1988-05-27 1991-06-11 Matsushita Electric Industrial Co., Ltd. Apparatus for changing a sound field
DE4334151C2 (en) * 1993-10-03 1995-07-20 Stage Tec Gmbh Digital signal processing method for mixing input signals to output signals
DE19829289C2 (en) * 1998-06-30 2001-12-06 Siemens Ag Method for calculating the coefficients of a non-recursive digital filter

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4334287A (en) * 1979-04-12 1982-06-08 Sperry Rand Corporation Buffer memory arrangement
GB2102603A (en) * 1981-07-23 1983-02-02 Rca Corp Controlled ram signal processor
US4479240A (en) * 1981-09-29 1984-10-23 Mckinley Jr Robert H Audio mixing console with control element position storage

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5564693A (en) * 1978-11-06 1980-05-15 Nec Corp Buffer memory unit

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4334287A (en) * 1979-04-12 1982-06-08 Sperry Rand Corporation Buffer memory arrangement
GB2102603A (en) * 1981-07-23 1983-02-02 Rca Corp Controlled ram signal processor
US4479240A (en) * 1981-09-29 1984-10-23 Mckinley Jr Robert H Audio mixing console with control element position storage

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
PATENTS ABSTRACTS OF JAPAN, VOLUME 4, NO 107 (P.21)(589)31 JULY 1980 *

Also Published As

Publication number Publication date
DK161087A (en) 1987-03-30
WO1987000943A1 (en) 1987-02-12
DK161087D0 (en) 1987-03-30
JPS63501451A (en) 1988-06-02
GB2194658B (en) 1989-08-16
GB8719958D0 (en) 1987-09-30

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Legal Events

Date Code Title Description
PCNP Patent ceased through non-payment of renewal fee