GB2188212A - Single frequency transceiver - Google Patents

Abstract

For duplex operation on a single frequency, a single oscillator 5 drives a transmitter circuit and a superhet receiving mixer on a time-sharing basis. It assumes the necessary frequencies by open loop control, switching between values in stores 6, 9. Frequency stabilisation means 14 periodically checks the oscillator frequencies and updates stores 6, 9 as necessary. May be used in cordless telephones. <IMAGE>

Description

SPECIFICATION Singlefrequencytransceiver The present invention is concerned with single frequency duplex radio transmission and more particularlyto a transceiver for such communications. In systems of this type a single radio channel is used on atime-sharing basisfortransmission and reception alternately. Such a system is described in UK patent application serial No 2109197A.

Clearly switching between the transmit and rece ive functions must occur at sufficiently high rate that communication appears two the user to be continuous. For example for speech transmission (eg for a cordless telephone), durations of operation may typically be ofthe order of 1 ms in each direction if unacceptable system delays are to be avoided.

The system described in the above-mentioned patent application employs a direct-conversion receiver, so that the transmit frequency and receiver local oscillatorfrequency are the same and a single continuously running oscillator can be employed.

However the performance of direct-conversion receivers is not well-defined for many applications and the present invention proposes the use of a superheterodyne receiver. This of course requires a local oscillatorfrequency offset from thetransmitfrequ- ency, and hence requires eithertwo oscillators ora single switches frequency oscillator. The former poses severe difficulties in achieving adequate trans mitterattenuation during reception, whilst the latter poses other problems in that the conventional phase-locked loop arrangement is not capable offollowing imposed frequency changes with sufficient speed.

According to the present invention there is prov ided a transceiverfor single frequency duplex oper- ation including a superheterodyne receiver and a transmit oscillator having an input for open loopfrequency control, means for supplying to the control input, during transmit operation, a stored value determing the transmit frequency, and feedbackfrequency stabilisation means for updating the stored value.

Thus effectively the control loop is broken but its state "frozen" between transmit periods, so that it can rapidly recover a stable state upon the resumption of transmission.

In principle a separate receiver local oscillator could be used, the transmitter oscillator being shifted to an unobjectionablefrequency, or even prevented from oscillating, during reception, but preferably a single oscillator is used for both functions.

Thus in a preferred arrangement the invention provides a transceiver for single frequency duplex operation having a single oscillator arrangement for providing transmitter carrier and a receiver local oscillatorsignal,whereinthe receiverisasuper- heterodyne receiver, and the oscillator arrangement comprises an oscillator having an input for open loopfrequencycontrol, meansforsupplyingtothe control input stored values determining alternately and the transmit frequency and the local oscillator frequency, and feedback frequency stabilisation means for updating the stored values.

Some embodiments ofthe present invention will now be described with reference to the accompanying drawings, in which: Figure lisa block diagram of a transceiver according to one embodiment ofthe present invention; Figure2 illustrates switching waveforms em ployed inthetransceiver; Figures3and 4 illustrate alternative forms forthe RFhead.

Figure5illustrates in more detail thefrequency stabilisation arrangement of the transceiver; Figure 6 is a block diagram ofmicroprocessorcon- trolled version of the transceiver; and Figures 7and 8aretiming diagrams illustrating the power-up, channel-seeking and operational sequences of the transceiver of Figure 6.

The transceiver shown in Figure 1 is intended for single channel, time division duplexing and employs a single oscillator to produce a transmitted output relatively free from spurious emissions, with a superhet receiver.

The apparatus shown is intended for speech transmission. In principle the transmit/receive switching rate might be made high enough to transmit and receive single speech samples alternately (for a 3.5kHz bandwidth this would imply a 3 7kHz switching waveform). It is preferred, though to use a lower rate and compress the signal into bursts of perhaps 1 ms in each direction (ie 500Hz switching). this involves aboutthe maximum delay generally considered tolerable for speech traffic and 1 KHz may be preferred: 500 Hz is assumed in the following description.

The speech may be supplied either in analogue or digital form, and any desired radiofrequencyand form of modulation may be employed.This example assumes digitally coded speech with FM (frequency shift keying) at about SOOMHz, with a channel band width of 100kHz, and may form the base station or handset of a cordless telephone.

Figure 1 shows an antenna 1, RF bandpass filter 2, RF head 3 (which includes receiver mixer and transmitter output stage), receiver IF and demodulator4, and a voltage-controlled oscillator 5. Note that only one or two components are specific to the frequency range covered: by changing the antenna/filter and the via rangethe same hardware can be used on any band within the frequency limits ofthe RF head circuits.

During transmit operation the oscillator 5 oscillates at a frequency in the range 864 to 868MHz by virtue of an appropriate digital value held in a store 6 selected by means illustrated schematically as a switch 7 and supplied via a digital to analogue converter 8 to apply a corresponding control voltage to the oscillator; transmitter modulation may also be applied at this point. Signals from the oscillator 5 are amplified in RF head 3 and pass via the bandpassfilter2totheantenna 1.

During reception the oscillatorfrequency (904 913MHz, for a 45MHz IF) is determined instead by the contents of a digital store 9. Received signals from the antenna 1 pass via the bandpass filter 2 to the RF head 3 where they are mixed with signals from the oscillator; the resultant IF output is amplified and de modulated at4fed to an output 10.

Transmit/receive switching is effected via a 500Hz square wave applied atTIR input 11 (see also Figure 2a).Thisservestoselecttheappropriatestored digital value via the switch 7, and to determine the operation ofthe RF head 3. Itmayalso servefor coarsefrequencyswitching of the oscil lator - as illus- trated by the dotted line in Figure 1.

Considering the RF head 3 in more detail, in rece ive modethe oscillator mixeswith the incoming signal to produce the IF: ontransmitthe mixer is rebiassed to act as an amplifier. Some sort of active balanced mixer would be suited to this application.

Another possibility is to use the amplifier prior to the mixer on receive to give good sensitivity, but toreverse it when transmitting (or used a bi-directional device) as well as un-balancing the mixer (Figure3).

Athird alternative would be to use two amplifiers and a simple changeover switch arrangement at their inputs and outputs (Figure 4). In all these arrangements it may be possible to take advantage ofthe mismatch presented by the antenna filterto the VCO output signal when in receive mode- ie on the transmit frequency the filter presents a matched load, but on the local oscillatorfrequency offers a mismatch which changes the operating condition of the mixer amplifier.

Because the oscillator switching is open-loop, there is no loop filter delay to accommodate and hence the oscillator rapidly assumes its new frequency upon each switching. In order to prevent spurious emissions as a result ofthe switching ofthe oscillator and RF head a gain controlled buffer 12 is interposed in the oscillator output. The buffer is used to both isolate the oscillator from the varying load of the mixer, and to gate it off during the transition between transmit and receive frequencies (and during calibration as discussed below). The waveform (Figure 2b) applied (via input 13) to this gate will have transition times in the order of some tens of microseconds in order to constrain the AM side bands that are generated. This amplitude modulator may also be used to apply some AM to the transmitted waveform in order to constrain its spectrum.

Open loop control ofthe oscillator clearly does not provide adequate frequency stability, as there is no compensation fortemperature, ageing, or supply voltage dependent drift of the oscillator and therefore a frequency stabilisation arrangement 14 is arranged to compare the oscillator outputfrequencies with a frequency reference and to apply any necessary correction to the values stored in the stores 6 and 9.

One possible arrangement is shown in Figure 5 wherein a frequency counter is used for initial calibration and to update the stored values at intervals (selected taking into account the expected rate of drift). Such intermittent operation results in a reduction of power consumption which can be significant for portable apparatus.

In Figure 5 the oscillator output feeds a prescaler (-100)141 andfrequencycounter 142formeasure- ment of the transmit frequency. If the prescalerwere to have count information outputs, it would be possible to employ a count period extending over only a few bursts, or oven just one, but since it acts only as a divider (ie does not provide count information) in order to provide adequate accuracy a counting period extending over an appreciable number of bursts (eg 200) is necessary. To ensure that frequency measurement takes place only when the oscillatorfrequency is stable, 500ms bursts are gated out ofthe 1 mstransmit period by enabling the prescaler withthewaveform of Fig u re 2c applied to terminal 143.Operation during receive is inhibited by supply ing the waveform offig 2a to NAND gate 144. Follow- ing 200 bursts the counter content is latched into latch 145 and the counter reset The contents ofthe latch are compared with the desired frequency stored in a register 146 by a comparator 147. If the two are not equal the comparator outputs as appropriate an up or down signal to an up-down counterwhich forms the register 6 of Figure 1, thereby adjusting the stored value in the appropriate sense to reduce the error.

An identical arrangement is provided forstabilisa- tion of the receive frequency except of course that the Figure 2a waveform is inverted before application to the NAND gate.

Thusfaronlya single transceiver has been described; in operation it is necessary for one of two transceivers in communication to assume the role of master and the other as slave, the switching waveforms of Figure 2 being synchronized by the slave to those ofthe master. Such synchronisation may be achieved by any of the means conventionally used in single-frequency duplex arrangements, and will not, therefore, be described here in detail. However, in the digital system discussed above each transmitted burst may conveniently include a digital framing code, the slave including acomparatorforrecognis- ing the code and synchronising a phase locked loop for generating the waveform of Figure 2a from which the remaining waveforms can be derived.In the case ofthe cordless telephone (base station + handset) it is convenientforthe station originating a call to act as master, so that synchronisation arrangements will be required in both units.

A more sophisticated, multichannel arrangement is illustrated in Figure 6, where the comparators 147, registers 146, and changeover switch are replaced by a microprocessor 15, with associated read-write memory 16, (read-only) program memory 17, and data bus 18. Address and control lines (not shown) enablethe microprocessorto communicate with the memories, to read the contents of the counter latches (designated 145R, 145T) and load appropriate values into the registers 6,9. Modulation ofthetrans- mitter is easily achieved by changing the control word to the VCO. Since the maximum system deviation envisaged (+/-30kHz) is considerably greater than the resolution of the frequency generator, it is possible to use digital shaping of the modulating waveform to generateTFM etc. However, it would probably require the higher resolution (say a 12-bit D/A giving 2.5kHz steps) to be effective. It is assumed that digital modulation is provided by varying the contents of the latch 6 - either by the microprocessor by inserting a hardware adder. A low-pass filter 21 is thus provided on the output of the digital to ana logue converter 8 to remove sampling frequency components.Asource 19 (controlled bycrystal 20) of timing pulses (and microprocessor clock) is also shown; the other parts are as previously described.

This arrangement provides additional control flexibility; in particular, as described below, a chanelseeking facility may be provided. Forty channels, at 100kHz spacing within the above mentioned frequency range, are envisaged.

It may not necessary to store details of each and every channel: it may be sufficient to know the digital values required to generate the extreme channels, and a few between, the remainder being derived by interpolation, but this will depend upon the shape of the VCO frequency/voltage characteristic.

Atypical sequence of events in such a system would be: A. Power up.

The processor measures the frequencies output by at the edges of the receive VCO range by putting all "O" and all "1 " wordsouttothe D/A.

Asimilartest is done on the transmit range.

By interpolation the processor calculates the number required to drive the voltage-controlled oscillatorto the highest and lowest channels ofthe band, andteststhem on both ranges, changing the output word to the D/A if necessary at each channel until the correct frequencies are produced. This repeated on a number of other channels in the rangeto give sufficient information to allow accurate interpolation.

B. Channel sweeping.

The processor outputs a rising binary numberto the D/A, increasing at a rate which is only limited by the response time of the signal detectors in the receiver. Whether it will be better two perform a pseudo linearsweep orwhether itwill be betterto sweep by jumping to discrete channels will depend upon the shape of the receiver IFfilter.

C. Transceive operation.

Once a channel has been found or chosen, it will be necessary to stabilise the receive and transmit oscillators on that channel to allowfortime andtemperature drift. If time division duplexing is employed with 1 ms bursts, there may not be sufficient time to count accurately during each burst, and averaging over several milliseconds may be necessary.

In transmit modethe modulation will upsetthefrequency stablisation loop, but this may be corrected if there is sufficient processor power available to calculate the average frequency from knowledge ofthe modulation sequence.

The rate at which updating is required will depend upon the drift rate ofthe VCO. The optimum time between frequency measurements is therefore some reciprocal function of the error from measurementto measurement.

Othervarious techniques are possibleto improve the performance ofthis frequency stabiliser, such as automatic allowance fortemperature and voltage drift by sensors which output digital values for these parameters to the processor. The limit of complexity ofthe stabilisation algorithm will be determined by the available processor. Atrade-offwill need to be made between the performance of the digital control system and its power consumption.

Figure 7 shows the operation ofthe system from power up. The upper trace shows the oscillatorfre- quency, the second shows the gain of the buffer 12, and the third illustrates the sampling of frequency by the counter chain.

On the first application of power some drift ofthe oscillatorfrequencywill occurdueto heating within devices as shown at (a). This should quickly stablise, allowing a first attempt to be made to set the oscillator to the lowest receive channel using data from previous operation periods (b). This frequency is measured, corrected and re-measured (c). Afurther correction is made bring the oscillator onto the correct frequency (d), which is then checked. The VCO is then switched to a frequency which is to ards the middle of its receive range and measured (e). The appropriate control voltage for the upper receive channel is similarly found by successive approximation (f).The calibration process is then repeated at the lower, mid, and upper points ofthe transmit range (g, hi).

This completes initial calibration. The microprocessor controller has now enough information to enableitto makefirstestimate ofthe control voltage required to generate a ny transmit or receive cha nnel.

Call origination In order to call the othertransceiverthe calling unit first sweeps its receiver to determine which channels arefree,orwhich havethelowestsignal levelson them (k). The sweep may be repeated (not shown) to ensurethatall channels have been checked over a period longer than a single transmitter burst. Before each sweep a frequency check may be made (j). Once the best channel has been selected a calling sequ ence of channel marker tone followed by an identification message is transmitted (1), after which the receive mode is entered to look for a reply (m). In this case a response is made and normal transceive operation commences (m,n). A correction to the receive local oscillatorfrequency is made after it has been measured (o).Note the gating of the oscillator during transmit/receive switching and the application of frequency and amplitude modulation tothetransmitted signal to reduce the occupied bandwidth.

Call reception (Figure 8) The sequence starts with the receiver sweeping all channels. The sweep shown here is continuous (a), but it would be possible to tune discretely to each channel. On detecting a markertone,the sweep halts until the marking transmitter sends an identification code (b). Assuming the received code to be incorrect, sweep re-commences, and continues to the top channel (c).Atthistimea re-calibration occurs: the oscillator is gated through to the counters, and once it has been counted a frequency correction is made (d). The oscillatorfrequency then reverts to the lowestchannel, during which time it is gated off(e).

Another count is taken, and the lower limit corrected (f).

On the second sweep shown, the same marked channel is located and again ignored (g). However, further up the sweep, another marked channel is found, this time with the correct identity code (h).

This time a response is made (i), and thetransmit- receive alternation commences (j,k,l) with the aforementioned modulations and gating oftheVCO (m).

After a while the counters are activated again for one transceive cycle: the transmit frequency is corrected (n). After a second orso thefrequencies are again counted, and the receive corrected (p), etc, etc, until cleardown occurs, when the sweeping cycle may recommence, or a re-calibration may be performed before the nexttask is undertaken.

The timings shown in Figures 5 & areforillustrat- ive purposes only. A nominal 1 millisecond transceive cycle is shown. The sweep and associated channel acquisition times will depend upon the channel allocation algorithms that are used in the final product As discussed above, more than one burst will normally be required for accurate frequency measurements.

The word size ofthe registers 6,9 in this system is a reciprocal function ofthe required frequency resolution, iethe possible number of discrete frequencies that could be generated is determined by dividing twice the maximum permissible frequency error into the frequency range of the oscillator. In the case of a cordless telephone a switching range of 4MHz is required, so thatthe oscillatorwould probably span 10MHz.Withachannel spacing of100KHz,an errorof +/-SKHzwould implythata resolution of10KHz is necessary, so that 1000 discrete frequencies, represented by 10 binary digits, are required, but to allow intermittent frequency correction, 12-bit resolution (ie 2-3KHz resolution) is performed. With a permitted frequency error of + 5KHz, expected oscillatorfrequency drift is such that, in operation it should be sufficientto checkthe frequency once per second.

As hinted earlier, intermittent counter operation reduces consumption in this relatively powerhungry area. The output lines from the processorto the data inputs ofthe memories would similarly only be active during adaption and updating, and could be shared with otherfunctions if necessary.

The same configuration may be used forthe base or handset. The wide channel spacing used requires a frequency reference accurate to only about Sppm.

Therefore the handset could have its own reference oscillator, but it may be better to lock the handset to an accurate reference in the base unit, where a large volume can be accommodated and more power is available.

Claims (8)

1. A transceiverfor singlefrequency duplex oper- ation including a superheterodyne receiver and a transmit oscillator having an input for open loop from quency control, means for supplying to the control input, during transmit operation, a stored value determing the transmit frequency, and feedbackfrequency stabilisation means for updating the stored value.

2. A transceiverforsingle frequency duplex operation having a single oscillator arrangement for providing transmitter carrier and receiver local oscillator signal, characterised in that the receiver is a superheterodyne receiver, and the oscillator arrangement comprises an oscillator having an inputforopen loop frequency control, means for supplying to the control input stored values determining alternately and thetransmitfrequencyandthe local oscillator frequency, and feedback frequency stablisation means for updating the stored values.

3. Atransceiver according to claim 2 including gating meansforinhibiting oscillatoroutputto at least the transmitter circuits ofthe transceiver during frequency switching ofthe oscillator.

4. Atransceiveraccording to claim 2 or3 in which the oscillator is a voltage controlled oscillator, and the apparatus includes digital storesforstoring the said stored values, and a digital to analogue conver ter connected between the stores and the oscillator.

5. Atransceiver according to claim 2,3 or 4, in which the frequency stablisation means includes fre- quency counting means responsive to the output of theoscillatorand meansforcomparing the counter output with reference values and for correcting the stored values.

6. Atransceiver according to claim 5, in which the counter means is arranged to operate only intermittently.

7. Atransceiver according to claim5 or6 in which the counter means comprises separate counters for transmit and receive oscillatorfrequencies, operable to count over a plurality of transmit/receive switching periods, each counter having gating means for enabling counting only during the respective parts of thetransmit/receive cycles.

8. Atransceiverforsingle frequency duplex operation substantially as herein described with refer ence to the accompanying drawings.