GB2145284A - Processes for applying a semiconductor material to a substrate - Google Patents
Processes for applying a semiconductor material to a substrate Download PDFInfo
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- GB2145284A GB2145284A GB08420903A GB8420903A GB2145284A GB 2145284 A GB2145284 A GB 2145284A GB 08420903 A GB08420903 A GB 08420903A GB 8420903 A GB8420903 A GB 8420903A GB 2145284 A GB2145284 A GB 2145284A
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- H10P14/2905—
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- H10P14/24—
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- H10P14/271—
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- H10P14/2923—
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- H10P14/3411—
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- Pressure Sensors (AREA)
- Measuring Fluid Pressure (AREA)
Abstract
A thin film (16) of a semiconductor material is applied to a substrate (10), such as stainless steel diaphragm, at temperatures below those at which the mechanical properties of the substrate are not substantially changed or deteriorated. The semiconductor material may be amorphous or polycrystalline and is deposited either as an underfed layer into at least the outer surface of which impurities are introduced, eg by ion implantation, or as a defed layer. A layer (14) of insulating material may be applied to the substrate before deposition of the semiconductor material. The products of such a process can be used as part of the active element of strain, pressure and force responsive transducers. <IMAGE>
Description
SPECIFICATION
Improvements in processes for applying a semiconductor material to a substrate
This invention relates to processes for applying a semiconductor material to a substrate and to products embodying substrates so processed.
One such product is a strain gauge transducer in which the substrate is a thin diaphragm and a resistive pattern of conductive material is formed at the conductive surface, whereby strain in the diaphragm causes a corresponding strain in the semiconductor material and a change in the value of the resistance of the pattern dependent upon said strain.
The use of a thin film of resistive material, evaporated or sputtered directly onto a strained mechanical member to form a strain gauge element, is known. The strained member can typically be the diaphragm of a pressure transducer, and can be formed of a.material, such as stainless steel which is chemically inert to a variety of industrial fluids and can be welded to similar material to form an overall inert pressure port/diaphragm enclosure.
Such strain gauges have the desirable properties of ruggedness, insensitivity to changes in temperature, long term stability and freedom from creep. Their gauge factor (ratio change in unit resistance to unit strain) and thus their full-scale output is, however, relatively low compared to that of known strain gauges formed of single crystal silicon by techniques developed in the semiconductor industry.
Single crystal silicon strain gauges can have gauge factors fifty times as high as in the thin film resistive strain gauges. They are, however, more temperature sensitive and need to be mechanically bonded in some way, directly or via a force rod or hydraulically coupled by way of a fluid, to a stainless steel or other diaphragm if chemical inertness to the pressure medium is required. As an alternative, the single crystal silicon itself can form the pressure diaphragm, but at the expense of sensitivity of the silicon itself, the compatible material to which it is bonded, and the bond interface to certain industrial media.
The deposition of conductive silicon thin films onto silicon or silicon dioxide substrates is used in standard semiconductor technology. However, these deposition techniques typically use temperatures of 800 or 900 C, which temperatures are not compatible with retaining those properties of annealed stainless steel which are important to accurate, stable operation as a pressure measuring diaphragm for example.
According to the invention there is provided a process for applying a thin film of semiconductive material to a substrate comprising coating a polished surface of a substrate with a low conductance film of a semiconductor material, such as silicon, and rendering at least the outer surface of the semiconductor material conductive by introducing a suitable P- or N-type material into said surface at relatively low temperatures. By "relatively low temperatures" is meant temperatures at which the required mechanical properties of the substrate are not substantially changed or deteriorated and at which excessive stress in the semiconductor material is not introduced as it is cooled with the substrate.
The semiconductor material may be in a polycrystalline or amorphous state.
The substrate may be a metal or a metal alloy or an insulating material such as a ceramic or glass.
Preferably the susbtrate is of stainless steel.
Preferably the polished surface of the substrate has an optical finish with a surface roughness of less than about 0.5 Am.
In the case of a substrate of electrically conductive material, such as stainless steel, an insulating layer may be deposited on the polished surface prior to the application of semiconductor material. In the process using silicon, the insulating layer may be of silicon dioxide or silicon nitride, or a combination thereof, or a layer of silicon dioxide and a layer of silicon nitride. The layers may be deposited by sputtering, plasma-enhanced chemical vapour deposition (PECVD) or low pressure chemical vapour deposition (LPCVD) at a relatively low temperature. The layer may be of the order of a few Fm thick, for example of a layer of silicon dioxide 3 Fm thick is suitable and is readily attained by sputtering.A suitable PECVD process would be to use a gas mixture of silane, nitrous oxide and a suitable carrier gas, such as nitrogen, at a substrate temperature of about 300"C and a 100 W, 80 kHz RF plasma which would deposit silicon dioxide at a rate of about 1 Fm per hour.
The low conductance film of a semiconductor material may be deposited by PECVD or LPCVD. A suitable
PECVD process for depositing a film of polycrystalline or amorphous silicon would be to use a subtrate temperature of about 3000C with a gas velocity of about 160 ml atmimin of pure silane at a pressure of 125 mTorr and an RF plasma power of 50 W at 80 kHz for about one hour which would provide a film 0.7 Wm thick.
The surface of the semiconductor material can be rendered conductive by ion implantation of a suitable element such as boron or aluminium (P-type) or phosphorus or arsenic (N-type). Atypical implant level for boron would be of the order of about 1014two 1021 atoms/cm2, preferably 4 x 1015 atoms/cm2 at an energy of about 70 to 100 keV, the dose being dependent upon interalia, the thickness of the silicon film.
As an alternative process, if an insulating layer such as silicon dioxide or silicon nitride is first applied to the polished surface of the substrate, the steps of coating with a low conductance film and renderin the outer surface conductive can be combined by using a PECVD process to deposit doped silicon at a relatively low temperature, of the order of 300 C. A suitable vapour is a mixture of silane and diborane in argon.
Preferably the ion implantation step is followed by an annealing step. This step may be achieved by exposing the implanted area, or selcted parts of the implanted area, to a pulse of laser light having a wavelength of about 690 nm at an energy density of 0.5J/cm2 at a pulse length sufficiently short that the heating and cooling cycle of the film as completed in less than about 1 11 sec. A suitable pulse length is 25 n sec. Other annealing, or activating steps, which may, possibly, be used, are to subject the area to an electron beam or a quartz iodine light beam or thermal annealing provided that the temperature does not exceed the said relatively low temperature.
Either before or after the annealing step, the ion implanted area can be passivated by depositing thereon a layer of a semiconductor compound, such as silicon dioxide in the case of silicon. The deposition process can be as described hereinbefore.
The product of the process can be used in a variety of applications after further processing.
For example, by using a subtrate in the form of a diaphragm, a strain gauge transducer element could be produced by etching a defined strain gauge resistor pattern in the conductive layer and forming contact and conductor areas using standard semiconductor photo-engraving and etching techniques.
One application of the process is in the manufacture of a strain gauge transducer according to the invention embodying a stainless steel diaphragm and it has been found that all of the steps of the process can be performed at a relatively low temperature, for example at temperatures about 300"C, and below the optimum annealing temperature of 480 C for the particular stainless steel selected.
Thus, according to the invention there is provided a strain gauge formed of a thin film of polycrystalline or amorphous silicon deposited directly onto the strained member by a method according to the invention.
This strain gauge structure combines some of the advantages of each of the two known techniques described hereinbefore. The gauge factor, whilst not as high as single crystal silicon, is over 10 times as high as that of other thin film resistive materials. The ruggedness of the thin film structure is retained, in contrast to the fragility of a single crystal strain gauge, whilst the strained substrate member can be stainless steel or other material with desirable chemical properties. The temperature sensitivity, whilse not as low as for the thin film resistive material, can be much lower than that of a single crystal silicon strain gauge.
One process according to the invention and a strain gauge transducer produced by the process will now be described by way of example with reference to the accompanying drawings, in which:
Figures la to i are cross-sectional views of part of a strain gauge transducer made according to the invention.
Figure 2 is a plan view of part of a transducer strain gauge according to the invention.
Figure 3 is a cross-sectional view of a pressure transducer diaphragm including strain gauge resistors according to the invention.
Figure 4 is a sectional view of a pressure transducer according to the invention.
The drawings illustrate one example of the process according to the invention used in the manufacture of a a thin film strain gauge transducer. Figure 1 shows sections through a stainless steel diaphragm 10 of the
transducer 12. The various parts are not drawn to scale, some being emphasised for ease of explanation.
Referring to Figures 1 and 2, there is shown part of a strain gauge transducer 12 comprising a diaphragm
10 of stainless in condition H900 which is structurally altered at temperatures above about 480 C, its
annealing temperature. In the process to be described it is therefore important to perform the steps at a
relatively low temperature which in this case would be below 480 C. The diaphragm 10 has a diameter of
about 2 cm and a thickness in its active area of about 0.4 mm.
The process comprises the following steps: 1.The upper surface 10a of the diaphragm 10 is ground and lapped to give it a polished optical surface with a surface roughness of less than about 0.5 iim.
2(a). An insulating layer 14 of silicon dioxide is deposited on the polished surface 10a by plasma enhanced
chemical vapour deposition (PECVD) using a gas mixture of silane, nitrous oxide and nitrogen, or other
carrier gas. The temperature of the diaphragm 10 is maintained at 3000C during the process step and 100 W,
80 kHz RF plasma causes deposition of silicon dioxide at a rate of about 1 lim per hour. The process is
continued for three further hours to give a total thickness of 3 Fm.
2(b). the silicon dioxide could also be deposited by RF sputtering. Silicon nitride could be used
alternatively to or additionally to silicon dioxide, for example in the first process step by substituting
ammonia for nitrous oxide.
3. In the next step a layer 16 of polycrystalline silicon is deposited on the layer 14 by PECVD under the
following process conditions:
Substrate 10 temperature: 300 C Gas flow velocity: 160 ml atm./min
pure silane
Gas pressure: 125 mTorr
R.F. Power: 50 W at 80 kHz
Deposition Time: 1 hour
The thickness of the deposited layer 16 of silicon is about 800 nm, and the layer has a low conductance.
4. The outer surface 1 6a of the silicon layer is rendered semiconductive by ion implantation of borons
atoms at an energy of 70 to 100 keV and a dose of 4 x 1015 atoms/cm2. The depth of the ion implanted layer is shown diagrammatically by the broken line 166. Boron, a P-type material, is a good dopant because the temperature coefficient of gauge factor of the resulting strain gauge transducer is readily compensated.
5. A film 18 of silicon dioxide (or silicon nitride) is then deposited by PECVD or one of the other processes mentioned at step 2. This passivating layer 18 is about 0.2 ijm thick.
6. Areas 20 of the silicon layer 16 in which strain gauge patterns are to be formed are prepared by laser annealing the areas to recrystallise the silicon. In the step laser recrystallisation is performed by a pulse of laser light of wavelength of the order of 690 nm and an energy density of about 0.5J/cm2. The pulse length is sufficiently short to ensure that the heating and cooling cycle of the silicon film 16 is completed in less than about 1 > sec. so that the heat is restricted substantially to the film and not conducted to the disphragm 10. A suitable pulse length is about 25 n sec.
The remaining steps in the process of making a strain gauge diaphragm for use in, for example, a pressure transducer can be conventional steps as used in semiconductor technology and may comprise the following steps:
7. Apply a layer 22 of photo resist, expose and develop to leave resist in the desired silicon gauge areas 24.
8. Etch the upper silicon dioxide layer 18 using buffered hydrofluoric acid, exposing the silicon film in the areas 1 6c where it is desired to remove it.
9. Remove the photoresist layer.
10. Etch the silicon film in the areas 16e where it has been exposed, using a solution of 15 gm potassium hydroxide in 40 mis water and 60 mis iso-propyl alcohol. This etch is performed at 70 C.
11. Apply a layer 26 of photoresist, expose and develop to leave resist over the whole surface except areas 28 at each end of each gauge resistor where it is desired to make electrical contact.
12. Etch the upper silicon dioxide layer using buffered hydrofluoric acid, and remove remaining photoresist.
13. Deposit a thin film of metal 30 (typically aluminium, 500 nm thick) over the surface by vacuum evaporation or sputtering.
14. Apply a layer 32 of photoresist, expose and develop to leave resist over the areas where metal contacts to the gauge resistors, and metal interconnecting tracks and bond pads, are desired.
15. Etch the metal film 30.
16. Suitably heat-treat the metal film 30 to give good electrical connection to the underlying silicon film (e.g. 480#C, 30 min.).
This process results in strain gauge resistors defined as thin film patterns on a polished stainless steel surface. This surface can be one face of pressure diaphragm. Electrical connections are made to the gauges by conventional wire-bonding techniques. Other substrate shapes can, of course, be used and one example would be of a beam for use in a stressed beam transducer.
An embodiment of a pressure sensor incorporating a strain gauge made according to the above process will now be described with reference to Figures 3 and 4.
A Wheatstone bridge comprising four strain gauge resistors 36a - d made according to the process was formed on one, polished face of a stainless steel pressure diaphragm 10 with a section as shown in Figure 3.
The process details are given below. Two of the gauges were positioned near the inner edge of the strained annulus 35 and two near its outer edge. The effect of pressure in the direction of arrow A was thus to apply equal and opposite strains to the two pairs of gauges. The four gauges were connected to the pins 37 of a header 38 mounted directly above them, by a standard semiconductor wire bonding method. The completed assembly formed the "pressure capsule" illustrated in Figure 4. This was given a series of tests normal for measuring the characteristics of pressure capsules of this type. These were as follows:
1. Thermal aging. 330 min at 31 5 C.
2. Pressure cycling. 1000 cycles to a peak strain of 0.004 at 1 350C.
3. Measurement of constant temperature characteristics. A room temperature, apply accurately measured pressure in 5 equal steps up to a maximum giving appoximately 0.002 peak strain. Remove the pressure in the same steps until zero pressure is reached. Record the bridge output, with 10 V excitation voltage, for each step.
4. Measurement of thermal characteristics. Repeat step 3 at temperatures of ambient, -45 C, ambient, 120 ambient in turn.
From the above measurements were calculated:
a. Non-linearity; during pressure increase at room temperature.
b. Hysteresis; between increasing and decreasing pressure curves at room temperature.
c. Hysteresis of zero; between zero readings before and after the pressure excursion at room temperature.
d. Gauge factor; the mean change in resistance of each gauge resistor per unit strain, at room temperature.
e. Temperature coefficient of gauge resistance; the mean change in resistance of each gauge resistor per unit temperature difference at zero strain.
f. Temperature coefficient of gauge factor; the change in gauge factor per unit temperature difference.
g. Thermal zero stability; the change in bridge offset voltage at zero pressure and at room temperature, before and after the temperature excursions to + 120 C and -54"C.
h. Thermal sensitivity stability; the change in gauge factor at room temperature, before and after the temperature excursions.
The process of manufacture was generally similar to the process steps hereinbefore described but in the following steps:
2. The silicon dioxide insulating layer was R.F. sputtered.
4. The ion-implant energy was 80 keV.
5. The upper silicon dioxide layer was 0.5 pm thick, deposited by R.F. sputtering.
6. A laser light pulse from a Q-switched Ruby laser, at wavelength 690 nm and of length 25 ns was used, a glass homogeniser rod giving energy density of 0.5J/cm2 over a 5 mm diameter disc.
13. Aluminium was deposited by vacuum evaporation.
16. Aluminium was heat treated at470'C in nitrogen for 10 minutes.
Test results for the transducer were as follows:- (Note: all errors are expressed as a percentage of the "full range output signal" at a peak strain of 2 x
Non-linearity: 0.3%
Hysteresis: 0.1% Hysteresis of zero: 0.1% Gauge factor: +20 TCR: -0.03%/'C TCGF: -0.02%/'C Thermal zero stab: 0.2%
Thermal sens stab: 0.04%
Various modifications can be made to the process according to the invention provided that the process temperatures are maintained at a relatively low value such that the required qualities of the substrate are not substantially impaired or deteriorated and that excessive stresses are not induced in the silicon as the silicon and the substrate are cooled.
Thus there has been described a low temperature process for producing thin film conductors on a substrate which can then be processed for use in pressure or strain transducers for example.
Claims (35)
1. A process for applying a thin film of semiconductive material to a substrate comprising coating a polished surface of a substrate with a low conductance film of a semiconductor material, such as silicon, and rendering at least part of the outer surface of the semiconductor material conductive by introducing a suitable P- or N-type material into said outer surface at relatively low temperatures.
2. A process according to claim 1, in which the semiconductor material is in a polycrystalline state.
3. A process according to claim 1, in which the semiconductor material is in an amorphous state.
4. A process according to claim 1,2 or 3 in which the substrate is a metal or a metal alloy.
5. A process according to claim 1, in which the substrate is stainless steel.
6. A process according to claim 1, 2 or 3 in which the substrate is an insulating material selected from a group consisting of ceramic and glass.
7. A process according to any one of the preceeding claims, in which the surface of the substrate is polished to an optical finish with a surface roughness of less than about 0.5 Wm.
8. A process according to any one of the preceeding claims in which the substrate is of electrically conductive material, such as stainless steel, and an insulating layer is deposited on the polished surface prior to the application of the semiconductor material.
9. A process according to claim 8, in which the semiconductor material is silicon, and the insulating layer is selected from a group consisting of silicon dioxide, silicon nitride, and a combination of silicon dioxide and silicon nitride.
10. A process according to claim 8, in which the semiconductor material is silicon, and the insulating layer is a composite layer comprising a layer of silicon dioxide and a layer of silicon nitride.
11. A process according to claim 8 or 9, in which the insulating layer is of the order of 2 to 3 ym thick.
12. A process according to claim 8 or 9, in which the insulating layer is deposited by sputtering, plasma-enhanced chemical vapour deposition (PECVD) or low pressure chemical vapour deposition (LPCVD) at a relatively low temperature.
13. A process according to claim 12, in which the insulating layer is deposited by a PECVD process using a gas mixture of silane, nitrous oxide and a suitable carrier gas, such as nitrogen, at a substrate temperature of about 300 C and a 100 Watt, 80 kHz RF plasma.
14. A process according to any one of the preceeding claims in which the low conductance film of a semiconductor material is deposited by plasma enhanced chemical vapour deposition PECVD.
15. A process according to claim 14, in which the semiconductor material is polycrystalline or amorphous silicon and the PECVD process uses a substrate temperature of about 300 C with a gas velocity of about 160 ml atm/min of pure silane at a pressure of 125 mTorr and an RF plasma power of 50W at 80kHz for about one hour.
16. A process according to any one of claims 1 to 13, in which the low conductance film of a semiconductor material is deposited by low pressure chemical vapour deposition LPCVD.
17. A process according to any one of the preceeding claims in which the surface of the semiconductor material is rendered conductive by ion implantation of a suitable element such as boron or aluminium (P-type) or phosphorus or arsenic (N-type).
18. A process according to claim 17, in which the element is boron and the implant level is of the order of about 1014 to 1021 atoms/cm2, preferably 4 x 1015 atoms/cm2 at an energy of about 70 to 100 keV, the dose being dependent upon inter alia, the thickness of the silicon film.
19. A process according to any one of the preceeding claims in which the steps of coating with a low conductance film and rendering the outer surface conductive are combined by using a PECVD process to deposit doped silicon at a relatively low temperature.
20. A process according to claim 19, in which the doped silicon is deposited in an atmosphere of silane and diborane in argon.
21. A process according to claim 17, in which the ion implantation step is followed by an annealing step.
22. A process according to claim 21, in which the annealing step is achieved by exposing the implanted area, or selected parts of the implanted area, to a pulse of laser light having a wavelength of about 690nm at an energy density of 0.5J/cm2 and at a pulse length sufficiently short that the heating and cooling cycle of the film is completed in less than about 1 11 sec.
23. A process according to claim 22, in which the pulse length is 25 n sec.
24. A process according to claim 21, in which the annealing or activating step is achieved by subjecting the implanted area to an electron beam or a quartz iodine light beam or thermal annealing at a temperature which does not exceed the said relatively low temperature.
25. A process according to claims 21 or 22, further comprising the step of passivating the ion implanted are either before or after annealing step.
26. A process according to claim 25, in which the ion implanted area is passivated by depositing thereon a layer of an insulating compound, such as silicon dioxide in the case of silicon.
27. A strain gauge transducer element comprising a strain responsive substrate having a surface coated with a film of a semiconductor material by a process according to any one of the preceding claims, and a defined strain gauge resistor pattern formed in the conductive layer.
28. A strain gauge transducer element according to claim 27, in which the substrate comprises a stainless steel diaphragm, the resistor pattern is in the form of a Wheatstone bridge comprising four strain gauge resistors on one surface of the stainless steel diaphragm the other surface of said diaphragm being formed with an annular section, two of the gauge resistors being positioned near the inner edge of the strained annulus and two near its outer edge.
29. A strain gauge transducer element comprising a diaphragm of stainless steel having a strain gauge resistor pattern formed on a surface thereof by a process comprising the steps of:
a) grinding and lapping a surface of the diaphragm to a polished optical surface with a surface roughness of less than about 0.5 Fm.
b) depositing an insulating layer of silicon dioxide on the polished surface by plasma enhanced chemical vapour deposition (PECVD) using a gas mixture of silane, nitrous oxide and a carrier gas at a diaphragm temperature of 300 C and a 100W, 80 kHz RF plasma to cause deposition of silicon dioxide at a rate of about 1
#m per hour for about three hours.
c) depositing a low conductance layer of polycrystalline silicon about 800 nm thick on the insulating layer by PECVD under the following process conditions:
Substrate 10 temperature: 300 C Gas flow velocity: 160ml atm./min
pure silane
Gas pressure: 125mTorr
R.F. Power: 50W at 80 kHz
Deposition Time: 1 hour
d) rendering the outer surface of the silicon layer semi-conductive by ion implantation of boron atoms at an energy of 70 to 100 keV and a does of 4 x 1015 atoms/cm2.
e) depositing a passivating film of silicon dioxide (or silicon nitride) about 0.2 um thick on the silicon layer by PECVD.
f) laser annealing areas of the silicon layer in which strain gauge patterns are to be formed to recrystallise the silicon in said areas by a pulse of laser light of wavelength to the order of 690 nm and an energy density of about 0.5 J/cm2 and a pulse length sufficiently short to ensure that the heating and cooling cycle of the silicon film is completed in less than about 1 u sec.
g) applying a layer of photoresist, exposing and developing it to leave resist in desired silicon gauge resistor areas.
h) etching the upper silicon dioxide layer, exposing the silicon film in the areas where it is desired to remove it.
i) removing the photoresist layer.
j) etching the silicon film in the areas where it has been exposed to provide a strain gauge resistor pattern on said diaphragm.
30. A strain gauge transducer element according to claim 29, formed by a process comprising the further steps of:
k) applying a layer of photoresist, exposing and developing it to leave resist over the whole surface except areas at each end of each gauge resistor where it is desired to make electrical contact.
I) etching the upper silicon dioxide layer and removing remaining photoresist.
m) depositing a thin film of metal (typically aluminium, 500nm thick) over the surface by vacuum evaporation or sputtering.
n) applying a layer of photoresist, exposing and developing itto leave resist over the areas where metal contacts to the gauge resistors, and metal interconnecting tracts and bond pads, are to be provided.
o) etching the metal film and
p) suitably heat-treating the metal film to give good electrical connection to the underlying silicon film.
31. A strain gauge transducer element according to claim 27, in which the susbtrate is in the form of a stressed beam.
32. A strain gauge transducer according to claims 29,30 or 31, in which the resistor pattern is in the form of a Wheatstone bridge comprising four strain gauge resistors on one surface of a stainless steel diaphragm the other surface of solid diaphragm being formed with an annular section, two of the gauge resistors being positioned near the inner edge of the strained annulus and two near its outer edge.
33. A process for applying a thin film of semiconductive material to a substrate substantially as hereinbefore described with reference to the accompanying drawings.
34. A strain gauge transducer element made by a process according to any one of the preceeding claims.
35. A strain gauge transducer substantially as hereinbefore described with reference to and as illustrated in the accompanying drawings.
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| GB838322273A GB8322273D0 (en) | 1983-08-18 | 1983-08-18 | Applying semiconductor material to substrate |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| GB8420903D0 GB8420903D0 (en) | 1984-09-19 |
| GB2145284A true GB2145284A (en) | 1985-03-20 |
| GB2145284B GB2145284B (en) | 1987-05-28 |
Family
ID=10547502
Family Applications (2)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| GB838322273A Pending GB8322273D0 (en) | 1983-08-18 | 1983-08-18 | Applying semiconductor material to substrate |
| GB08420903A Expired GB2145284B (en) | 1983-08-18 | 1984-08-17 | Processes for applying a semiconductor material to a substrate |
Family Applications Before (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| GB838322273A Pending GB8322273D0 (en) | 1983-08-18 | 1983-08-18 | Applying semiconductor material to substrate |
Country Status (5)
| Country | Link |
|---|---|
| DE (1) | DE3430379A1 (en) |
| FR (1) | FR2550885A1 (en) |
| GB (2) | GB8322273D0 (en) |
| IT (1) | IT1175603B (en) |
| NL (1) | NL8402533A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE19645083A1 (en) * | 1996-11-01 | 1998-05-07 | Austria Card Gmbh | Contactless chip card with transponder coil |
| US8044472B2 (en) | 2003-03-25 | 2011-10-25 | Kulite Semiconductor Products, Inc. | Nanotube and graphene semiconductor structures with varying electrical properties |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| GB1073347A (en) * | 1963-10-04 | 1967-06-21 | Anritsu Electric Company Ltd | Improvements in or relating to elasto-resistive elements |
| GB1244551A (en) * | 1969-02-28 | 1971-09-02 | British Aircraft Corp Ltd | Improvements relating to acoustic detector arrays |
| GB1309146A (en) * | 1969-05-08 | 1973-03-07 | Matsushita Electric Industrial Co Ltd | Gramophone pickup cartridges |
| GB1324187A (en) * | 1969-09-22 | 1973-07-18 | Nippon Telegraph & Telephone | Mechanico-electric transducer utilizing piezoresistance effect |
| GB1415445A (en) * | 1972-07-28 | 1975-11-26 | Bell & Howell Co | Method of measuring strain and a high sensitivity semiconductor strain transducer assembly |
-
1983
- 1983-08-18 GB GB838322273A patent/GB8322273D0/en active Pending
-
1984
- 1984-08-17 NL NL8402533A patent/NL8402533A/en not_active Application Discontinuation
- 1984-08-17 GB GB08420903A patent/GB2145284B/en not_active Expired
- 1984-08-17 IT IT22345/84A patent/IT1175603B/en active
- 1984-08-17 DE DE3430379A patent/DE3430379A1/en not_active Withdrawn
- 1984-08-17 FR FR8412936A patent/FR2550885A1/en active Pending
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| GB1073347A (en) * | 1963-10-04 | 1967-06-21 | Anritsu Electric Company Ltd | Improvements in or relating to elasto-resistive elements |
| GB1244551A (en) * | 1969-02-28 | 1971-09-02 | British Aircraft Corp Ltd | Improvements relating to acoustic detector arrays |
| GB1309146A (en) * | 1969-05-08 | 1973-03-07 | Matsushita Electric Industrial Co Ltd | Gramophone pickup cartridges |
| GB1324187A (en) * | 1969-09-22 | 1973-07-18 | Nippon Telegraph & Telephone | Mechanico-electric transducer utilizing piezoresistance effect |
| GB1415445A (en) * | 1972-07-28 | 1975-11-26 | Bell & Howell Co | Method of measuring strain and a high sensitivity semiconductor strain transducer assembly |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE19645083A1 (en) * | 1996-11-01 | 1998-05-07 | Austria Card Gmbh | Contactless chip card with transponder coil |
| DE19645083C2 (en) * | 1996-11-01 | 2000-01-27 | Austria Card Gmbh Wien | Contactless chip card with transponder coil |
| US8044472B2 (en) | 2003-03-25 | 2011-10-25 | Kulite Semiconductor Products, Inc. | Nanotube and graphene semiconductor structures with varying electrical properties |
Also Published As
| Publication number | Publication date |
|---|---|
| IT8422345A0 (en) | 1984-08-17 |
| IT8422345A1 (en) | 1986-02-17 |
| GB8420903D0 (en) | 1984-09-19 |
| FR2550885A1 (en) | 1985-02-22 |
| NL8402533A (en) | 1985-03-18 |
| DE3430379A1 (en) | 1985-03-07 |
| GB2145284B (en) | 1987-05-28 |
| IT1175603B (en) | 1987-07-15 |
| GB8322273D0 (en) | 1983-09-21 |
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