GB2039448A - Altering the timing of digital sound signal samples - Google Patents
Altering the timing of digital sound signal samples Download PDFInfo
- Publication number
- GB2039448A GB2039448A GB7900013A GB7900013A GB2039448A GB 2039448 A GB2039448 A GB 2039448A GB 7900013 A GB7900013 A GB 7900013A GB 7900013 A GB7900013 A GB 7900013A GB 2039448 A GB2039448 A GB 2039448A
- Authority
- GB
- United Kingdom
- Prior art keywords
- samples
- signal
- input
- timing
- altering
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 230000005236 sound signal Effects 0.000 title claims abstract description 13
- 238000000034 method Methods 0.000 claims abstract description 15
- 230000003111 delayed effect Effects 0.000 claims 1
- 230000001419 dependent effect Effects 0.000 claims 1
- 238000005070 sampling Methods 0.000 description 11
- 230000006735 deficit Effects 0.000 description 4
- 230000002401 inhibitory effect Effects 0.000 description 2
- 230000005540 biological transmission Effects 0.000 description 1
- 230000006835 compression Effects 0.000 description 1
- 238000007906 compression Methods 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000004904 shortening Methods 0.000 description 1
- 230000001360 synchronised effect Effects 0.000 description 1
Classifications
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L25/00—Baseband systems
- H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
- H04L25/05—Electric or magnetic storage of signals before transmitting or retransmitting for changing the transmission rate
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C27/00—Electric analogue stores, e.g. for storing instantaneous values
- G11C27/04—Shift registers
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Television Receiver Circuits (AREA)
Abstract
A method of and apparatus for altering the timing of digital sound signal samples, in which the samples are subjected to a variable delay in a serial store 14, and the delay is adjusted by logic 30 towards a mid-position at least preferentially during substantially silent intervals in the signal, as detected in a detector 24 and counter 28. <IMAGE>
Description
SPECIFICATION
Method and apparatus for altering the timing of digital sound signal samples
This invention relates to a method of and apparatus for altering the timing of digital sound signal samples.
When two or more digital sound signals are brought together in a digital mixer the sampling rates of the signals must by synchronous to permit the appropriate arithmetic mixing processes. Sampling rates from the various sources which are to be mixed may differ deliberately by a large amount, e.g say 50 kHz for digital recording and 32 kHz for transmission, or by a very small amount, i.e. the sampling frequencies are nominally the same but are unlocked.
For changing sampling frequency by a large amount the solutions are either to convert to analoge form and back to digital form with a conventional DAC-ADC process, orto employ an entirely digital process using an interpolating type of ratechanger. In either case, complex and expensive instrumentation is required and a loss in signal-toquantising noise ratio is incurred. If the input and output samples are defined by equal numbers of bits, the increase in quantisation noise for one sampling-rate change is around 3dB, the actual increase depending on whether the sampling rate is being reduced or increased and on the overall responseifrequency characteristic.
For digital television signals, in order to accommo date very small changes in television sampling frequency, it has been proposed in an article byA.H.
JONES in E. B. U. Review Technical No. 163, June 1977, see particularly Section 4 at pages 129-130, to utilize an alternative technique, in which a buffer store is used as a variable delay between the incoming and outgoing samples. The buffer store is progressively filled or emptied according to the frequency drift and as it becomes full the output tap is switched from the maximum delay position, preferably to the mid-position. Alternatively, as the buffer store becomes empty the output tap is switched from the minimum delay position preferably also to the mid-position. The result of this process is the introduction of a delay in the signal path and a slight time compression or expansion of the signal together with the occasional omission or repetition of blocks of samples corresponding to the working capacity of the buffer store.
The application of such a system to sound signals is briefly mentioned in the above article but is noted to be applicable only when the change in sampling rate is very small, as there are no blanking periods.
The article however suggests the use of a limited amount of interpolation to reduce the impairment produced at the discontinuities.
We have appreciated that the system can be used for sound signals when the sampling frequencies differ by, say, 1 in 105 or less, without the need for interpolation, provided special steps are taken.
For a given rate of drift the size of buffer store determines whether short excerpts of signal are omitted (or repeated) frequently, or larger excerpts are omitted (or repeated) less frequently. In the limit, with a store equal to one sample, the process of omission or repetition would occur at the difference frequency of the input and output sampling rates.
For example, a difference of 1 in 106 in 32 kHz sampling rates would involve an omission (or repetition) approximately every 31 seconds. A buffer store of say 500 samples capacity could postpone the omission or repetition of samples for a period of up to two hours. A store capacity of about 500 samples would have a mean delay of 8 ms and for use with broadcast television sound is probably about the maximum desirable bearing in mind lipisound timing tolerances in television.
As already indicated, impairment to the sound quality may be caused when blocks of samples are omitted or repeated as the tap of the variable delay is switched backwards or forwards to the mid-position.
The impairment will depend upon the frequency of the tap returns; if this were very low, say once every two hours, it may be regarded as acceptable, but more frequent tap returns would certainly not be acceptable unless the corresponding impairment is eliminated, or, at least minimised.
In accordance with this invention we propose that the omitted or repeated blocks of samples correspond to silence in the programme. Clearly the consequent slight shortening or lengthening of a programme pause could be imperceptible provided the pause were of sufficient length. Most programmes have periods of silence, even 'continuous' pop programmes have short breaks for record titles, news flashes, and so on, so the proposal to use pauses for tap-resetting could apply essentially for all types of programme.
This invention provides a method of altering the timing of digital sound signal samples, in which the samples are subjected to a variable delay, and the delay is adjusted towards a reset position at least preferentially during substantially silent intervals in the signal.
The invention also provides apparatus for use in the above-defined method, comprising a resettable variable delay device connected to an input to receive an input signal, and means operable at least preferentially when the signal applied to the input represents a silent interval to adjust the delay towards a reset position.
The adjusting means may be coupled to a mixer input control so as to be enabled when the input level is faded to zero. Preferably, however, the adjusting means includes means responsive to the input signal for detecting when the signal level represents a silence.
The invention will now be described in more detail, by way of example, with reference to the drawing, which shows a block circuit diagram of a digital sound sampling rate synchroniser embodying the invention.
Referring to the drawing, the synchroniser has a digital sound signal input 10 connected via a fixed delay 12 of 1/2N samples to a variable delay device 14. The variable delay device 14 consists, in effect, of a buffer store, and is capable of storing a maximum of N samples, where for example N may be 512. The buffer store 14 can in principle be any 'FIFO' serial memory device. The buffer store has, in addition to its data output 17, five outputs indicating how full it is. These are referenced 15a to 15e and are respectively enabled if the store is (a) full, (b) half-full plus an amount delta (A), (c) half-full, (d) half-full minus an amount delta and (e) empty. The amount delta can be preset. The buffer store is controlled by write control circuitry 16 and read control circuitry 18.
Input data is written into the buffer store under the control of the write control circuitry at a rate determined by an input clock signal received at a terminal 20. The input clock may possibly be derived from the input data signal, and output data is read out of the buffer store 14 at the rate determined by an output reference clock received at an input 22.
The input and reference clock rates are nominally equal.
In a side chain, a sample-to-sample difference detector 24 detects the difference between successive input samples and, when the difference is below a threshold preset at an input 26, applies an enable signal to a counter 28. Programme silences are thus detected by measuring the differences between successive adjacent samples. The counter 28 is incremented when the differences are sufficiently low; the threshold setting takes into account the likely value of noise present on the incoming signal.
The counter 28 is reset back to zero whenever the difference between successive samples exceeds the preset threshold. The counter thus holds a count equal to the number of successive low amplitude differences.
A Aslightly modified technique is possible in which the absolute values of successive samples, rather than the differences between them, are examined.
The counter is then enabled as described above, but the system incorporates an arrangement for measuring any d.c. offset error in the digital sound signal and corrects for this in the setting of the threshold which determines when the counter 28 provides an enabling output.
When the counter 28 reaches a predetermined count which indicates a suitable length of programme silence, an output is applied to decision logic 30, which is also supplied over lines 1 5a to 1 sue with signals from the buffer store 14 indicating the occupancy of the store. From the inputs applied to it, the decision logic can when required either stop the writing of data by inhibiting the write control circuitry 1 6 so that data is discarded, or cause the repetition of data by inhibiting the read control circuitry 18. This continues until the buffer store 14 is half4u II, whereupon an output on line 1 sic restarts both the read and write control circuitry.
The decision logic 30 is activated by an output from the counter 28 indicating the presence of a relatively long period of silence. If at this time either of the lines 1 5b or 1 5d is enabled, then the decision logic will inhibit the write or read control circuitry respectively. In this way data is discarded or repeated until the buffer store is again half-full. This data corresponds to silence in the signal and the change is therefore subjectively unnoticeable. The delay 12 is required to ensure that only samples which are deemed to correspond to programme silence are discarded.
If the buffer store becomes completely full or empty, then lines 15a or 15e will be enabled. The decision logic will immediately cause the discarding or repetition of data even if there is no output from counter 28. In this case it would be possible to discard (or repeat) samples singly or in groups, rather than in a group equal to half the buffer store capacity, if so desired.
Claims (10)
1. A method of altering the timing of digital sound signal samples, in which the samples are subjected to a variable delay, and the delay is adjusted towards a reset position at least preferentially during substantially silent intervals in the signal.
2. A method of altering the timing of digital sound signal samples, substantially as herein described with reference to the drawing.
3. Apparatus for use in the method of claim 1, comprising a resettable variable delay device connected to an input to receive an input signal, and means operable at least preferentially when the signal applied to the input represents a silent interval to adjust the delay towards a reset position.
4. Apparatus according to claim 3, wherein the adjusting means includes means responsive to the input signal for detecting when the signal level represents a silence.
5. Apparatus according to claim 4, wherein the said detecting means includes means for comparing successive input samples with each other, and providing an output dependent upon the difference between them.
6. Apparatus according to any of claims 3 to 5, wherein the samples applied to the variable delay device are delayed relative to those to which the adjusting means is responsive.
7. Apparatus according to any of claims 3 to 6, including means enabling the omission or repetition of samples at a time when a predetermined plurality of samples are detected as representing a silent interval.
8. Apparatus according to any of claims 3 to 7, including further means enabling the omission or repetition of samples when the delay device is at its maximum or minimum delay value respectively.
9. Apparatus according to any of claims 3 to 8, wherein the adjusting means initiates the omission or repetition of samples when the delay device takes a value outside a predetermined range.
10. Apparatus for altering the timing of digital sound signal samples, substantially as herein described with reference to the drawing.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| GB7900013A GB2039448B (en) | 1979-01-02 | 1979-01-02 | Altering the timing of digital sound signal samples |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| GB7900013A GB2039448B (en) | 1979-01-02 | 1979-01-02 | Altering the timing of digital sound signal samples |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| GB2039448A true GB2039448A (en) | 1980-08-06 |
| GB2039448B GB2039448B (en) | 1983-02-16 |
Family
ID=10502251
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| GB7900013A Expired GB2039448B (en) | 1979-01-02 | 1979-01-02 | Altering the timing of digital sound signal samples |
Country Status (1)
| Country | Link |
|---|---|
| GB (1) | GB2039448B (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5896099A (en) * | 1995-06-30 | 1999-04-20 | Sanyo Electric Co., Ltd. | Audio decoder with buffer fullness control |
| GB2451828A (en) * | 2007-08-13 | 2009-02-18 | Snell & Wilcox Ltd | Digital audio processing method for identifying periods in which samples may be deleted or repeated unobtrusively |
-
1979
- 1979-01-02 GB GB7900013A patent/GB2039448B/en not_active Expired
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5896099A (en) * | 1995-06-30 | 1999-04-20 | Sanyo Electric Co., Ltd. | Audio decoder with buffer fullness control |
| GB2451828A (en) * | 2007-08-13 | 2009-02-18 | Snell & Wilcox Ltd | Digital audio processing method for identifying periods in which samples may be deleted or repeated unobtrusively |
| US20090048696A1 (en) * | 2007-08-13 | 2009-02-19 | Butters Jeff | Digital audio processing |
| US8825186B2 (en) | 2007-08-13 | 2014-09-02 | Snell Limited | Digital audio processing |
Also Published As
| Publication number | Publication date |
|---|---|
| GB2039448B (en) | 1983-02-16 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PCNP | Patent ceased through non-payment of renewal fee |