GB2034939A

GB2034939A - Integrated Constant Current Source

Info

Publication number: GB2034939A
Application number: GB7932366A
Authority: GB
Original assignee: Siemens Corp
Current assignee: Siemens Corp
Priority date: 1979-09-18
Filing date: 1979-09-18
Publication date: 1980-06-11
Also published as: GB2034939B

Abstract

A constant current source comprises a first MOS transistor (T1) which is operated at saturation by means of a fixed potential (UG1) connected between its gate and one of the electrodes of the source-drain path, and whose other electrode in the source-drain path passes a constant current via a current source output (Ua). A second MOS transistor (T2), which is also operated at saturation, has its source-drain path connected between the source-drain path of the first MOS transistor (T1) and the current source output (Ua): its slope exceeds that of the first MOS transistor (T1). <IMAGE>

Description

SPECIFICATION Integrated constant current source The present invention relates to an integratedcircuit constant current source.

In MOS technology constant current sources are normally composed of an MOS transistor which is driven at saturation and which may consist of an enhancement transistor whose gate and source carry fixed potentials and whose drain forms the output of the current source. A constant current source of this kind is disclosed for example in the magazine "IEEE J. of Solid-State Circuits" June 1976, pages 408 to 410.

With this type of design of a constant current source the dynamic impedance and thus the regulation are dependent upon the channel length of the MOS transistor. The greater the channel length, the smaller is the differential quotient of the current following the voltage. This means that in order to construct accurate constant current sources with for example a current variation of less than 1% for a change in output voltage of 5 V, very large MOS transistors are required due to the longer channel length. The associated space required for integration constitutes a disadvantage.

The aim of the present invention is to provide a constant current source which has a small space requirement.

According to the present invention there is provided a constant current source formed as a semiconductor integrated circuit comprising a first field effect transistor having a controlled path connected between a reference point and, via the controlled path of a second field effect transistor, a point forming the output of the constant current source, and biasing means arranged in operation to apply to the control electrodes of the transistors potentials, fixed relative to said reference point, to render the transistors conductive so that, in use of the source, the transistors operate at saturation, the slope of the second transistor being greater than that of the first.

The slope of the second transistor may be set by appropriate selection of its channel width.

Preferably the transistors are insulated gate field effect transistors, for example MOS transistors which may be of the enhancement type.

Preferably the biasing means comprises first and second potential dividers arranged to supply to the control electrodes of the two transistors potentials the sum of which is of the order of the smallest voltage occurring at the output of the source. In a preferred embodiment each potential divider is formed by an MOS transistor of the depletion type which is connected to a supply voltage line, is connected as a resistor, and has a relatively long channel, and an MOS transistor of the enhancement type which is connected in series therewith and is connected as a diode, where the bias potentials for said first and second transistors are obtained from the connection point of the voltage potential transistors.

Exemplary embodiments of the invention will now be explained in detail with reference to the accompanying drawings, in which: Figure 1 illustrates one embodiment of a constant current source according to the invention; and Figure 2 illustrates an embodiment for setting up the gate potentials for the constant current source transistors.

The constant current source shown in Fig. 1 contains two MOS transistors T1 and T2 which are preferably enhancement transistors and whose source-drain paths are connected in series. The source S of the transistor T1 is connected to reference potential, whereas the drain D of the transistor T2 is connected to an output Ua of the constant current source. The two gates of the transistors T, and T2 are each connected to a fixed potential U61 and U62.

The purpose of a constant current source of this type is to allow a constant current to flow through the two transistors T, and T2 irrespective of fluctuations in the voltage at the output U,. A practical application consists for example in situations in which the voltage across a capacitor is to be measured. In this case the capacitor discharges with a constant current through the two transistors T, and T2 so that a linear discharge process results and the discharge time consequently represents a gauge of the capacitor voltage.

When the gate potential UG2 is maintained constant, the current flowing through the transistor T2 is determined by a voltage UO at a connection point 1 of the two transistors and by the output voltage U,. Any change in the output voltage U, results in a change in the voltage UO and consequently in a change in the output current. However, this change will be the lesser, the greater the slope and thus the conductivity of the transistor T2 in comparison to the transistor T,. By selecting the slope and thus the conductivity by means of an appropriate setting of the channel width of the transistor T2 in comparison to the transistor T, it is possible to reduce the dependency of the output current upon the output voltage without disadvantageously increasing the space requirements.

The gate potentials U0 and U02 are set to be such that they are as independent as possible of the supply voltage by which they are produced, and that they are as low as possible in order that the two current source transistors T, and T2 can remain saturated down to the lowest specified output voltage U,.

In the arrangement shown in Fig. 2 these voltages are obtained by means of two poten tial dividers, each of which is formed by an MOS transistor connected as a resistor and an MOS transistor connected as a diode, and is connected to a supply voltage UDD. The voltage dividers are preferably formed by a load transistor T4, T6 of the depletion type (resistor) and two transistors T3 and T5 of the enhancement type (diode) connected in series therewith. The potentials UG1 and UG2 are selected to be such that the sum thereof is of the order of the smallest voltage occurring across the current source output Ua.In the case of an output voltage range having a lower limit of Ua of approximately 1.5 volts, the two aforementioned conditions for the gate potentials UG1 and UG2 can be fulfilled for example when UG1 is approximately (UTEO + 1) volts, where UTEG is the turn-on voltage of the enhancement transistors T2 and T5 at a substrate bias voltage of O V. This ensures saturation of the current source transistors T, and T2 down to the lower limit of the output voltage.

If the channel lengths of the load transistors T4 and T6 in the voltage dividers are selected to be appropriately large, the gate potentials UG1 and UG2 can be made substantially independent of the supply voltage UDD.

In a practical examplary embodiment the channel widths W and the channel lengths L of the transistors T, to T6 are selected as follows: W L T, 20 ,um 40 im T2 20 ym 10 cm T3 80 cm 10 cm T4 10 ,um T5 20 ,um T6 101Lm 40 jum As a result, for a supply voltage UDD of 1 7 V and with an output current of approximately 0.35 ,tA with fluctuations in the output voltage Ua of between 3 and 10 V, a current fluctuation of approximately + 0.03% occurs, and with a fluctuation in the supply voltage UDD of between 14 and 1 7 V a current fluctuation of approximately + 0.05% occurs.

In comparison to a single current source transistor for which the required channel length in practice necessitates an increase in area factor of the order of 10, a constant current source of the type described above only requires an increase in area factor of the order of 2.

Claims

1. A constant current source formed as a semiconductor integrated circuit comprising a first field effect transistor having a controlled path connected between a reference point and, via the controlled path of a second field effect transistor, a point forming the output of the constant current source, and biasing means arranged in operation to apply to the control electrodes of the transistors potentials, fixed relative to said reference point, to render the transistors conductive so that, in use of the source, the transistors operate at saturation, the slope of the second transistor being greater than that of the first.

2. A constant current source according to claim 1, in which the transistors are MOS field effect transistors.

3. A constant current source according to claim 1 or 2, in which the transistors are of the enhancement type.

4. A constant current source according to claim 1, 2 or 3, in which the biasing means comprises first and second potential dividers arranged to supply to the control electrodes of the two transistors potentials the sum of which is of the order of the smallest voltage occurring at the output of the source.

5. A constant current source according to claim 4, in which each potential divider is formed by an MOS transistor of the depletion type which is connected to a supply voltage line, is connected as a resistor, and has a relatively long channel, and an MOS transistor of the enhancement type which is connected in series therewith and is connected as a diode, where the bias potentials for said first and second transistors are obtained from the connection point of the potential divider transistors.

6. A constant current source substantially as herein described with reference to Fig. 1 or Fig. 2 of the accompanying drawings.

7. MOS integrated constant current source with a first MOS transistor which is operated at saturation by a fixed potential connected to a control electrode (gate) and one of the electrodes of a controlled path (source-drain path), and whose other electrode in the controlled path conducts a constant current across a current source output, characterised by a second MOS transistor (T2) which is operated at saturation and whose controlled path is connected in series with the controlled path of the first MOS transistor (T,) and is connected to the current source output (us), and whose slope exceeds that of the first MOS transistor (T1).