GB2010553A - Data Processing Apparatus - Google Patents
Data Processing ApparatusInfo
- Publication number
- GB2010553A GB2010553A GB7845546A GB7845546A GB2010553A GB 2010553 A GB2010553 A GB 2010553A GB 7845546 A GB7845546 A GB 7845546A GB 7845546 A GB7845546 A GB 7845546A GB 2010553 A GB2010553 A GB 2010553A
- Authority
- GB
- United Kingdom
- Prior art keywords
- processor
- lines
- signals
- channel
- data processing
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/44—Arrangements for executing specific programs
- G06F9/4401—Bootstrapping
- G06F9/4403—Processor initialisation
Landscapes
- Engineering & Computer Science (AREA)
- Software Systems (AREA)
- Theoretical Computer Science (AREA)
- Computer Security & Cryptography (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Debugging And Monitoring (AREA)
- Hardware Redundancy (AREA)
- Retry When Errors Occur (AREA)
- Selective Calling Equipment (AREA)
Abstract
The present invention relates to data processing apparatus having an auxiliary processor to execute selective system reset functions in order to overcome the problems of executing system reset via the normal data processing linkages when defective units occur in the linkages or when units are reserved. Both simplex and multiplex processor systems are considered, but the significant embodiment comprises one control processor 80, one attached auxiliary processor 82, one attached channel 84 and the OPOUT and SUPPOUT lines 86 and 87 to a peripheral unit. The auxiliary processor connects to the channel via path 83 and to the OPOUT and SUPPOUT lines via path 85. When a reset instruction is decoded in processor 80, the decoder signals processor 82 which applies I/O RESET signals to the channel and INHIBIT signals to line 85. The inhibit signals suppress lines 86 and 87 for a time period sufficient to indicate system reset to an attached peripheral unit. With multiple channels and hence multiple lines 83 and 85, processor 82 includes a line selection decode (104) responsive to instruction based target data and latches (120) indicating the availability of the target. <IMAGE>
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US86081377A | 1977-12-15 | 1977-12-15 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| GB2010553A true GB2010553A (en) | 1979-06-27 |
| GB2010553B GB2010553B (en) | 1982-01-13 |
Family
ID=25334081
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| GB7845546A Expired GB2010553B (en) | 1977-12-15 | 1978-11-22 | Data processing apparatus |
Country Status (5)
| Country | Link |
|---|---|
| JP (1) | JPS584365B2 (en) |
| DE (1) | DE2850416A1 (en) |
| FR (1) | FR2412121B1 (en) |
| GB (1) | GB2010553B (en) |
| IT (1) | IT1160296B (en) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS593607A (en) * | 1982-06-30 | 1984-01-10 | Fujitsu Ltd | Error processing system of channel |
| JPH0187445U (en) * | 1987-11-28 | 1989-06-09 |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5237738A (en) * | 1975-09-20 | 1977-03-23 | Hitachi Ltd | Information processing system |
| JPS52123141A (en) * | 1976-04-08 | 1977-10-17 | Fujitsu Ltd | Device control system |
-
1978
- 1978-10-17 JP JP53126945A patent/JPS584365B2/en not_active Expired
- 1978-10-31 FR FR7831286A patent/FR2412121B1/en not_active Expired
- 1978-11-21 DE DE19782850416 patent/DE2850416A1/en not_active Withdrawn
- 1978-11-22 GB GB7845546A patent/GB2010553B/en not_active Expired
- 1978-12-01 IT IT30415/78A patent/IT1160296B/en active
Also Published As
| Publication number | Publication date |
|---|---|
| FR2412121B1 (en) | 1986-03-14 |
| GB2010553B (en) | 1982-01-13 |
| FR2412121A1 (en) | 1979-07-13 |
| JPS584365B2 (en) | 1983-01-26 |
| JPS5484445A (en) | 1979-07-05 |
| IT7830415A0 (en) | 1978-12-01 |
| DE2850416A1 (en) | 1979-06-21 |
| IT1160296B (en) | 1987-03-11 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PCNP | Patent ceased through non-payment of renewal fee |