GB2092375A - Variable capacitor - Google Patents

Abstract

A variable capacitor which comprises a capacity sensing electrode 13 formed along a surface of a semiconductor crystal bulk 11 having other, sloping surfaces and at least one depletion layer control section including a control electrode 16 and/or 17 along the sloping surface. The thickness of a depletion layer 19 within the bulk varies when the depletion layer control section is supplied with a reverse bias voltage VB through the or each control electrode 16, 17 and the capacity variation then caused is read out by the capacity sensing electrode 13. The latter is adjacent a junction 12, lies on an insulating layer, or includes a Schottky barrier. <IMAGE>

Description

SPECIFICATION Variable capacitor This invention relates to a variable capacitor.

A PN junction diode is generally used as a variable capacity diode because when a reverse bias voltage is applied to the PN junction, carriers near the junction move to thereby from a depletion layer and the thickness of the depletion layer is determined by the reverse bias voltage.

In prior art variable capacitor diodes, the bias voltage is applied to an electrode which also serves as a capacity variation sensor.

Therefore, if a semiconductor bulk with an even concentration is used, the capacity variation characteristic is such that the capacity variation is relatively moderate when a high bias voltage is applied, thus causing necessity of controlling the diffusion profile by means of ion implantation or similar techniques. Therefore it is difficult to produce such devices and even if the control of diffusion profile can be performed, it is only in a narrow range. Further, due to the above-described structure, circuit design is somewhat restricted.

Additionally, with voltage of about 1 2V which is a standard voltage in a car, etc, the thickness of the depletion layer formed in accordance with the movement of carriers is also restricted.

In accordance with the present invention, there is provided a variable capacitor which comprises: a semiconductor crystal bulk having at least one sloping surface; a a depletion layer control section provided under said sloping surface; a capacity sensing section provided on another surface of said bulk; a means for applying reverse bias voltage to the depletion layer control section; and a variable voltage source for supplying the reverse bias voltage,.

By way example, embodiments of a variable capacitor according to the present invention will now be described with reference to Figures 1-5 of the accompanying drawings in which: Figures 1 to 3 show sectional views illustrating different embodiments according to the present invention respectively: Figure 4 shows an equivalent circuit of the embodiments as shown in Figures 1 to 3; and Figures 5 (at, (b) and (c) show sectional views and a perspective view each illustrating a further embodiment according to the present invention.

Figure 1 shows a variable capacitor 10 of a PN junction type. A semiconductor crystal bulk 11 made of a N-type material has two sloping surfaces 20 and an upper horizontal source. In a a central portion of the upper surface there is provided a P-type region 12 as being a first PN junction. A capacity sensing electrode 13 made of a metallic material is provided in contact with the P-type region 12. Along both sloping surfaces 20 other P-type regions 14 and 15 are provided and these form a second and a third PN junction, respectively.

In contact with the respective P-type regions 14 and 15 are control electrodes (bias electrodes) 16 and 17 - made of a metallic material. Along the bottom of the bulk 11 an ohmic electrode 18 (opposite electrode) is formed.

In this arrangement, when a reverse bias voltage VB is applied to the second and third PN junctions from a variable voltage source 26, the thickness of a depletion layer 19, formed by the first PN junction, moderately varies due to the existence of the sloping surfaces 20. The capacity variation is read out at the capacity sensing electrode 13. Thus, the structure as shown in Figure 1 functions as a variable capacity diode.

Figure 2 shows another embodiment according to the present invention, in this case a so called Schottky variable capacitor 21. Between the upper surface of the semiconductor crystal bulk 11, made of a N-type material having the sloping surfaces 20, and a capacity reading electrode 22, made of a metallic material, a Schottky barrier is formed. At both sides of the Schottky barrier and along the sloping surfaces 20 there are P-type regions 14 and 15 forming the first and second PN junctions, respectively. The control electrodes (bias electrodes) 16 and 17 made of a metallic material are provided in contact with the P-type regions 14 and 15, respectively. Further, the ohmic electrode (opposite electrode) 18 is formed along the bottom of the bulk 11.

In this arrangement, when a reverse bias voltage is applied to the first and second PN junctions formed along the sloping surfaces 20, the thickness of the depletion layer 19, then formed under the Schottky barrier, moderately varies due to the presence of the sloping surfaces 20. The capacity variation then caused is read out at the capacity sensing electrode 22. Thus, the structure as shown in Figure 2 also functions as a variable capacity diode.

Figure 3 shows a further embodiment according to the present invention, in this case a so-called MIS variable capacitor 23 is illustrated. The semiconductor crystal bulk 11 made of a N-type material has sloping surfaces 20 along which the first and second PN junctions 14 and 15 are formed, respectively. The control electrodes (bias electrodes) 16 and 17 made of a metallic material are provided in contact with the P-type regions 14 and 15. Further, on the upper surface of the bulk 11 there is provided an insulator 24 spanned between the P-type regions 14 and 15. A capacity sensing electrode 25 is provided on the insulator 24. That is, a MIS structure is formed on a central portion of the upper surface. Also, the ohmic electrode (opposite electrode) 18 is provided along the bottom of the bulk 11.

In this arrangement, when a reverse bias voltage is applied to the first and second PN junctions formed along the sloping 20, the thickness of the depletion layer 19 forrned under the MIS structure moderately varies due to the presence of the sloping surfaces 20. The capacity variation then caused is read out at the capacity sensing electrode 25. Thus, the structure as shown in Figure 3 functions a variable capacitor diode, too.

It should be noted that the capacitors as described above operate in the same manner even if the N-type region and the P-type region are interchanged. Further the depletion layer control section may also have a PN junction structure, a Schottky barrier structure or a MIS structure.

Figure 4 shows an equivalent circuit used for each of the variable capacitors of the above-described embodiments. Terminals a and b are bias terminals for applying reverse bias voltage to the first and second PN junctions and terminals c and d are capacity sensing terminals for sensing the variation of the capacity.

If CO denotes either the differential capacity obtained when the bias voltage of the Schottky barrier is zero or when the bias voltage of the MIS structure is zero (without taking into consideration the flat band shift) and CD denotes the differential capacity obtained while the depletion layer 19 increases, then the differential capacity C read out at each of the capacity reading sections (the electrodes 13,22 and 25) is expressed as follows: 1 1 + 1 (1) C = CO CD Further, when the thickness of the depletion layer is designated by d, the electrode area by S and the dielectric constant of the semiconductor crystal by E, respectively, the differential capacity CD of the depletion layer is expressed as follows:: CD = us . Sid (2) In order to design the variable capacitor with a large capacity range, the capacity C0 may be designed small with respect to the capacity CO as apparent from the expression (1) and the thickness of the depletion layer d may be designed large.

Since prior art variable capacitors use the same electrode as a bias voltage means and a capacity variation sensing electrode, the thickness d of the depletion layer is strictly limited. However, according to the present invention in which PN junctions are provided along the sloping surfaces 20, the thickness d of the depletion layer 19 can vary in a moderate manner even when the supply voltage is around 12V as mentioned above.

Accordingly, depletion layer 19 can grow remarkably large compared with the prior art one. Therefore, a remarkable increase of variation of the capacity can be obtained. Further, the variable range of the capacity with respect to the voltage can be designed appropriately.

Particularly for the MIS structure as shown in Figure 3, the capacity varying proportion CmaxlCmin is expressed as follows: Cmax ~ d Eg gO . do + 1) (3) Cmin - dO EB U d The reference symbol do designates the thickness of the insulator 24 and Eo is the dielectric constant of the insulator 24. In this arrangement, it is easy to raise the capacity varying proportion to about 70, extemely large compared to the prior art.

Figures 5 (a), (b) and (c) each illustrate a further embodiment according to the present invention. Figure 5 (a) illustrates a structure of an IC in which a plurality of PN junction type variable capacitors are integrated in the semiconductor crystal bulk 11. The variable capacitors are aligned to enable the apparatus to cumulatively obtain a desired capacity variation characteristic. In this case, respective variable capacitors may be designed to have different capacity characteristics or to be independently used.

Figure 5 (b) illustrates a structure of the bulk in which the central portion of the substrate for providing the capacity reading section thereon comprises sloping surfaces 20'. Thus, since the growth of the depletion layer 19 is given a further variation, a different capacity variation characteristic can be obtained.

Figure 5 (c) illustrates a structure of the bulk in which a plurality of the variable capacitors are aligned longitudinally in the semiconductor substrate bulk 11. The bulk may be used as shown where the variable capacitors are connected in alignment, or otherwise, may be used as a piece obtained by cutting it at portions indicated by dotted lines in the drawing.

The sloping surfaces in the above-described embodiments may be provided with a desired slope by means of a known mechanical grinding means. Further, by selecting an appropriate material and a suitable etching liquid, sloping surfaces having a desired slope can be formed in any positions on the bulk.

It is seen from the foregoing that by providing the depletion layer control section along the sloping surfaces the depletion layer is allowed to grow large, thus producing an enlarged capacity variation.

Incidentally, any number of depletion layer controls sections may be used provided that the depletion layer, lying under the capacity sensing electrode, can be effectively controlled.

Claims (10)

1. A variable capacitor which comprises: a semiconductor crystal bulk having at least one sloping surface; a depletion layer control section provided under said sloping surface; a capacity sensing section provided on another surface of said bulk; a means for applying a reverse bias voltage to the depletion layer control section; and a variable voltage source for supplying the reverse bias voltage.

2. A variable capacitor as claimed in Claim 1, wherein a plurality of sloping surfaces are provided and the depletion layer control section is provided on each of said sloping surfaces.

3. A variable capacitor as claimed in Claim 2, where the capacity sensing section is provided on a sloping surface.

4. A variable capacitor as claimed in any one of Claims 1 - 3, wherein the capacity sensing section has a MIS structure.

5. A variable capacitor as claimed in any one of Claims 1 - 3, wherein the capacity sensing section has a Schottky barrier structure.

6. A variable capacitor as claimed in any one of Claims 1 - 3, wherein the capacity sensing section has a PN junction structure.

7. A variable capacitor as claimed in any one of Claims 1 - 3, wherein the depletion layer control section has a MIS structure.

8. A variable capacitor as claimed in any one of Claims 1 - 3, wherein the depletion layer control section has a Schottky barrier structure.

9. A variable capacitor as claimed in any one of Claims 1 - 3, wherein the depletion layer control section has a PN junction structure.

10. A variable capacitor substantially as hereinbefore described with reference to and as illustrated in Figures 1 - 5 of the accompanying drawings.