GB2067318A

GB2067318A - Circuit arrangement for regulating the power drawn by at least one load from a supply network

Info

Publication number: GB2067318A
Application number: GB8038698A
Authority: GB
Original assignee: Zumtobel AG
Current assignee: Zumtobel AG
Priority date: 1979-12-04
Filing date: 1980-12-03
Publication date: 1981-07-22
Also published as: GB8320970D0; AU6505780A; ES8106969A1; ES497447A0; AU548230B2; AU4110085A; GB2131985B; GB2067318B; DE3044406A1; DE3044406C2; GB2131985A; AU581884B2

Abstract

A circuit arrangement regulates the power drawn from a supply network by at least one load 50 with linear and/or non-linear current-voltage characteristics. It has a controlled switch 51 which is connected in series, and preferably a sensor circuit 54 in series and/or parallel, with the load. A regulating circuit 55 is arranged between the sensor circuit 54 and the controllable switch 51. In the input circuit of the regulating circuit 55, the actual value for the operational state of the load 50 is formed by a mean value formation of the current of the load 50. The output of a mean value former 57 forms one input quantity of the regulating circuit 55 and the output of the sensor circuit 54, determining the momentary value of the load current, is connected to the input of the mean value former 57. Thus a quantity corresponding to the mean value of the load current forms one input of circuit 55, and another input of the circuit 55 is a desired value linked in phase with the supply. <IMAGE>

Description

SPECIFICATION Circuit arrangement for regulating the power drawn by at least one load from a supply network This invention relates to a circuit arrangement for regulating the power drawn from a supply network, by at least one load with linear and/or non-linear current-voltage characteristic.

Subject to the current-voltage characteristic of a load with linear and/or non-linear current-voltage characteristic, e.g. of a flash tube, it is necessary to compensate the characteristic curve of the same by a current limitation effect, in order to thereby guarantee a stable working point.

Regarding this, it is usual, in the operation e.g. of a flash tube with direct voltage, to use ohmic series resistors, which has as a result poor over-all efficiency. In addition, the production of a starting voltage is hereby not easily possible. In the by far predominant case of operation of flash tubes with alternating current, an inductance connected in series with the flash tube can be used for limiting the current. In this it is a disadvantage that in particular, only a small power factor of the whole arrangement can be achieved, separate measures are necessary to compensate the inductive idle current, and acoustic disturbances can scarcely be avoided.

It is, accordingly, one object of the invention to provide a circuit arrangement to operate a load with linear and/or non-linear current-voltage characteristic, in which a stable working point can be achieved without necessitating the interposition of a current-limited impedance.

Facing this, the invention is posed with the following problem. In the feeding of loads from a common supply network, the voltage available from the network can be regarded largely as independent of load. The current that is drawn from the network is determined largely by the current-voltage characteristic of the load.

In order to avoid influences of loads connected to the same network, there is to be sought a harmonic content as small as possible of the current drawn by the load (if it can be assumed that the voltage is determined by the network).

Phase-gate control is known above all to control the effective power picked up by networked loads.

The greatest disadvantage of phase-gate-controls, however, is represented by the multiplicity of harmonics in the supply voltage network (network frequency), which are fed back into the supply network from the load by the none-sine-shaped load current. In practice, it is sought to reduce the energy of the harmonics released into the network, by relatively expensive filter arrangements, and this is indeed partly achieved.

The loads mostly to be regulated in their power in practice have either ohmic or respectively inductive (motors or such like) characters, and yet can essentially be fed back to largely linear or linearisable current-voltage characteristic curves.

The operation of loads with a non-linear, above all strongly non-linear current-voltage characteristic curve, when characteristic curve-branches in particular falling in certain characteristic curve zones occur with negative differential internal resistance, requires a limitation of the current drawn by from the load, in order to avoid instabilities.

This limitation of the drawn current, whereby a typical load of this type can be seen in a flash tube, can be brought about in the case of operation with direct current by ohmic series resistors, and in the case of operation on alternating current by inductors connected in series to the gas discharge path.

It is a disadvantage here, that in particular only a small power factor of the whole arrangement can be achieved, so that separate measures are necessary to compensate the inductive idle current and, moreover, acoustic disturbance beams from the magnetic components can appear as a disturbance factor.

If the power of a load of this type be regulated according to the principle of phase-gate control, then an external current limitation in the circuit must also be maintained here, so that the falling characteristic curve sections can not even here lead to instabilities in the whole system.

In the case of power regulation by phase-gate-control, the harmonic content is brought about itself largely by the phase-gate-control and through the linearisation of the characteristic curve, the load is not influenced very much by current limitation or the like.

A method of power regulation according to the principle of pulse width modulation is also known. In it, the supply alternating current is chopped with a relatively high switching frequency. The mark-space ratio of this chopped supply voltage determines the power which is available to the load, whereby it must be implicitly assumed that the load either has integrating qualities itself, or these are brought up through an appropriate network. The harmonics-spectrum produced by the chopping and by the pulse-width-modulation is, however, exceptionally wide, with a high spectral energy density in the case of both low and high frequencies, and represents the main disadvantage for this type of power regulation.

Accordingly, it is an aim of preferred embodiments of the invention to develop further a circuit arrangement for the regulation of power fed from a supply network to at least one load with linear and/or non-linear current-voltage characteristic, in such a way that the amplitudes of the disturbance harmonics fed back into the supply network, particularly of the lower order, are considerably reduced or respectively transposed to a frequency zone where they can be controlled by simple circuit means or respectively filtered out.

More generally, according to the present invention, there is provided a circuit arrangement for regulating the power drawn from a supply network by at least one load with linear and/or non-linear current-voltage characteristic, the arrangement comprising a controllable switch which, in use, is in series with the load, sensor means for sensing the instantaneous value of load current, a mean value former for deriving as a mean value from said sensor means an actual load current value, and a regulating circuit which is connected to control said switch, and receives in use said actual load current value as one input, and a desired load current value as another input.

As a particular advantage of a preferred circuit arrangement embodying the invention, for operating at least one load with linear and/or non-linear current-voltage characteristic, to which a controlled switch is connected in series, and preferably a sensor circuit in series and/or parallel, whereby a regulating circuit is arranged between the sensor circuit and the controllable switch, and in which, in the input circuit of the regulating circuit, the actual value for the operational state of the load is formed by a mean-value-former of the current of the load, it arises that the load, e.g. a flash tube, can be operated with an alternating current of such a frequency that the frequency-dependent input impedance of the discharge space is practically ohmic, so that phase compensation, which is otherwise necessary to achieve a power factor of 1, can be omitted.

In a preferred circuit arrangement embodying the invention, to regulate the power, drawn from a supply network, of at least one load with linear and/or non-linear current-voltage-characteristic, to which a controlled switch is connected in series, and preferably a sensor circuit in series and/or parallel, whereby a regulating circuit is arranged between the sensor circuit and the controllable switch, and in which, the output of a mean-value-former is connected to one input of the regulating circuit and the sensor circuit, determining the momentary value of the load current, is connected to the input of the mean value former, so that a quantity corresponding to the mean value of the load current lies at this one input of the regulating circuit, and another input of the regulating circuit is connected to a desired value-setting circuit which predetermines a desired value quantity directly linked with the frequency of the supply network, a possibility of developing further the invention consists in that the regulating circuit ensures a sine-shaped mean value of the current drawn from the supply network, by regulating the mark-space ratio of a switch control signal.

In this embodiment of the invention, the regulating circuit thus determines the difference of the mean value of the load current from a desired quantity, which changes with respect to sine-shape depending on time, and which in its temporal development is fixedly linked with the network frequency and regulates, in dependence on this determined difference, the mark-space ratio of the control signal of the switch to such a value, that the current drawn from the supply network has a sine-shaped mean value.

Through this there may arise in particular a minimum of amplitudes of the disturbance harmonics of the lower order (i.e. low frequencies). The harmonics in high frequencies are influenced only a little by it, and yet the suppression of higher frequency disturbances with low-loss filtering means is possible, since the values for inductivity and capacity of the filter elements corresponding to the switching frequency are far smaller than they would be if the frequency of the supply network were to be taken as a starting point.

The control signal of the switch can be a normal impulse signal. However, from the point of view of realisation, as regards circuit technology, of a pulse width modulator, or because of the physical qualities (current-voltage characteristic curves) of the load to be controlled, it can also be advantageous to replace the individual impulses, repeated e.g. in the scope of a pulse-width-modulation process, of a normal pulse train with a defined sequence of (even shorter) individual impulses, so that a so-called multi-burst signal occurs after the modulating process. Coordination between the two signals is possible via the current-time, or respectively, voltage-time area. In the case now of a change in the mark-space ratio, in the context of such a multi-burst signal, then this signifies the change in mark-space ratio of the impulse-signal enveloping the burst impulses.

The value of the switching frequency, which determines the period e.g. of pulse width modulation impulses, can, in principle, no longer be freely selected, but it is determined by the desired measure -of suppression of the low-frequency sections of the harmonics-spectrum.

The upper limit for the amplitude of the considered harmonics falls at least quadratically with the frequency ratio of network supply frequency and switching frequency, and rises with the ordinal number of the harmonics. > The dependence of the,maximum of low-frequency harmonics on the frequency ratio between the network frequency and the switching frequency remains, however, maintained.

The use of this minimising step for the low-frequency harmonics brings advantages particularly when, regarding the load, it is a question of an element with a partially falling characteristic curve-portion. Control of the impulse width may come about by means of the regulating circuit, in which the command variable of the regulation forces the sine-shaped temporal mean value of the current, which is taken from the network.

However, an arrangement of this type, which matches the mark-space ratio by regulation to the respective working point on the current-voltage characteristic curve of the load, is not limited to the operation of loads with non-linear current-voltage characteristic curve, but is suitable in general both for the operation of loads with linear and non-linear characteristic curve, with or without falling characteristic curve portions. This represents a considerable advantage of such an arrangement in comparison with traditional phase-gate controls.

The realisation, as regards circuit art, of the last-mentioned embodiment, for the regulation of the power drawn, can be realised either in analog or digital form, but also in hybrid form with the use of analog-digital converters or respectively digital-analog converters.

A preferred further development of a circuit arrangement according to the invention in analog form consists in that the regulating circuit comprises a difference former with a subsequently added error amplifier and a conversion circuit connected to one output of the difference former - error amplifier arrangement to change the mark-space ratio of a switch control signal depending on the respective size of error. A desired value-setting-circuit hereby consists preferably of a multiplier circuit, at whose one input there lies a voltage proportional to the voltage of the supply network and at whose other input there lies a constant voltage, which is a measure for the power to be drawn by the load (long-term-desired value predetermination), and at whose output there results a sine-shaped desired value quantity, firmly linked with the frequency of the supply network.

In the design of the circuit arrangement according to this embodiment the particular advantage can be achieved of a simple construction.

The design of the above circuit arrangement in digital form can consist in that the control circuit is formed by a selecting logic. For example, the desired value setting circuit hereby comprises a programmed fixed value store with at least one value table corresponding to the sine-shaped mean value of the current to be drawn from the supply network, whereby the output of a phase-locked phase regulating loop synchronised by the supply network, is connected to one input of the fixed value store for the emission'of the store contents, conforming in time with the network frequency, and whereby there arises at the output of the fixed value store a counting value, which changes in respect of its sine shape in dependence on time, and which is firmly linked with the network frequency in its temporal development.

It is to be mentioned here as a particular advantage of this design that there may exist here a simple and complete integrability of the whole circuit arrangement, which permits economical manufacture in large quantities.

Yet another preferred embodiment of such a further development of the invention can consist in that the regulating circuit comprises a difference former, at whose output there is connected, via an analog-digital converter, a converting logic to change the mark-space ratio of the switch control signal in dependence on the respective size of error.

For a better understanding of the invention and to show how the same may be carried into effect, reference will be made by way of example to the accompanying diagrammatic drawings, in which: Figure 1 is a very schematic block circuit diagram of a circuit arrangement embodying the invention, for regulating the power fed from a supply network to at least one load with linear and/or non-linear current voltage characteristic; Figures 2, 3, 5 and 7 illustrate possible realisations of a controllable switch; Figure 4 is a waveform diagram illustrating load voltage; Figure 5 shows a control voltage for the switch; Figure 6a shows a control voltage such as that of Figure 5 in the form of a pulse train; Figure 6b shows a so-called multi-burst signal; Figure 8 is a detailed block circuit diagram of a circuit arrangement as in Figure 1, designed in analog form;; Figure 9 is a basic circuit diagram of a desired value setting circuit; Figure 10 is a detailed block circuit diagram of a circuit arrangement as in Figure 1 designed in digital form; Figure 77 shows a possible embodiment of selecting logic shown in Figure 10: Figure 12 is a detailed block circuit diagram of a circuit arrangement as in Figure 1 designed in analog-digital-hybrid form; Figure 13 is a schematic block circuit diagram of another arrangement embodying the invention, for operating at least one load with linear and/or non-linear current-voltage characteristic; and Figure 14 shows a modified embodiment of the circuit arrangement of Figure 13.

The circuit arrangement according to Figure 1 can be classified into the following main functional groups.

A series circuit lying directly at terminals I, II for the supply voltage (network voltage) of a load 1, a controlled switch 2 and a sensor circuit 3, a regulating circuit 4, whose output is connected to the control input of the switch 2, and which brings about regulation of the mark-space ratio of the switch, of such a type that a sine-shaped mean value of the current drawn from the supply network is obtained, as well as a mean value former 5 and a desir, value setting circuit 6.

The mean value former 5 fed from the sensor circuit 3 is connected to one input of the regulating circuit 4, so that a signal corresponding to the mean value of the load current lies at this input of the regulating circuit 4.

Connected to a further input of the regulating circuit 4 is the desired value setting circuit 6, which supplies a signal changing in respect of sine-shape in dependence on time, which signal is directly linked in its phase with the network frequency. Thus, one input of the desired value setting circuit 6 is directly connected to the supply network. A control signal is connected to a further input, through which signal the effective value, averaged over several network periods, of the current flowing through the load, can be adjusted.

The controlled switch 2, suitable for alternating current, is formed preferably from controllable semi-conductor components. The selection criteria for a certain form of realisation are formed on the one hand by the necessary voltage stability and the maximum Qccurring load current, and on the other hand by the losses, brought about by the switched-on resistance and the change of resistance with time, of the component used as a switch. They play a considerable part in determining the degree of effect of the whole arrangement.

According to Figure 2, the controlled switch 2 can consist e.g. of a bipolar transistor T, which is arranged in a diagonal of a diode bridge, consisting of four diodes D1 to D4. The switching of an alternating voltage at points A and B is made possible by the bipolar transistor T.

To describe the functional method of the switch, Figure 4 shows the voltage at the load 1, whilst Figure 5, and respectively Figure 6a and 6b, show the appropriate control voltage of the control input (point C in Figure 2) of the switch.

Figure 3 shows a further embodiment of a switch which can be used for a circuit embodying the invention, according to which the switch consists of a power-MOS-field effect transistor, which exhibits an essentially symmetrical output ratio. It is used directly for switching alternating currents. The control is effected via the potential terminal point C.

The disadvantage of the potential-controlled drive can be overcome by the use of an optocoupler, whereby the direct optical onward control of the power switch element is possible in bipolar as well as in MOS art.

Figure 7 shows an optically controlled field effect transistor of this type.

Figure 8 shows the circuit arrangement in analog form.

The sensor circuit 3 consists appropriately of a resistor or current transformer, passed through by load current, or respectively of a magnetic-field-sensitive component, which determines the magnetic field produced by the load current.

The mean value former 5 connected to this sensor circuit 3, e.g. a traditional mean value former, such as a TRUE-RMS converter element, Type AD 442 (Analog Devices), converts the sensor circuit 3 signal, proportional to the momentary value of the load current, into a signal proportional to the mean value of the load current, whereby averaging can extend over one or several periods of the switch signal.

The realisation of the mean value former can follow e.g. also through a sample - and - hold circuit in connection with a controlled integrating member to form the mean value.

The desired value setting circuit 6 consists, in its simplest embodiment, of a multiplier circuit 9 (Figure 9).

One input of the multiplier circuit 9 is connected to a tap of a voltage divider 8 connected to the supply network. The setting signal is connected to a second input of the multiplier circuit. The multiplicative combination of these two signals gives rise to a signal proportional to the desired value of the effective value, predetermined by the adjusting signal, of the load current, which former signal is connected to one input of a difference former 10.

The other input of the difference former 10 is connected to the output of the mean value former 5. The differential signal is finally amplified in an error amplifier 11 and is fed to a control input of a converting circuit 12. The converting circuit controls the mark-space ratio of switching impulses produced by a cadence generator 13 in dependence on the amplified differential signal of the difference former 10. The output of the conversion circuit 12 controls the switch via a drive circuit 14, and determines its opening and closing times.

In certain embodiments of the switch 2, as e.g. those in the form of an OPTO-FET, the output signal of the conversion circuit drives the switch directly.

The mark-space ratio of the impulse signal, or respectively of the impulse-shaped envelope signal of a multi-burst signal, can be changed by the conversion circuit in two ways. Either the impulse width can be changed in the event of a constant cadence frequency (drive frequency) (pulse-width modulation), or the switch frequency can be changed in the event of a constant impulse width. In the case of the multi-burst signal, pulse-width modulation of this type can likewise be effected through the number of individual impulses contained in each burst. The cadence generator, difference former, error amplifier, conversion circuit and drive circuit can be realised by conventional components of the analog-calculating art.Thus,-the difference former 10-and the error amplifier 11 can consist of the parts LF 351 or respectively LF 741, and the conversion circuit together with the cadence generator, of the pulse-width-modulator component LM 3524 of the National Semiconductor Co. The drive circuit can consist e.g. of a normal transistor-driver.

Figure 10 shows a circuit arrangement realised in digital form. In this embodiment, the regulating circuit consists of a selecting logic 15. This selects, depending on its input quantities, which correspond to the desired current value, and respectively the actual current value, a number of cadence periods ascertained by a regulating aigorithm specific to the load, as a duration of connection for the switch. The period of the impulse signal (Figure 6a), or respectively of the envelope signal of the multi-burst signal (Figure 6b), must therefore be at least as short as the minimum duration of connection of the switch. The switching on or off of the switch follows the leading or respectively trailing edge of the impulse signal.

Sensor circuit 3 and mean value former 5 can be designed in conformity with the previous embodiments, whereby the output of the mean value former 6 is then connected via an analog-digital converter 20 to the positive input of the selecting logic.

The desired value setting circuit 6 consists of a phase locked loop 16 and a subsequently added fixed value store 17. The phase locked loop 16 produces, from a reference signal tapped from the supply network, a generator signal which is phase-lock-coupled with the supply network, and which is fed to the selecting logic 15 via the conductor 18. Further, the loop 16 produces a signal connected to an input of the fixed value store 17, which signal contains information concerning the momentary phase position of the supply network.

The fixed value store 17 is permanently programmed with at least one value table corresponding to the sine-shaped mean value of the current to be drawn from the supply network. The fixed value store can be e.g. a PROM of the type 2716. The fixed value store is designed with a further input, via which input various value tables of the same structure can be read from the fixed value store in dependence on the type and respectively size of the input signals. Each value table hereby corresponds to the effective value of a certain load current to be drawn from the supply network, and this in dependence on time (phase position). In order to select effective values of different high load currents, either different value tables can be provided, or the contents of one value table can be changed accordingly by arithmetic operations (linear multiplication or division).The calling up of such different value tables is controlled by the setting signal connected to the further input of the fixed value store.

There thus arises at the output of the fixed value store 17, which is connected to the desired value input of the selecting logic 15, a counting value, changing in respect of sine-shape in dependence on time, which is directly linked in phase with the network frequency.

An alternative development to attain the regulated quantity, realised subsequently in sine-shape, for the selecting logic, can consist, for example, of an algorithm for computing a numerical value, realised by e.g. a I1 P - system 8085 as CPU, which prescribes the appropriate mark-space ratio of the drive voltage of the alternating current switch for each momentary value of the signal.

A drive circuit, e.g. an exciter, serves to convert the output signal of the selecting logic into a control signal for the switch, and can also be omitted in the case of a suitable model of switch, e.g. an OPTO-FET.

The individual circuit blocks are made with the use of parts normally used in the digital-calculation art.

Thus, the regulating circuit 6, the mean value former 5 and the selecting logic 15 can be formed by a 11 P 8085 or respectively 8748 as a CPU.

Figure 11 is a detailed block circuit diagram of a possible embodiment of the selecting logic 15. A difference former 30 determines which of the two values, actual current value or desired current value, is the greater. The output signal, a binary decision signal, operates upon a counter control 31, which increases or reduces the counter content of a forwards-reverse counter 32 in dependence on the differential signal. The counter content of the forwards-reverse counter gives the number of periods of the basic cadence cycle, during which the controlled switch 2 remains closed. The selecting logic 15 consisting, further, of a ring counter 33, a comparator 34 and a flip-flop 35. This assembly converts the counter content of the forwards-reverse counter - as described below - into a pulse-width-modulated signal to drive the switch 2.

The ring counter 33- counts the periods of the basic cadence and sets the flip-flop 35 as soon as its zero position is reached. Whilst the counter continues to count, the flip-flop 35 remains set and thus the switch 2 closed, until the comparator identifies an agreement of the counting state of the ring counter 33 with the contents of the forward-reverse counter 32 and resets the flip-flop 35. In this way, the switch 2 is opened and remains open until the ring counter reaches its zero position again and begins a new period of the PWM-signai. The length of the counter and the basic cadence determine the period of the PWM signal according to the formula T - 2 N-i TG N = counter length in stages Tc. = period of the basic cadence Tl = period of the PWM signal.

The mark-space ratio of the switch control signal arises from the formula:

Z = counter state of the forward-reverse counter.

Figure 12 shows a circuit arrangement realised in the hybrid analog-and-digital art. The main difference of this embodiment as opposed to that according to Figure 10, consists in that the comparison between the actual and desired values follows by analog means. For this, as in the embodiment according to Figure 8, a difference former 10 and an error amplifier 11 are provided.

Sensor circuit 3 and mean value former 5 correspond, as regards their function and design, to the corresponding circuits in the above-described embodiments. The desired value setting circuit 6 is identical to that in Figure 10, and therefore likewise comprises a phase-locked loop 16 and a fixed value store 17. The output of the digitally operating desired value setting circuit 6 is connected to the desired value input of the difference former 10 via a digital/analog converter 20.

The output of the error amplifier 11 is connected, via an analog/digital converter 21, to a converting logic 22, which depending on these input signals, controls the mark-space ratio of the impulse signal, fed to it from-the desired value setting circuit, in such a way that a sine-shaped mean value of the load current is obtained. The output signal of the converting circuit, whose mark-space ratio is determined for the sine-shaped mean value to be obtained of the load current, is fed as a switch control voltage to the switch 2, if necessary via a drive circuit 23. Whether or not a drive circuit is used depends - as alreådy mentioned - on the conception of the switch as regards circuit art.

The realisation, as regards circuit art, of the converting logic 22, can, for example, consist in the combination of cadence generator, a gate circuit and a flip-flop, which produces a signal according to Figure 6b and is realised by components of a logic circuit family, e.g. in TTL, MOS, or 12L art.

Figure 13 shows a circuit arrangement designed for alternating supply voltage, to operate at least one load with linear and/or non-linear current-voltage characteristic. A load of this type can be, for example, a flash tube. Let it also be mentioned in this context, that the invention is not limited to a supply with alternating current. It can be carried out just as well with a direct current supply. Thus, both direct and alternating voltages can be connected to terminals A, B, as supply voltages.

A controlled switch 51, arranged in series with a load 50, consists of four diodes 52 connected in bridges.

One bridge diagonal X-X lies in series with the load 50, and arranged in the other bridge diagonal Y-Y is a series circuit consisting of a switching transistor 53 with a current sensor resistor 54.

The falling voltage at the current sensor resistor 54 is fed to the regulating circuit 55 as an input signal, and the output voltage of the regulating circuit 55 to the base of the switching transistor 53 as a control voltage.

The regulating circuit 55 contains a sample-and-hold circuit 56 and a mean value former 57, to whose inputs the falling voltage at the current sensor resistor is connected. Their outputs are connected to respective inputs of a regulating amplifier 58. The sample-and-hold circuit 56 can be a conventional measuringconverter component and reacts to the permissible peak value of the tube current. The mean value former 57, e.g. a conventional TRUE-RMS -converter component, reacts to a pre-adjustable mean current value. The sample-and-hold circuit 56 is the superposed circuit as against the mean value former, i.e. for the subsequent signal evaluation, the output signals of the sample-and-hold circuit 56 have priority over the signals of the mean value former.The output of the regulating amplifier 58 is fed on the one hand to a control impulse generator 59, which can be regulated with respect to its frequency, and on the other hand to a pulse width rnguiator 6Q for the impulses produced by the generator 59. The output of the pulse width regulator 60 can be directly connected to the base of the switching transistor External control transmitters and/or receivers, e.g. for brightness controls, group controls or the like, can be connected to a further input G, or respectively output H, of the regulating circuit 55. A signal tapped from the alternating network voltage can also be fed to terminal G to predetermine the course in time of the load current.

Switching-frequency transient effects into the supply network can be blocked off by a low-pass filter circuit 61.

With the aid of Figures 4 and 5, brief mention is to be made below of the method of function of the circuit according to Figure 13. Figure 4 shows the temporal development of the voltage UL on the load, e.g. a flash tube, and Figure 5 the associated control voltage at the base of the transistor 53. The function of the controlled switch, then, is such that it chops the connected alternating supply voltage into voltage impulses of a period T = T1 + T2 ; T1 is here the closing duration and T2 the opening duration of the switch.

Determining the working point of the load follows via the mark-space ratio

of the impulse-shaped load voltage, which for its part can be determined by changing the frequency fof the impulse generator 59 and/or via the pulse width moduiator 60 by changing the closing duration T1. The working point can either be permanently set, which follows through the appropriate pre-setting of the sample-and-hold circuit 56 and the mean value former 57, or respectively it can also be displaced externally by a regulating quantity at input G, which will be the case e.g. in brightness regulation (dimmer operation) of the tube. The frequency of the impulse generator and thus also of the voltage impulses on the load lies suitably in a range of 10 kHz to 200 kHz.

The regulating circuit itself can be carried out in analog or digital form. In the latter case, the impulse generator is formed by a cadence generator and a selecting logic, whereby the period of the cadence generator is shorter than the shortest possible, usable duration of connection T1 of the controllable switch.

Figure 14 shows a further possible circuit arrangement to operate at least one load with linear and/or non-iinear current-voltage characteristic with two possible realisations of the controlled switch 51. In these embodiments, likewise suitable for a direct or alternating supply voltage, circuits groups in accordance with Figure 13 are provided with the same reference symbols.

According to Figure 14, the controllable switch can be formed by a power-field-effect transistor 62 lying in series with the load 50, the gate-electrode of which transistor is driven by the regulating circuit 55. A V-FET, a HEX-FET or similar, for example, may be used as a power-field-effect transistor. This embodiment has the particular advantage that no separate sensor circuit has to be used, as e.g. the resistor 54 according to Figure 13, since the channel resistance of the switdhed-on field-effect transistor, which is passed through by current, can itself be used as such. The drain-source voltage proportional to the load current is fed to the regulating circuit 55 as an input quantity.

The controllable switch can, however, also be formed by a semi-conductor four-layer structure 63. In this case it may be a TRIAC, a thyristor, or similar.

The regulating switch 55 is coupled directly to the controllable switch 51 in Figure 13 (and analogously in Figure 14). However, the invention is not limited to this. The driving of the controllable switch can be carried out alternatively with the use of a drive circuit which is arranged between the regulating circuit and the controllable switch, and which attends to a division of potential between these two circuit groups 51, 55. This potential-dividing drive circuit can be formed by a capacitor or a transformer, but consists preferably of an optocoupler with an optical receiver in the form of a photo-semiconductor.

Claims

1. A circuit arrangement for regulating the power drawn from a supply network by at least one load with linear and/or non-linear current-voltage characteristic, the arrangement comprising a controllable switch which in use is in series with the load, sensor means for sensing the instantaneous value of load current, a mean value former for deriving as a mean value from said sensor means an actual load current value, and a regulating circuit which is connected to control said switch, and receives in use said actual load current value as one input, and a desired load current value as another input.

2. A circuit arrangement according to claim 1, further comprising a desired value setting circuit for providing said desired load current value in fixed phase relationship to the supply network.

3. A circuit arrangement according to claim 1 or 2, wherein said sensor means comprises a sensor circuit which in use is in series and/or in parallel with the load.

4. A circuit arrangement according to claim 1, 2 or 3, wherein the regulating circuit operates on the controllable switch via a drive circuit.

5. A circuit arrangement according to any preceding claim, wherein the regulating circuit is operative to produce a sine-shaped mean value of the current drawn from the supply network in use, by regulating the mark-space ratio of a control signal of the switch.

6. A circuit arrangement according to claim 5, characterised in that the mean value former, and/or the controllable switch and/or the drive circuit are connected via analog/digital or digital/analog converters, to the regulating circuit.

7. A circuit arrangement according to claim 5 or 6, wherein the regulating circuit comprises a difference former followed by an error amplifier and a conversion circuit which is connected to one output of the difference former-error amplifier arrangement, and which changes the mark-space ratio of the control signal of the switch, in dependence upon the respective size of the error processed by the error amplifier.

8. A circuit arrangement according to claim 5 or 6, wherein the regulating circuit comprises selection logic.

9. A circuit arrangement according to claim 5 or 6, wherein the regulating circuit comprises a difference former, at whose output a converting logic is connected, via an analog-digital converter, to change the mark-space ratio of the control signal of the switch depending on the respective size of the error produced by the difference former.

10. A circuit arrangement according to any one of claims 6 to 9 as appendant to claim 2, wherein the desired value setting circuit comprises a multiplier circuit, arranged to receive at one input a voltage proportional to the voltage of the supply network, arranged to receive at another input a pre-settable voltage which represents the desired power to be drawn by the load and arranged to output a sine-shaped desired value signal, in fixed phase relationship to the supply network.

11. A circuit arrangement according to any one of claims 5 to 9 as appendant to claim 2, wherein the desired value setting circuit comprises a fixed value store with a fixed program, which has at least one value table corresponding to the sine-shaped mean value of the current to be drawn from the supply network, and a phase-locked loop synchronised from the supply network and connected to one input of the fixed value store to transmit the contents of the store in fixed phase relationship with the network frequency, whereby there occurs an output of the fixed value store a numerical value changing with respect to its sine-shape in dependence on time, which is in fixed relationship to the network frequency.

12. A circuit arrangement according to claim 11, wherein the desired value setting circuit has a further input via which, depending on type and size of input signals, various value tables of the same type of structure can be read from the fixed value store.

13. A circuit arrangement according to claim 4 or to any one of claims 5 to 12 as appendant thereto, wherein the drive circuit is a potential-dividing drive circuit.

14. A circuit arrangement according to claim 13, wherein the drive circuit comprises a capacitor, a transformer, or an optocoupler with optical receivers in the form of photo-semi-conductor.

15. A circuit arrangement according to claim 13 or 14, wherein the controllable switch comprises a semi-conductor-four-layer structure such as a TRIAC, a thyristor, or the like.

16. A circuit arrangement according to any one of claims 1 to 14, wherein the controllable switch comprises a diode bridge, of which one diagonal lies in series with the load, and in the other diagonal, connected to the regulating circuit, a switching transistor is arranged.

17. A circuit arrangement according to claim 13, wherein the sensor means is arranged in series with the switching transistor in said other bridge diagonal.

18. A circuit arrangement according to any one of claims 1 to 14, wherein the sensor means is itself formed by the controllable switch.

19. A circuit arrangement according to claim 18, wherein said controllable switch comprises a field effect transistor.

20. A circuit arrangement according to claim 19, wherein said controllable switch comprises a V-FET, HEX-FET or the like.

21. A circuit arrangement according to any one of claims 13 to 20, wherein the regulating circuit comprises a sample-and-hold circuit, the mean value former, and a frequency- and/or pulse-width-regulated pulse generator, whose output signals are fed to the controllable switch in use as control signals.

22. A circuit arrangement according to claim 21, wherein the pulse generator comprises a cadence generator and a selecting logic whereby the period of the cadence generator is shorter than the shortest possible, usable switching-on duration of the controllable switch.

23. A circuit arrangement according to any one of claims 13 to 22, wherein the regulating circuit has external inputs and outputs to which external control transmitters and/or control receivers can be connected.

24. A circuit arrangement according to claim 23, wherein said external outputs are arranged to receive brightness controls signals, group control signals, or the like.

25. A circuit arrangement according to any preceding claim, adapted to regulate a discharge lamp as load.

26. A circuit arrangement for regulating the power drawn from a supply network, the arrangement being substantially as hereinbefore described with reference to the accompanying drawings.