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GB2067354A - Mounting for a s.c. device - Google Patents

Mounting for a s.c. device Download PDF

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Publication number
GB2067354A
GB2067354A GB8100012A GB8100012A GB2067354A GB 2067354 A GB2067354 A GB 2067354A GB 8100012 A GB8100012 A GB 8100012A GB 8100012 A GB8100012 A GB 8100012A GB 2067354 A GB2067354 A GB 2067354A
Authority
GB
United Kingdom
Prior art keywords
channel
packaging material
etching
substrate
device package
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
GB8100012A
Other versions
GB2067354B (en
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
AEI Semiconductors Ltd
Original Assignee
AEI Semiconductors Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by AEI Semiconductors Ltd filed Critical AEI Semiconductors Ltd
Priority to GB8100012A priority Critical patent/GB2067354B/en
Publication of GB2067354A publication Critical patent/GB2067354A/en
Application granted granted Critical
Publication of GB2067354B publication Critical patent/GB2067354B/en
Expired legal-status Critical Current

Links

Classifications

    • H10W76/138
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D8/00Diodes
    • H10D8/40Transit-time diodes, e.g. IMPATT or TRAPATT diodes 
    • H10W40/10
    • H10W72/00
    • H10W72/60

Landscapes

  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)

Abstract

A semiconductor device package comprising a semiconductor device (11), a mounting (9), in the form of a glass annulus secured to and surrounding the semiconductor device, and two conductive layers (13) contacting opposite sides of the semiconductor device and carried on the mounting. The mounting and conductive layers are formed integrally with the device, thus obviating the handling of individual semiconductor chips. The package is particularly applicable to microwave impatt diodes, but may also be applied to other semiconductor devices. A method of manufacturing the package is also disclosed. <IMAGE>

Description

SPECIFICATION Semiconductor devices and methods of manufacture thereof This invention relates to semiconductor devices.
The invention relates particularly to semiconductor devices for use as discrete components, especially devices having two electrodes, i.e. semiconductor diodes.
In the manufacture of diodes for use as discrete components, e.g. Impatt diodes, a semiconductor chip containing one or more diodes is conventionally soldered into a commercially available package so as to connect one of the electrodes. The other electrode of the diode, or a desired one of the diodes on the chip, is connected by wire bonding and top capping.
It will be appreciated that especially in the case of microwave diodes the dimensions of the diodes themselves are kept very small to keep their capacitances low and to ensure uniform performance and so the handling of the diodes and their chips is very difficult. As a result of this the packaging of the diodes must be performed manually, and is labour intensive, intricate, slow and therefore expensive.
It is an object of the present invention to provide a semiconductor device package which is easy to handle, and in the manufacture of which the above disadvantages may be overcome.
According to a first aspect of the present invention a semiconductor device package comprises: a semiconductor device; a region of packaging material secured to and surrounding the semiconductor device; and two conductive layers contacting opposite sides of the semiconductor device and carried on the packaging material.
Preferably said region of packaging material is substantially annular. Preferably the packaging material consists at least for the most part of glass.
Preferably the package is provided on one conductive layer with a heat sink. Preferably the heat sink comprises a copper plate.
In one particular embodiment of the invention the semiconductor device is an Impatt diode.
According to a second aspect of the present invention a method of manufacturing a semiconductor device package comprises the steps of: forming a semiconductor device in a first surface of a semiconductor substrate; forming a region of packaging material surrounding the device and extending into the substrate; etching said substrate to a desired depth from the side opposite said first surface, thereby exposing said packaging material; and depositing a conductive layer on the device and packaging material from each side of the device package.
Preferably the step of forming said region of packaging material comprises the steps of: etching a channel in said first surface of the substrate surrounding the device; and filling said channel with packaging material.
Preferably between the steps of etching said channel and filling said channel there is included the step of covering said channel with a layer of material which will protect the packaging material during the subsequent etching of the substrate.
Preferably the packaging material consists at least for the most part of glass and the step of filling said channel comprises the steps of: filling said channel with glass frit; and firing the frit.
Preferably the step of etching said channel comprises the steps of: etching a first channel surrounding the device and of a depth substantially equal to the total desired thickness of the device; and etching a second channel deeper than the first channel and surrounding and overlapping part of the first channel, so as to form a composite channel surrounding the device and having a shoulder at a depth substantially equal to the total desired thickness of the device.
Preferably the step of etching said substrate comprises the steps of: etching the substrate until the packaging material is exposed; applying a masking layer covering only those exposed areas of packaging material; etching the exposed substrate until the shoulder of the packaging material is exposed; and removing the masking layer.
Preferably the step of depositing a conductive layer comprises depositing layers of chromium, platinum and gold on the device and packaging material from each side of the device package.
Preferably the method further includes the step of forming a layer of heat conductive material on the device and packaging material on said first surface side of the device to act as a heatsink.
Preferably the method further includes the step of etching away semiconductor material surrounding the packaging material.
One semiconductor device package in accordance with the invention and its method of manufacture in accordance with the invention will now be described, by way of example only, with reference to the accompanying drawings, in which: Figures 1-11 illustrate in cross-sectional elevation stages in the manufacture of the package; and Figure 12 shows a cross-sectional elevation of the package.
The device is an Impatt diode for use at microwave frequencies.
Referring firstly to Figure 1, on a substrate 1 of n+ type semiconductor material a layer 2 of n type semiconductor material is epitaxially grown. A p+ diffusion is then performed to form a layer 3 of p+ type semiconductor material. Thus there is formed a three layer Impart diode semiconductor structure of p+, nand n+ type materials as shown in the Figure.
Referring now to Figure 2 an annular channel 4 is then etched, using a photo-resist mask 5, to define the area of the three layer structure of Figure 1 which will be used in the diode of the package. Typically, the channel 4 has an internal diameter of some 20-30 ,am. The depth of the channel 4 is substantially equal to the desired total thickness of the diode to be used in the package, typically 2-4ym.
Referring now to Figure 3, the mask 5 is removed and a wider and deeper annular channel 6 is etched, using a photo-resist mask 7. The channel 6 sur rounds and partly overlaps the channel 4, the base of which provides a shoulder 4a in the iarger channel.
The channel 6 has an external diameter of some 400-5001lm and a depth of some 100 clam.
Referring now to Figure 4, the mask 7 is removed and a layer 8 of silicon nitride some 0.2cm thick is deposited over the top of the structure to "line" the channel 6.
Referring now to Figure 5, the channel 6 is filled with glass frit. The structure is then fired to solidify the glass 9.
The substrate in the region of the channel 6 is then etched from below until the silicon nitride 8 in the channel 6 is exposed, as shown in Figure 6, the silicon nitride layer protecting the glass.
A photo-resist mask 10 is applied to the bottom of the structure so as to cover the exposed areas of silicon nitride and to leave exposed the areas of substrate adjacent the annular glass and silicon nitride region. The exposed areas of substrate are then etched away until the shoulder 4a in the channel 6 is exposed, as in Figure 7, leaving an Impatt diode semiconductor device 11 of the desired dimensions surrounded by and secured to an integ ral annulus of silicon nitride coated glass.
Referring now to Figure 8 the mask 10 is removed and the silicon nitride covering the top of the p+ layer of the diode is removed using a photo resist mask 12.
To form the electrodes of the package both sides of the structure are then metallised by depositing on both sides of the structure layers of chromium, platinum and gold respectively. These are shown collectively as single layers 13 in Figure 9.
In order to provide a heat sink a copper plate 14 is then formed on the top of the structure, using a photo-resist mask 15, as shown in Figure 10.
The mask 15 is then removed and a photo-resist mask 16 is applied to the bottom of the substrate so as to expose only the area around the outside of the structure. The metallisation and the semiconductor material around the structure are then removed, as shown in Figure 10.
The mask 16 is then removed, leaving the Impatt diode package attached to the rest of the substrate only by the layers of silicon nitride 8 and metallisation 13 on the top of the substrate. The device package may be detached from the rest of the substrate by being pushed out, breaking its attachment.
It will be appreciated that although the above description refers to the manufacture of a single Impatt diode package on a substrate, in practice several hundred may be manufactured simultaneously on the same substrate.
It will be appreciated that detachment of a diode package from the substrate and subsequent handling of the diode package may be performed simply and straightforwardly since the diode package has a diameter of approximately half a millimetre while the actual diode in the package has a diameter of only 20-30Fm.
Figure 12 shows a single Impatt diode package, manufactured as above, detached from its substrate.
It will be appreciated that once the diode package is removed from its substrate, no further packaging is required, although it may be desired to mount the diode package on a threaded stud as will be described below. It will also be appreciated such a diode package has only a small inductance (since the package contains no fine connecting wires, the electrodes, being directly connected to the relevant parts of the diode) while having a small capacitance.
As indicated above, in a particular application, e.g.
where the Impatt diode package is to be used in a microwave waveguide, it may be desired to mount the Impatt diode package on a threaded copper stud (not shown) to be screwed into a suitably threaded opening in the waveguide (also not shown). The package of Figure 12 may readily be thermocompression bonded at the side provided with the copper heat sink to the head of such a stud. If desired a diamond heat sink (not shown) may be interposed between the device package and the stud.

Claims (19)

1. A semiconductor device package comprising: a semiconductor device; a region of packaging material secured to and surrounding said semiconductor device; and two conductive layers contacting opposite sides of said semiconductor device and carried on said packaging material.
2. A device package according to claim 1 in which said region of packaging material is substantially annular.
3. A device package according to claim 1 in which said region of packaging material consists for the most part of glass.
4. A device package according to Claim 1 which is provided with a heat sink on one of the said conductive layers.
5. A device package according to claim 4 in which the said heat sink comprises a copper plate.
6. A device package according to claim 5 in which the said heat sink is bonded to a threaded copper stud.
7. A device package according to claim 6 in which a diamond heat sink is interposed between the said copper heat sink and the said stud.
8. A device package according to anyone of the preceding claims in which the said semiconductor device is an impatt diode.
9. A device package substantially as hereinbefore described with reference to the accompanying drawings.
10. A method of manufacturing a semiconductor device package according to claim 1 comprising the steps of: forming a semiconductor device in a first surface of a semiconductor substrate; forming a region of packaging material surrounding said device and extending into said substrate; etching said substrate to a desired depth from the side opposite said first surface, thereby exposing said packaging material; and depositing a conductive layer on the device and packaging material from each side of the device package.
11. A method of manufacture according to claim 10 in which the step of forming said region of packaging material comprises the steps of: etching a channel in said first surface of the substrate surrounding the device; and filling said channel with packaging material.
12. A method of manufacture according to claim 11 in which between the steps of etching said channel and filling said channel there is included the step of covering said channel with a layer of material which will protect the packaging material during the subsequent etching of the substrate.
13. A method of manufacture according to claim 11 or claim 12 in which the packaging material consists at least for the most part of glass, and the step of filling said channel comprises the steps of: filling said channel with glass frit; and firing said frit.
14. A method of manufacture according to any one of claims 11, 12 and 13 in which the step of etching said channel comprises the steps of: etching a first channel surrounding said device and of a depth substantially equal to the total desired thickness of the device; and etching a second channel deeper than said first channel, and surrounding and overlapping part of said first channel, so as to form a composite channel surrounding said device and having a shoulder at a depth substantially equal to the total desired thickness of the device.
15. A method of manufacture according to any one of claims 10 to 14 in which the step of etching said substrate comprises the steps of: etching the substrate until the packaging material is exposed; applying a masking layer covering onlythoseex- posed areas of packaging material; etching the exposed substrate until the shoulder of the packaging material is exposed; and removing the masking layer.
16. A method of manufacture according to any one of claims 10 to 15 in which the step of depositing the conductive layers comprises depositing individual layers of different metals to form a composite layer.
17. A method of manufacture according to any one of claims 10 to 16 further including the step of etching away semiconductor material surrounding the packaging to allowthe package to be detached from the rest of the substrate.
18. A method of manufacture according to any one of claims 10 to 17 in which a plurality of device packages are manufactured simultaneously on the same substrate.
19. A method of manufacture of a device package substantially as hereinbefore described with reference to the drawings.
GB8100012A 1980-01-09 1981-01-02 Mounting for a sc device Expired GB2067354B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
GB8100012A GB2067354B (en) 1980-01-09 1981-01-02 Mounting for a sc device

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
GB8000678 1980-01-09
GB8100012A GB2067354B (en) 1980-01-09 1981-01-02 Mounting for a sc device

Publications (2)

Publication Number Publication Date
GB2067354A true GB2067354A (en) 1981-07-22
GB2067354B GB2067354B (en) 1984-04-18

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Family Applications (1)

Application Number Title Priority Date Filing Date
GB8100012A Expired GB2067354B (en) 1980-01-09 1981-01-02 Mounting for a sc device

Country Status (1)

Country Link
GB (1) GB2067354B (en)

Cited By (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2517884A1 (en) * 1981-12-09 1983-06-10 Thomson Csf SEMICONDUCTOR DEVICE WITH LOW PARASITE CAPACITY PROVIDED WITH EXTERNAL CONNECTIONS TAKEN BY MEANS OF BEAMS AND METHOD OF MANUFACTURING SUCH A DEVICE
EP0081414A1 (en) * 1981-12-09 1983-06-15 Thomson-Csf Semiconductor device having a low parasitive capacitance with beam-lead-type external connectors
FR2520931A1 (en) * 1982-02-02 1983-08-05 Thomson Csf COLLECTIVE METHOD OF MANUFACTURING MICROFREQUENCY DIODES WITH INCORPORATED ENCAPSULATION AND DIODES OBTAINED THEREBY
FR2538616A1 (en) * 1982-12-28 1984-06-29 Thomson Csf Method of collective manufacture of microwave frequency diodes with incorporated encapsulation and diodes thus obtained.
EP0214414A1 (en) * 1985-08-31 1987-03-18 Licentia Patent-Verwaltungs-GmbH Method of producing a semiconductor body contacted on both sides
EP0293630A1 (en) * 1987-06-04 1988-12-07 Licentia Patent-Verwaltungs-GmbH Semiconductor body with heatsink
FR2628569A1 (en) * 1988-03-08 1989-09-15 Thomson Hybrides Microondes INTEGRATED MICROWAVE CIRCUIT AND MANUFACTURING METHOD THEREOF
US5122856A (en) * 1987-11-13 1992-06-16 Nissan Motor Co., Ltd. Semiconductor device
DE4209983A1 (en) * 1992-03-27 1993-09-30 Daimler Benz Ag Semiconductor component mfr. esp. IMPATT diode prodn. - producing component, housing and connection contacts in integrated construction from and on semiconductor substrate
US5403729A (en) * 1992-05-27 1995-04-04 Micro Technology Partners Fabricating a semiconductor with an insulative coating
US5455187A (en) * 1988-11-21 1995-10-03 Micro Technology Partners Method of making a semiconductor device with a metallic layer coupled to a lower region of a substrate and metallic layer coupled to a lower region of a semiconductor device
US5557149A (en) * 1994-05-11 1996-09-17 Chipscale, Inc. Semiconductor fabrication with contact processing for wrap-around flange interface
US5592022A (en) * 1992-05-27 1997-01-07 Chipscale, Inc. Fabricating a semiconductor with an insulative coating
US6121119A (en) * 1994-06-09 2000-09-19 Chipscale, Inc. Resistor fabrication

Cited By (21)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0081423A1 (en) * 1981-12-09 1983-06-15 Thomson-Csf Semi-conductor device with a low parasitic capacitance having beam-lead type external connectors, and process for the production of that device
EP0081414A1 (en) * 1981-12-09 1983-06-15 Thomson-Csf Semiconductor device having a low parasitive capacitance with beam-lead-type external connectors
FR2517884A1 (en) * 1981-12-09 1983-06-10 Thomson Csf SEMICONDUCTOR DEVICE WITH LOW PARASITE CAPACITY PROVIDED WITH EXTERNAL CONNECTIONS TAKEN BY MEANS OF BEAMS AND METHOD OF MANUFACTURING SUCH A DEVICE
FR2520931A1 (en) * 1982-02-02 1983-08-05 Thomson Csf COLLECTIVE METHOD OF MANUFACTURING MICROFREQUENCY DIODES WITH INCORPORATED ENCAPSULATION AND DIODES OBTAINED THEREBY
EP0085607A3 (en) * 1982-02-02 1983-08-24 Thomson-Csf Process for the simultaneous production of hyperfrequency diodes having an incorported encapsulation and diodes made by said process
FR2538616A1 (en) * 1982-12-28 1984-06-29 Thomson Csf Method of collective manufacture of microwave frequency diodes with incorporated encapsulation and diodes thus obtained.
EP0214414A1 (en) * 1985-08-31 1987-03-18 Licentia Patent-Verwaltungs-GmbH Method of producing a semiconductor body contacted on both sides
US4910583A (en) * 1987-06-04 1990-03-20 Licentia Patent-Verwaltungs Gmbh Semiconductor body with heat sink
EP0293630A1 (en) * 1987-06-04 1988-12-07 Licentia Patent-Verwaltungs-GmbH Semiconductor body with heatsink
US5122856A (en) * 1987-11-13 1992-06-16 Nissan Motor Co., Ltd. Semiconductor device
FR2628569A1 (en) * 1988-03-08 1989-09-15 Thomson Hybrides Microondes INTEGRATED MICROWAVE CIRCUIT AND MANUFACTURING METHOD THEREOF
US5455187A (en) * 1988-11-21 1995-10-03 Micro Technology Partners Method of making a semiconductor device with a metallic layer coupled to a lower region of a substrate and metallic layer coupled to a lower region of a semiconductor device
US5789817A (en) * 1988-11-21 1998-08-04 Chipscale, Inc. Electrical apparatus with a metallic layer coupled to a lower region of a substrate and a metallic layer coupled to a lower region of a semiconductor device
DE4209983A1 (en) * 1992-03-27 1993-09-30 Daimler Benz Ag Semiconductor component mfr. esp. IMPATT diode prodn. - producing component, housing and connection contacts in integrated construction from and on semiconductor substrate
US5403729A (en) * 1992-05-27 1995-04-04 Micro Technology Partners Fabricating a semiconductor with an insulative coating
US5441898A (en) * 1992-05-27 1995-08-15 Micro Technology Partners Fabricating a semiconductor with an insulative coating
US5444009A (en) * 1992-05-27 1995-08-22 Micro Technology Partners Fabricating a semiconductor with an insulative coating
US5592022A (en) * 1992-05-27 1997-01-07 Chipscale, Inc. Fabricating a semiconductor with an insulative coating
US5557149A (en) * 1994-05-11 1996-09-17 Chipscale, Inc. Semiconductor fabrication with contact processing for wrap-around flange interface
US5656547A (en) * 1994-05-11 1997-08-12 Chipscale, Inc. Method for making a leadless surface mounted device with wrap-around flange interface contacts
US6121119A (en) * 1994-06-09 2000-09-19 Chipscale, Inc. Resistor fabrication

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Publication number Publication date
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PCNP Patent ceased through non-payment of renewal fee