GB1581917A - Integrated circuit for electronic timepiece - Google Patents

Abstract

The integrated circuit (22) is provided with a waveform converter (24) and a state scanning circuit (26, 28), as a result of which the drive pulse width for the stepping motor (20) can be extended when the temperature or battery voltage falls below a predetermined value. A terminal (29) is provided at which an external control signal can optionally be applied so that different stepping motor designs can be driven by an integrated standard circuit. <IMAGE>

Description

(54) INTEGRATED CIRCUIT FOR ELECTRONIC TIMEPIECE (71) We, CITIZEN WATCH COMPANY LIMITED, a corporation organized under the laws of Japan, of No. 1-1, 2-chome, Nishishinjuku, Shinjuku-ku, Tokyo, Japan, do hereby declare the invention, for which we pray that a patent may be granted to us, and the method by which it is to be performed, to be particularly described in and by the following statement:- This invention relates to electronic timepieces, and in particular to a method of controlling the waveform of a signal applied to drive a time indication means.

Stepping motors are frequently utilized as a time display means in electronic timepieces. Such a motor is rotated in a stepwise fashion by means of drive pulses of alternating polarity, thereby rotating time indicating hands. These drive pulses are of fixed period and pulse width, and are generated by a drive circuit to which a standard time signal is applied. This signal is generally produced by a waveform shaping circuit to which the output signal from a frequency divider circuit is applied, the input signal for the frequency divider circuit being generated by an oscillator circuit whose frequency is usually determined by a quartz crystal vibrator.

Silver oxide batteries are generally used as the power source in such a timepiece.

Such a battery displays a substantially constant and stable voltage over a long period of operation, at normal temperatures. However, these bafteries mainly utilize NaOH as the electrolyte, and so the internal resistance increases significantly at low ambient temperatures. Thus, when the battery has to drive the relatively heavy load of the stepping motor, its output voltage will drop. If the pulse width of the stepping motor drive pulses is held constant, the energy delivered to the stepping motor during a drive pulse may be insufficient, in this case. Thus, operation of the electronic timepiece may be unsatisfactory at low ambient temperatures.

To counteract this problem, a method which is frequently adopted is to increase the width of the drive pulses applied to the motor, beyond that which is required for operation at a normal ambient temperature.

This method however results in power being wasted during operation at normal temperature. Thus, to ensure a sufficiently long battery life, a battery of increased size may have to be installed. Increased space will therefore be required to accommodate the battery, so that a timepiece of desired size and thickness cannot be produced.

Another problem which arises in the manufacture of electronic timepieces of the stepping motor driven type is that of producing a standard integrated circuit which can be used for various timepiece configuration. Such an integrated circuit should, for example, be capable of driving a variety of types of stepping motor having various drive current requirements, and of providing drive pulses of increased width when required for driving a calendar display, for example. If such a standard integrated circuit is designed to provide sufficient current to drive the maximum load which can be anticipated, then battery power will be wasted when the integrated circuit is used to drive other types of load.

In accordance with the present invention, there is provided an integrated circuit for an electronic timepiece having a power source and a stepping motor arranged to drive a time indicating mechanism to provide a display of time information, comprising: an oscillator circuit providing a high frequency signal; a frequency divider providing a plurality of low frequency signals in response to said high frequency signal; a waveform converter including an input control terminal, output pulse producing means responsive to said plurality of low frequency signals to provide output pulses and a switching circuit responsive to a control signal applied to said input control terminal for controlling the supply of said plurality of low frequency signals to said output pulse producing means to thereby control said output pulses; a drive circuit responsive to said output pulses to provide drive pulses of alternating polarity for driving said stepping motor; and means for coupling the control terminal of said waveform converter to one potential side of said power source to thereby apply said control signal to said input control terminal.

Preferably, the integrated circuit comprises a state detection circuit to produce an output signal in dependence on a state of the timepiece, said output signal being applied to the control terminal of said waveform converter.

Preferably, said state detection circuit comprises a voltage detection circuit adapted to detect a battery voltage, and a temperature detection circuit adapted to detect ambient operating temperature of the timepiece.

Tt is preferably arranged that when the ambient temperature of the electronic timepiece falls below a predetermined level, the width of the drive pulses applied to the stepping motor are increased, thereby delivering additional energy to the motor to compensate for the increase in battery internal resistance caused by the fall in temperature. Thus, at normal temperatures, only drive pulses having the pulse width actually required are generated. There is therefore no waste of battery power due to application of drive pulses of excessive duration, and so it is possible to utilize a battery of smaller capacity in the electronic timepiece, as compared with a timepiece of conventional design.

Coupling the control terminal to the power source causes the pulse width of the drive pulses applied to the stepping motor to be increased. Thus, if it is necessary to use this integrated circuit in a timepiece having a stepping motor which requires a relatively large level of drive current, the control terminal is coupled to the battery at the time of assembly of the timepiece.

In this way, a standard integrated circuit can be used for various types of timepiece having various types of stepping motor.

Preferably, if a fall of the level of the battery voltage below a certain predetermined level is detected, the width of the stepping motor drive pulses is increased in the same way as when a low ambient temperature is detected. Also, the sequence of stepping motor drive pulses can be altered in this case, to provide a warning to the timepiece user that the battery voltage is excessively low.

An exemplary embodiment of the present invention will now be described with reference to the accompanying drawings, in which: Fig. 1 is a block diagram of a conventional electronic timepiece employing a stepping motor; Fig. 2 is a block diagram of an electronic timepiece incorporating an integrated circuit and according to the present invention; Fig. 3 is a general circuit diagram of a waveform converter circuit within the integrated circuit shown in Fig. 2; and Fig. 4 is a waveform diagram illustrating the operation of the waveform converter circuit shown in Fig. 3.

Referring now to the diagrams, Fig. 1 shows the general arrangement of a conventional electronic timepiece employing a stepping motor. The electronic circuitry of the timepiece is provided upon an integrated circuit 4, powered by a battery 27. A high frequency signal is produced by an oscillator circuit 10, whose frequency is determined by a quartz crystal vibrator element 12, connected externally to the integrated circuit 4. The output from oscillator circuit 10 is applied to a frequency divider 14 followed by a waveform shaping circuit 16, to produce a standard timekeeping signal, generally at a frequency of 1 Hz. This standard timekeeping signal is applied to a drive circuit 18, after being converted into a train of pulses of alternating polarity.The drive pulses from drive circuit 18 are then applied to a stepping motor 20, to rotate the time indicating hands of the electronic timepiece in stepwise fashion at a constant rate.

Referring now to Fig. 2, the general arrangement of an embodiment of the present invention is shown therein in block diagram form. Jn this diagram, oscillator circuit 10, frequency divider circuit 14, drive circuit 18 and stepping motor 20 perform identical functions to those described for the arrangement in Fig. 1 above. The integrated circuit of the timepiece, indicated by numeral 22, also contains a waveform converter circuit 24, which controls the waveform of the input to drive circuit 18.

Waveform converter 24 is controlled by output signals from a battery voltage detection circuit 28, and a temperature detection circuit 26, applied through an OR gate 30.

Waveform converter 24 can also be controlled by connection of the high potential side of battery 27 to an external drive pulse control terminal 29, which is also connected to an input of OR gate 30. Temperature detection circuit 26 and battery voltage detection circuit 28 function as state detection circuits. If the ambient operating temperature of the electronic timepiece is above a certain predetermined temperature, then output Qt remains at the "0" logic level.

If the temperature falls below this predetermined level, then output Qt of temperature detection circuit 26 goes to the '1" logic level. This output Qt is applied to waveform converter circuit 24 through OR gate 30.

Similarly, if the battery voltage of the electronic timepiece is above a certain predetermined level, then output Qb of battery voltage detection circuit 28 remains at the "0" logic level. If the battery voltage should fall below this level, then output Qb goes to the "1" logic level. This input is also applied to waveform converter circuit 24 through OR gate 30.

If either output Qt of temperature detection circuit 26 or output 28 of battery voltage detection circuit 28 goes to the "1" logic level, then the pulse width of the output signal from waveform converter 24 is increased, and hence the width of the drive pulses applied to stepping motor 20 is also increased. If the high potential side of battery 8 is connected to terminal 29, then since in this case a "1" level input is permanently applied to waveform converter 24 through OR gate 30, drive pulses of increased pulse width are applied to stepping motor 20 continuously.

The output signal from temperature detection circuit 26 is also applied to oscillator circuit 10. This is used to modify the operation of oscillator circuit 10 when signal Qt goes to the '1" level, in such a way as to prevent instability of oscillation at low ambient operating temperature.

The operation of waveform converter circuit 24 will now be described, with reference to Fig. 3 and Fig. 4.

Fig. 3 is a general circuit diagram of waveform converter circuit 24 and drive circuit 18. Inputs FF8 to FF16 are the outputs of flip-flops within frequency divider circuit 14, and have the timing relationships shown in Fig. 4. It can be seen that FF8 is the highest frequency input and that FF16 is the lowest frequency. AND gate 36 serves as a pulse generator, whereby pulses of a desired waveform can be produced by suitably enabling or inhibiting inputs FF8 to FF16 applied to AND gate 36. The input of signals FF16, FF10 and FF8 to AND gate 36 are controlled by the logic states of inputs Bd and Cd. Input control terminal Bd is identical to output Qb from battery voltage detection circuit 28 shown in Fig. 2.

Input control terminal Cd is the output from OR gate 30.

Considering first the timepiece state in which the ambient temperature and battery voltage are both above the predetermined levels, so that outputs Qt and Qb, and hence inputs Cd and Bd, are both at the "0" logic level, the waveform of the output from AND gate 36 is as shown at (a) in the waveform diagram of Fig. 4. In this condition, NAND gate 26 is in the off state, so that its output is held at the "1" logic level. Also, since both inverter 28 and inverter 32 are producing "1" logic level outputs, waveform FF10 appears at the output of NAND gate 30 and the waveform of FF8 appears at the output of NAND gate 34.

Thus, all of the input signals FF8 to FF15 are applied to AND gate 36, and so it generates an output as shown in (a) of Fig. 4. This has the pulse width of FF8.

which is one half of the period of FF8, and has the same period as FF15, which is one second.

If now the control terminal 29 is connected to the high potential side of the battery 27, or the temperature falls below the predetermined level, then input Cd will go to the "1" logic level, while input Bd will remain at the "0" logic level. Thus, the output of inverter 32 will go to the "0" level, so that NAND gate 34 is inhibited, and it is held at the "1" level. In this case, only inputs FF9 to FF15 are applied to AND gate 36, so that the output pulses generated from AND gate 36 are as shown at (b) in Fig. 4. These pulses have a pulse width which is one half of the period of signal FF9, and a period identical to that of FF15 signal, i.e. one second.

If the temperature falls below the predetermined level, and also the battery voltage falls below the predetermined level, then both input Bd and input Cd to waveform converter circuit 24 will go to the "1" logic level. In this case, NAND gate 26 is enabled, while NAND gates 30 and 34 are inhibited. Thus, only signals FF9 and FF11 to FF16 are applied to AND gate 36, so that the output from AND gate 36 is as shown at (c) in Fig. 4. This output consists of pairs of pulses with a pulse width equal to one half of the period of signal FF9 and a period between each pair which is identical to that of FF16, i.e. 2 seconds.

The output from AND gate 36 is applied to a combination of a flip-flop and two NAND gates 40 and 42, which serves to generate a train of pulses of alternating polarity. These are applied to stepping motor 20 through drive circuit 18 as shown in Fig. 3.

From the above, it is apparent that the pulse width of the drive pulses applied to stepping motor 20 can be increased by a factor of two (i.e. from the pulse width of signal FF8 to that of FF9) in accordance with detection of the state of the electronic timepiece.

Although the embodiment of the present invention described above incorporates a waveform converter circuit which produces an increase in pulse width of the drive signal by a factor of two, it is possible to produce a change in pulse width by various other factors, by utilizing suitable combinations of output signals from frequency divider circuit 14 in a similar manner to the use of signals FF8 to FF16 shown in Fig. 3.

WHAT WE CLAIM IS: 1. An integrated circuit for an electronic timepiece having a power source and a stepping motor arranged to drive a time indicating mechanism to provide a display of time information, comprising: an oscillator circuit providing a high fre quency signal; a frequency divider providing a plurality of low frequency signals in response to said high frequency signal; a waveform converter including an input control terminal, output pulse producing means responsive to said plurality of low frequency signals to provide output pulses and a switching circuit responsive to a control signal applied to said input control terminal for controlling the supply of said plurality of low frequency signals to said output pulse producing means to thereby control said output pulses; a drive circuit responsive to said output pulses to provide drive pulses of alter nating polarity for driving said stepping motor; and means for coupling the control terminal of said waveform converter to one potential side of said power source to thereby apply said control signal to said input control terminal.

2. An integrated circuit according to claim 1, further comprising a state detection circuit to produce an output signal in dependence on a state of the timepiece, said output signal being applied to the control terminal of said waveform converter.

3. An integrated circuit according to claim 2, in which said state detection circuit comprises a voltage detection circuit adapted to detect a battery voltage.

4. An integrated circuit according to claim 2, in which said state detection circuit comprises a temperature detection circuit adapted to detect ambient operating temperature of the timepiece.

5. An integrated circuit according to any of claims 1 to 4, wherein said control signal acts to select one of at least two combinations of said low frequency signals from said frequency divider within said waveform converter.

6. An integrated circuit substantially as hereinbefore described with reference to Figs. 2 to 4 of the accompanying drawings.

**WARNING** end of DESC field may overlap start of CLMS **.

Claims (6)

**WARNING** start of CLMS field may overlap end of DESC **. produce a change in pulse width by various other factors, by utilizing suitable combinations of output signals from frequency divider circuit 14 in a similar manner to the use of signals FF8 to FF16 shown in Fig. 3. WHAT WE CLAIM IS:

1. An integrated circuit for an electronic timepiece having a power source and a stepping motor arranged to drive a time indicating mechanism to provide a display of time information, comprising: an oscillator circuit providing a high fre quency signal; a frequency divider providing a plurality of low frequency signals in response to said high frequency signal; a waveform converter including an input control terminal, output pulse producing means responsive to said plurality of low frequency signals to provide output pulses and a switching circuit responsive to a control signal applied to said input control terminal for controlling the supply of said plurality of low frequency signals to said output pulse producing means to thereby control said output pulses; a drive circuit responsive to said output pulses to provide drive pulses of alter nating polarity for driving said stepping motor; and means for coupling the control terminal of said waveform converter to one potential side of said power source to thereby apply said control signal to said input control terminal.

2. An integrated circuit according to claim 1, further comprising a state detection circuit to produce an output signal in dependence on a state of the timepiece, said output signal being applied to the control terminal of said waveform converter.

3. An integrated circuit according to claim 2, in which said state detection circuit comprises a voltage detection circuit adapted to detect a battery voltage.

4. An integrated circuit according to claim 2, in which said state detection circuit comprises a temperature detection circuit adapted to detect ambient operating temperature of the timepiece.

5. An integrated circuit according to any of claims 1 to 4, wherein said control signal acts to select one of at least two combinations of said low frequency signals from said frequency divider within said waveform converter.

6. An integrated circuit substantially as hereinbefore described with reference to Figs. 2 to 4 of the accompanying drawings.