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GB1419027A - Method and apparatus for manufacturing multi-layered electrical circuit - Google Patents

Method and apparatus for manufacturing multi-layered electrical circuit

Info

Publication number
GB1419027A
GB1419027A GB991173A GB991173A GB1419027A GB 1419027 A GB1419027 A GB 1419027A GB 991173 A GB991173 A GB 991173A GB 991173 A GB991173 A GB 991173A GB 1419027 A GB1419027 A GB 1419027A
Authority
GB
United Kingdom
Prior art keywords
void
adhesive
film
depth
exposed
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
GB991173A
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Buckbee Mears Co
Original Assignee
Buckbee Mears Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Buckbee Mears Co filed Critical Buckbee Mears Co
Publication of GB1419027A publication Critical patent/GB1419027A/en
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/22—Secondary treatment of printed circuits
    • H05K3/28—Applying non-metallic protective coatings
    • H05K3/281—Applying non-metallic protective coatings by means of a preformed insulating foil
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/03—Use of materials for the substrate
    • H05K1/0393—Flexible materials
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/06—Lamination
    • H05K2203/063—Lamination of preperforated insulating layer
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/06—Lamination
    • H05K2203/068—Features of the lamination press or of the lamination process, e.g. using special separator sheets
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/30—Details of processes not otherwise provided for in H05K2203/01 - H05K2203/17
    • H05K2203/308—Sacrificial means, e.g. for temporarily filling a space for making a via or a cavity or for making rigid-flexible PCBs
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/38—Improvement of the adhesion between the insulating substrate and the metal
    • H05K3/386—Improvement of the adhesion between the insulating substrate and the metal by the use of an organic polymeric bonding layer, e.g. adhesive

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Adhesives Or Adhesive Processes (AREA)

Abstract

1419027 Laminates BUCKBEE-MEARS CO 1 March 1973 [17 July 1972] 9911/73 Heading B5N [Also in Division H1] In the production of a multilayer printed circuit board contact pads 14 of a conductive track are exposed through voids in an overlying insulating layer 13, the pads being protected, from the inflow of adhesive during bonding of the multiple layers with an adhesive 12, by a pressure deformable film 21 which flows into the void and covers the exposed pad area. The bonding takes place under pressure using platens 19, 20 heated by heating elements. Typical bonding temperatures and pressures are 250‹ to 350‹ F. and 50 to 500 p.s.i. The film 21 may be of polyethylene, polypropylene or silicone rubber. The adhesive may be e polyester, or epoxy or phenolic adhesives. To ensure protection of the exposed pad area it is desirable that the thickness of the film 21 be at least twice the depth of the void, and the diameter of the void be greater than its depth.
GB991173A 1972-07-17 1973-03-01 Method and apparatus for manufacturing multi-layered electrical circuit Expired GB1419027A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US27219872A 1972-07-17 1972-07-17

Publications (1)

Publication Number Publication Date
GB1419027A true GB1419027A (en) 1975-12-24

Family

ID=23038817

Family Applications (1)

Application Number Title Priority Date Filing Date
GB991173A Expired GB1419027A (en) 1972-07-17 1973-03-01 Method and apparatus for manufacturing multi-layered electrical circuit

Country Status (8)

Country Link
JP (1) JPS4951561A (en)
BE (1) BE797750A (en)
CA (1) CA990413A (en)
DE (1) DE2333445A1 (en)
FR (1) FR2193301B1 (en)
GB (1) GB1419027A (en)
IT (1) IT991068B (en)
NL (1) NL7304482A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2143174A (en) * 1983-06-24 1985-02-06 Didier Werke Ag Composite sheet for lining liquid containers

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP6350758B2 (en) * 2015-08-10 2018-07-04 株式会社村田製作所 Resin multilayer substrate and manufacturing method thereof
CN107529294A (en) * 2017-09-27 2017-12-29 生益电子股份有限公司 A kind of manufacturing method of PCB and PCB

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2143174A (en) * 1983-06-24 1985-02-06 Didier Werke Ag Composite sheet for lining liquid containers

Also Published As

Publication number Publication date
DE2333445A1 (en) 1974-01-31
CA990413A (en) 1976-06-01
JPS4951561A (en) 1974-05-18
FR2193301B1 (en) 1977-02-04
FR2193301A1 (en) 1974-02-15
NL7304482A (en) 1974-01-21
BE797750A (en) 1973-10-04
IT991068B (en) 1975-07-30

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Legal Events

Date Code Title Description
PS Patent sealed
PCNP Patent ceased through non-payment of renewal fee