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GB1448041A - Data processing equipment - Google Patents

Data processing equipment

Info

Publication number
GB1448041A
GB1448041A GB2306774A GB2306774A GB1448041A GB 1448041 A GB1448041 A GB 1448041A GB 2306774 A GB2306774 A GB 2306774A GB 2306774 A GB2306774 A GB 2306774A GB 1448041 A GB1448041 A GB 1448041A
Authority
GB
United Kingdom
Prior art keywords
input
staticizers
output
random access
access memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
GB2306774A
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STC PLC
Original Assignee
Standard Telephone and Cables PLC
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Standard Telephone and Cables PLC filed Critical Standard Telephone and Cables PLC
Priority to GB2306774A priority Critical patent/GB1448041A/en
Priority to ZA00752215A priority patent/ZA752215B/en
Priority to AU81051/75A priority patent/AU8105175A/en
Priority to IN937/CAL/75A priority patent/IN141971B/en
Priority to DE19752521900 priority patent/DE2521900A1/en
Priority to NL7506005A priority patent/NL7506005A/en
Priority to FR7515921A priority patent/FR2272441B1/fr
Priority to IE1160/75A priority patent/IE41472B1/en
Priority to BE2054355A priority patent/BE829386A/en
Priority to JP50062442A priority patent/JPS5124844A/ja
Priority to ES437893A priority patent/ES437893A1/en
Publication of GB1448041A publication Critical patent/GB1448041A/en
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
    • G06F9/30029—Logical and Boolean instructions, e.g. XOR, NOT
    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
    • G05B19/00—Programme-control systems
    • G05B19/02—Programme-control systems electric
    • G05B19/04—Programme control other than numerical control, i.e. in sequence controllers or logic controllers
    • G05B19/05—Programmable logic controllers, e.g. simulating logic interconnections of signals according to ladder diagrams or function charts
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
    • G06F9/30018—Bit or string instructions
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/44—Arrangements for executing specific programs
    • G06F9/448—Execution paradigms, e.g. implementations of programming paradigms
    • G06F9/4482—Procedural
    • G06F9/4484—Executing subprograms
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04Q—SELECTING
    • H04Q3/00—Selecting arrangements
    • H04Q3/42—Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker
    • H04Q3/54—Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker in which the logic circuitry controlling the exchange is centralised
    • H04Q3/545—Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker in which the logic circuitry controlling the exchange is centralised using a stored programme
    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
    • G05B2219/00—Program-control systems
    • G05B2219/10—Plc systems
    • G05B2219/11—Plc I-O input output
    • G05B2219/1127—Selector for I-O, multiplex for I-O
    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
    • G05B2219/00—Program-control systems
    • G05B2219/10—Plc systems
    • G05B2219/12—Plc mp multi processor system
    • G05B2219/1204—Multiprocessing, several plc's, distributed logic control
    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
    • G05B2219/00—Program-control systems
    • G05B2219/10—Plc systems
    • G05B2219/15—Plc structure of the system
    • G05B2219/15049—Timer, counter, clock-calendar, flip-flop as peripheral
    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
    • G05B2219/00—Program-control systems
    • G05B2219/10—Plc systems
    • G05B2219/15—Plc structure of the system
    • G05B2219/15055—FIFO

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Automation & Control Theory (AREA)
  • Executing Machine-Instructions (AREA)
  • Debugging And Monitoring (AREA)
  • Storage Device Security (AREA)
  • Exchange Systems With Centralized Control (AREA)
  • Complex Calculations (AREA)

Abstract

1448041 Data processor STANDARD TELEPHONES & CABLES Ltd 23 May 1974 23067/74 Heading G4A A data processor includes inputs connected to respective input staticizers, outputs connected to respective output staticizers, a random access memory arranged to store intermediate processing results, an input arranged to receive instructions having function and address parts, and a logic unit arranged to process one bit operands from the input staticizers and/or the random access memory to produce one bit results which are directed to an output staticizer or the random access memory, the operand source and result destinations being selected by the address parts of instructions whose function parts determine the operations to be performed, e.g. read, write, AND, OR. The processor may be used to interface controlled equipment, e.g. a telephone exchange, and a controlling digital computer and may be formed on a single integrated circuit chip. One or more of the processors may be supplied with instructions from an external read only program memory. Several such program memories storing respective programs may be provided, a selected one being supplied with clock pulses. In a first embodiment the input staticizers, output staticizers, and the random access memory are connected, together with a number of delay units formed by shift registers to internal input and output buses. All the units, input staticizer delays &c., together with various clock pulse sources are addressed by the address part of an instruction and the buses are connected to a push down stack. The processor performs AND and OR operations between the contents of the top two stack locations and loads the result into the top location. The result may also be transferred to any unit, e.g. output staticizer, addressed by the current instruction, or may be retained in the stack. In a second embodiment, Fig. 3, the random access memory RAM, delays DEL, and input and output staticizers IS, OS are connected to the logic unit via selectors WAS, RAS activated by the address part of an instruction ADO, the logic unit being controlled by the function part FO. The logic unit, Fig. 4, consists of two NAND gates N1, N2, each formed by an AND gate and a bi-stable, which NANDs successive operands. The instruction format allows the outputs of both NANDs to be connected to the input of the other NAND or to addressed units in the processor, output staticizers &c., and the Specification gives details of the way in which Boolean functions can be evaluated. Additional external random access memories may be coupled to the processor.
GB2306774A 1974-05-23 1974-05-23 Data processing equipment Expired GB1448041A (en)

Priority Applications (11)

Application Number Priority Date Filing Date Title
GB2306774A GB1448041A (en) 1974-05-23 1974-05-23 Data processing equipment
ZA00752215A ZA752215B (en) 1974-05-23 1975-04-08 Improvements in or relating to calculating equipment
AU81051/75A AU8105175A (en) 1974-05-23 1975-05-12 Calculating equipment
IN937/CAL/75A IN141971B (en) 1974-05-23 1975-05-12
DE19752521900 DE2521900A1 (en) 1974-05-23 1975-05-16 ELECTRONIC CALCULATOR
NL7506005A NL7506005A (en) 1974-05-23 1975-05-22 ELECTRICAL DATA PROCESSING EQUIPMENT.
FR7515921A FR2272441B1 (en) 1974-05-23 1975-05-22
IE1160/75A IE41472B1 (en) 1974-05-23 1975-05-23 Improvements in or relating to data processing equipment
BE2054355A BE829386A (en) 1974-05-23 1975-05-23 ELECTRICAL DATA PROCESSING EQUIPMENT
JP50062442A JPS5124844A (en) 1974-05-23 1975-05-23
ES437893A ES437893A1 (en) 1974-05-23 1975-05-23 Data processing equipment

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GB2306774A GB1448041A (en) 1974-05-23 1974-05-23 Data processing equipment

Publications (1)

Publication Number Publication Date
GB1448041A true GB1448041A (en) 1976-09-02

Family

ID=10189588

Family Applications (1)

Application Number Title Priority Date Filing Date
GB2306774A Expired GB1448041A (en) 1974-05-23 1974-05-23 Data processing equipment

Country Status (11)

Country Link
JP (1) JPS5124844A (en)
AU (1) AU8105175A (en)
BE (1) BE829386A (en)
DE (1) DE2521900A1 (en)
ES (1) ES437893A1 (en)
FR (1) FR2272441B1 (en)
GB (1) GB1448041A (en)
IE (1) IE41472B1 (en)
IN (1) IN141971B (en)
NL (1) NL7506005A (en)
ZA (1) ZA752215B (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE19837101C2 (en) * 1998-08-17 2000-11-23 Philips Corp Intellectual Pty Programmable 1-bit data processing arrangement

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2423820A1 (en) * 1978-03-20 1979-11-16 Bendix Corp AUTONOMOUS INPUT / OUTPUT PROCESSOR FOR DIGITAL SYSTEMS
DE10163206B4 (en) * 2001-12-21 2004-03-11 Schneider Automation Gmbh Method for operating a programmable logic controller

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE19837101C2 (en) * 1998-08-17 2000-11-23 Philips Corp Intellectual Pty Programmable 1-bit data processing arrangement
US6385717B1 (en) 1998-08-17 2002-05-07 U.S. Philips Corporation Programmable 1-bit data processing arrangement
EP0981079A3 (en) * 1998-08-17 2005-11-23 Philips Intellectual Property & Standards GmbH Programmable one bit data processing apparatus

Also Published As

Publication number Publication date
IE41472L (en) 1975-11-23
ES437893A1 (en) 1977-01-01
DE2521900A1 (en) 1975-12-04
JPS5124844A (en) 1976-02-28
AU8105175A (en) 1976-11-18
FR2272441A1 (en) 1975-12-19
IE41472B1 (en) 1980-01-16
BE829386A (en) 1975-11-24
ZA752215B (en) 1976-03-31
NL7506005A (en) 1975-11-25
FR2272441B1 (en) 1980-08-01
IN141971B (en) 1977-05-14

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Legal Events

Date Code Title Description
PS Patent sealed [section 19, patents act 1949]
PCNP Patent ceased through non-payment of renewal fee