GB1315673A - Digital computer installations - Google Patents
Digital computer installationsInfo
- Publication number
- GB1315673A GB1315673A GB1315673DA GB1315673A GB 1315673 A GB1315673 A GB 1315673A GB 1315673D A GB1315673D A GB 1315673DA GB 1315673 A GB1315673 A GB 1315673A
- Authority
- GB
- United Kingdom
- Prior art keywords
- register
- data
- circuit
- computer
- error
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/14—Error detection or correction of the data by redundancy in operation
- G06F11/1402—Saving, restoring, recovering or retrying
- G06F11/1405—Saving, restoring, recovering or retrying at machine instruction level
- G06F11/141—Saving, restoring, recovering or retrying at machine instruction level for bus or memory accesses
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Quality & Reliability (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Debugging And Monitoring (AREA)
Abstract
1315673 Digital computers; error detection KOMBINAT ROBOTRON VEB 12 June 1970 28667/70 Heading G4A A circuit arrangement determines whether errors in a digital computer are temporary or permanent by counting the number of times that an error is repeated. A computer 1 executes an operating step under control of data in control register 2, which data is transferred to a holding register 6 by a circuit 7. Error detection circuits 4 detect any errors in the execution of the step and inform a fault control circuit 5 which causes the contents of register 6 to be returned to register 2, thus repeating the step. A counter in circuit 5 classifies a fault as permanent after a predetermined number of repetitions. If there is no error fresh data is fetched from control unit 3. In another embodiment (Fig. 2, not shown) the computer is microprogrammed and the transferred data is the address of a microinstruction.
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| GB2866770 | 1970-06-12 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| GB1315673A true GB1315673A (en) | 1973-05-02 |
Family
ID=10279233
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| GB1315673D Expired GB1315673A (en) | 1970-06-12 | 1970-06-12 | Digital computer installations |
Country Status (1)
| Country | Link |
|---|---|
| GB (1) | GB1315673A (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0105710A3 (en) * | 1982-09-28 | 1986-09-03 | Fujitsu Limited | Method for recovering from error in a microprogram-controlled unit |
| EP0120186A3 (en) * | 1983-03-24 | 1988-01-27 | International Business Machines Corporation | Apparatus and method for automatic instruction parity error recovery |
| EP0256267A3 (en) * | 1986-08-12 | 1989-10-25 | Hitachi, Ltd. | Microprocessor for retrying data transfer |
-
1970
- 1970-06-12 GB GB1315673D patent/GB1315673A/en not_active Expired
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0105710A3 (en) * | 1982-09-28 | 1986-09-03 | Fujitsu Limited | Method for recovering from error in a microprogram-controlled unit |
| EP0120186A3 (en) * | 1983-03-24 | 1988-01-27 | International Business Machines Corporation | Apparatus and method for automatic instruction parity error recovery |
| EP0256267A3 (en) * | 1986-08-12 | 1989-10-25 | Hitachi, Ltd. | Microprocessor for retrying data transfer |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PS | Patent sealed | ||
| PLNP | Patent lapsed through nonpayment of renewal fees |