GB1383981A - Electrically alterable floating gate device and method for altering same - Google Patents
Electrically alterable floating gate device and method for altering sameInfo
- Publication number
- GB1383981A GB1383981A GB196072A GB196072A GB1383981A GB 1383981 A GB1383981 A GB 1383981A GB 196072 A GB196072 A GB 196072A GB 196072 A GB196072 A GB 196072A GB 1383981 A GB1383981 A GB 1383981A
- Authority
- GB
- United Kingdom
- Prior art keywords
- floating gate
- gate
- substrate
- gate device
- jan
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 239000000758 substrate Substances 0.000 abstract 3
- 238000002347 injection Methods 0.000 abstract 2
- 239000007924 injection Substances 0.000 abstract 2
- 239000002184 metal Substances 0.000 abstract 2
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 abstract 1
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 abstract 1
- 238000009413 insulation Methods 0.000 abstract 1
- 229910021420 polycrystalline silicon Inorganic materials 0.000 abstract 1
- 239000004065 semiconductor Substances 0.000 abstract 1
- 229910052710 silicon Inorganic materials 0.000 abstract 1
- 239000010703 silicon Substances 0.000 abstract 1
- 229910052814 silicon oxide Inorganic materials 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/68—Floating-gate IGFETs
- H10D30/681—Floating-gate IGFETs having only two programming levels
- H10D30/684—Floating-gate IGFETs having only two programming levels programmed by hot carrier injection
- H10D30/686—Floating-gate IGFETs having only two programming levels programmed by hot carrier injection using hot carriers produced by avalanche breakdown of PN junctions, e.g. floating gate avalanche injection MOS [FAMOS]
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
- G11C16/0408—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors
- G11C16/0416—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors comprising cells containing a single floating gate transistor and no select transistor, e.g. UV EPROM
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Non-Volatile Memory (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
- Semiconductor Memories (AREA)
Abstract
1383981 Semi-conductor devices INTEL CORP 14 Jan 1972 [15 Jan 1971] 1960/72 Heading H1K Fig. 5 shows a plan view of an insulated gate device having source and drain regions 30, 31 formed in a substrate of P-type silicon covered with silicon oxide insulation (not shown) and bearing a P<+> floating gate 25 of polycrystalline silicon. Two metallic gates 26, 27 are insulated from one another, from the floating gate 25, and from the substrate. In variants (in which the shapes of source, drain, and floating gate differ somewhat from those shown) either gate 26 or gate 27 is omitted. Fig. 6 shows another form, in which the two metal gates 50, 52 are each over part of the channel region. All the devices function as memory devices in which charge is or is not stored on the floating gate. Charge is applied to the floating gate by avalanche injection from the substrate and is removed by avalanche injection from the floating gate to a metal gate. Various combinations of potentials may be used to achieve these changes.
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US10664371A | 1971-01-15 | 1971-01-15 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| GB1383981A true GB1383981A (en) | 1974-02-12 |
Family
ID=22312502
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| GB196072A Expired GB1383981A (en) | 1971-01-15 | 1972-01-14 | Electrically alterable floating gate device and method for altering same |
Country Status (8)
| Country | Link |
|---|---|
| JP (1) | JPS5146382B1 (en) |
| BE (1) | BE777996A (en) |
| CA (1) | CA946524A (en) |
| DE (1) | DE2201028C3 (en) |
| FR (1) | FR2121824B1 (en) |
| GB (1) | GB1383981A (en) |
| IT (1) | IT962050B (en) |
| NL (1) | NL7200562A (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE2845328A1 (en) * | 1978-10-18 | 1980-04-30 | Itt Ind Gmbh Deutsche | MEMORY TRANSISTOR |
| WO2001024268A1 (en) * | 1999-09-24 | 2001-04-05 | Intel Corporation | A nonvolatile memory device with a high work function floating-gate and method of fabrication |
| US6518618B1 (en) | 1999-12-03 | 2003-02-11 | Intel Corporation | Integrated memory cell and method of fabrication |
Families Citing this family (12)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3797000A (en) * | 1972-12-29 | 1974-03-12 | Ibm | Non-volatile semiconductor storage device utilizing avalanche injection and extraction of stored information |
| US3836992A (en) * | 1973-03-16 | 1974-09-17 | Ibm | Electrically erasable floating gate fet memory cell |
| JPS5613029B2 (en) * | 1973-09-21 | 1981-03-25 | ||
| DE2513207C2 (en) * | 1974-09-20 | 1982-07-01 | Siemens AG, 1000 Berlin und 8000 München | n-channel memory FET |
| DE2643987C2 (en) * | 1974-09-20 | 1984-03-29 | Siemens AG, 1000 Berlin und 8000 München | n-channel memory FET |
| DE2638730C2 (en) * | 1974-09-20 | 1982-10-28 | Siemens AG, 1000 Berlin und 8000 München | N-channel memory FET, method of discharging the memory gate of the n-channel memory FET and using the n-channel memory FET |
| DE2445079C3 (en) * | 1974-09-20 | 1981-06-04 | Siemens AG, 1000 Berlin und 8000 München | Storage field effect transistor |
| DE2812049C2 (en) * | 1974-09-20 | 1982-05-27 | Siemens AG, 1000 Berlin und 8000 München | n-channel memory FET |
| DE2505816C3 (en) * | 1974-09-20 | 1982-04-22 | Siemens AG, 1000 Berlin und 8000 München | Method for operating an n-channel memory FET, n-channel memory FET for carrying out the method and applying the method to the n-channel memory FETs of a memory matrix |
| DE2560220C2 (en) * | 1975-03-25 | 1982-11-25 | Siemens AG, 1000 Berlin und 8000 München | n-channel memory FET |
| JPS5554415A (en) * | 1978-10-16 | 1980-04-21 | Nippon Gakki Seizo Kk | Method and device for space set averaging for reverberation waveform |
| JPS6162824A (en) * | 1985-06-22 | 1986-03-31 | Nippon Gakki Seizo Kk | Method and apparatus for compressive intake of reverberation data |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3500142A (en) * | 1967-06-05 | 1970-03-10 | Bell Telephone Labor Inc | Field effect semiconductor apparatus with memory involving entrapment of charge carriers |
| CA813537A (en) * | 1967-10-17 | 1969-05-20 | Joseph H. Scott, Jr. | Semiconductor memory device |
-
1972
- 1972-01-11 DE DE2201028A patent/DE2201028C3/en not_active Expired
- 1972-01-13 FR FR7201101A patent/FR2121824B1/fr not_active Expired
- 1972-01-13 BE BE777996A patent/BE777996A/en unknown
- 1972-01-14 NL NL7200562A patent/NL7200562A/xx not_active Application Discontinuation
- 1972-01-14 GB GB196072A patent/GB1383981A/en not_active Expired
- 1972-01-14 CA CA132,413A patent/CA946524A/en not_active Expired
- 1972-01-14 IT IT19378/72A patent/IT962050B/en active
- 1972-01-17 JP JP47006261A patent/JPS5146382B1/ja active Pending
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE2845328A1 (en) * | 1978-10-18 | 1980-04-30 | Itt Ind Gmbh Deutsche | MEMORY TRANSISTOR |
| WO2001024268A1 (en) * | 1999-09-24 | 2001-04-05 | Intel Corporation | A nonvolatile memory device with a high work function floating-gate and method of fabrication |
| US6518618B1 (en) | 1999-12-03 | 2003-02-11 | Intel Corporation | Integrated memory cell and method of fabrication |
| US6943071B2 (en) | 1999-12-03 | 2005-09-13 | Intel Corporation | Integrated memory cell and method of fabrication |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS5146382B1 (en) | 1976-12-08 |
| DE2201028A1 (en) | 1972-08-31 |
| BE777996A (en) | 1972-05-02 |
| FR2121824A1 (en) | 1972-08-25 |
| NL7200562A (en) | 1972-07-18 |
| CA946524A (en) | 1974-04-30 |
| DE2201028C3 (en) | 1981-07-09 |
| FR2121824B1 (en) | 1977-04-01 |
| IT962050B (en) | 1973-12-20 |
| DE2201028B2 (en) | 1979-01-18 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PS | Patent sealed [section 19, patents act 1949] | ||
| PE20 | Patent expired after termination of 20 years |