GB1372670A - Small signal detecting and amplifying circuit - Google Patents
Small signal detecting and amplifying circuitInfo
- Publication number
- GB1372670A GB1372670A GB3198573A GB3198573A GB1372670A GB 1372670 A GB1372670 A GB 1372670A GB 3198573 A GB3198573 A GB 3198573A GB 3198573 A GB3198573 A GB 3198573A GB 1372670 A GB1372670 A GB 1372670A
- Authority
- GB
- United Kingdom
- Prior art keywords
- period
- during
- switch
- input
- inverter
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
- H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
- H03K3/353—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of field-effect transistors with internal or external positive feedback
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
- G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
- G11C11/409—Read-write [R-W] circuits
- G11C11/4091—Sense or sense/refresh amplifiers, or associated sense circuitry, e.g. for coupled bit-line precharging, equalising or isolating
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
- H03K5/01—Shaping pulses
- H03K5/02—Shaping pulses by amplifying
- H03K5/023—Shaping pulses by amplifying using field effect transistors
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Nonlinear Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Amplifiers (AREA)
- Static Random-Access Memory (AREA)
- Manipulation Of Pulses (AREA)
Abstract
1372670 Read-write amplifiers PHILIPS ELECTRONIC & ASSOCIATED INDUSTRIES Ltd 5 July 1973 [8 July 1972] 31985/73 Heading H3T A small signal amplifier suitable for the writein or read-out of information from a memory cell comprises first and second inverters I 1 , I 2 including IGFETs 1-4, a first switch 5 providing negative feedback between the output and input of the first inverter I 1 during the first period of a cycle, a second switch 6 providing positive feedback between the output of the second inverter and the input of the first inverter during a third and final period of the cycle with the input signal being applied during the intermediate second period of the cycle. In operation, during the first period when switch 5 is closed a charge corresponding to a threshold voltage level is stored in the gate-source capacitance of FET 1 setting the amplifier in an unstable equilibrium. During the second period, the presence of an input signal at S provides an additional charge and when switch 6 is closed during the third period, the charge level present at the gate of 1 is already present in an amplified form at output Q and is fed-back to the input gate of 1 so that depending on the input signal the circuit switches to one or other of the two stable states from the unstable state of equilibrium. A negative feed-back between theoutput and input of inverter I 2 during the first period may be provided via switch 6 or via a third switch (not shown). To reduce power dissipation, the supply voltages may be switched off between the end of the first period and prior to the commencement of the third period.
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| NL7209535A NL7209535A (en) | 1972-07-08 | 1972-07-08 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| GB1372670A true GB1372670A (en) | 1974-11-06 |
Family
ID=19816485
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| GB3198573A Expired GB1372670A (en) | 1972-07-08 | 1973-07-05 | Small signal detecting and amplifying circuit |
Country Status (8)
| Country | Link |
|---|---|
| JP (1) | JPS4946345A (en) |
| AU (1) | AU5770173A (en) |
| DE (1) | DE2331055A1 (en) |
| ES (1) | ES416643A1 (en) |
| FR (1) | FR2192416B3 (en) |
| GB (1) | GB1372670A (en) |
| IT (1) | IT991673B (en) |
| NL (1) | NL7209535A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE3330559A1 (en) * | 1982-08-24 | 1984-03-08 | Mitsubishi Denki K.K., Tokyo | OUTPUT SWITCHING |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| LU86787A1 (en) * | 1986-06-19 | 1987-07-24 | Siemens Ag | BROADBAND SIGNAL DEVICE |
| US4989127A (en) * | 1989-05-09 | 1991-01-29 | North American Philips Corporation | Driver for high voltage half-bridge circuits |
-
1972
- 1972-07-08 NL NL7209535A patent/NL7209535A/xx unknown
-
1973
- 1973-06-19 DE DE19732331055 patent/DE2331055A1/en active Pending
- 1973-07-04 FR FR7324560A patent/FR2192416B3/fr not_active Expired
- 1973-07-04 AU AU57701/73A patent/AU5770173A/en not_active Expired
- 1973-07-05 GB GB3198573A patent/GB1372670A/en not_active Expired
- 1973-07-05 IT IT6900673A patent/IT991673B/en active
- 1973-07-06 ES ES416643A patent/ES416643A1/en not_active Expired
- 1973-07-09 JP JP48077386A patent/JPS4946345A/ja active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE3330559A1 (en) * | 1982-08-24 | 1984-03-08 | Mitsubishi Denki K.K., Tokyo | OUTPUT SWITCHING |
Also Published As
| Publication number | Publication date |
|---|---|
| IT991673B (en) | 1975-08-30 |
| DE2331055A1 (en) | 1974-01-17 |
| AU5770173A (en) | 1975-01-09 |
| NL7209535A (en) | 1974-01-10 |
| FR2192416A1 (en) | 1974-02-08 |
| FR2192416B3 (en) | 1976-06-18 |
| ES416643A1 (en) | 1976-02-01 |
| JPS4946345A (en) | 1974-05-02 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| GB1528936A (en) | Fet circuit arrangements | |
| CA2033020C (en) | C-mos differential sense amplifier | |
| GB1404266A (en) | Field effect transistor circuit | |
| TW328591B (en) | Sense circuit | |
| GB1524665A (en) | Memeory circuit arrangement utilizing one-transistor-per-bit memory cells | |
| KR950004527A (en) | Semiconductor memory device | |
| ES470267A1 (en) | Capacitor memory with an amplified cell signal | |
| GB1372670A (en) | Small signal detecting and amplifying circuit | |
| MY103749A (en) | Power amplifier circuit with a stand-by state | |
| GB1315325A (en) | Difference amplifier | |
| KR910010521A (en) | Dynamic RAM Readout Circuit | |
| GB1434468A (en) | Dynamic binary counter circuit | |
| GB1350877A (en) | Sense amplifier for high speed memory system | |
| GB1245661A (en) | Analog memory system | |
| EP0366332A3 (en) | Digital memory system | |
| GB1149165A (en) | Electronic readout gate circuit for reading a logic memory element | |
| JPS5452431A (en) | Semiconductor memory device | |
| ES405034A1 (en) | Electronic latch circuit | |
| GB1414402A (en) | Bistable circuits | |
| GB1109938A (en) | Sense amplifier for memory system | |
| JPS5512576A (en) | Integrated memory cell | |
| GB1397050A (en) | Splitphase signal detector | |
| JPS56111188A (en) | Semiconductor storage device | |
| JPS5640313A (en) | Switching amplifier | |
| SU422043A1 (en) |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PS | Patent sealed | ||
| PLNP | Patent lapsed through nonpayment of renewal fees |