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GB1360136A - Logic unit - Google Patents

Logic unit

Info

Publication number
GB1360136A
GB1360136A GB1575372A GB1575372A GB1360136A GB 1360136 A GB1360136 A GB 1360136A GB 1575372 A GB1575372 A GB 1575372A GB 1575372 A GB1575372 A GB 1575372A GB 1360136 A GB1360136 A GB 1360136A
Authority
GB
United Kingdom
Prior art keywords
low
input
emitter
output
clock
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
GB1575372A
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
OTHERS
Original Assignee
OTHERS
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority to DE2214968A priority Critical patent/DE2214968A1/en
Priority to DE19722265222 priority patent/DE2265222A1/en
Priority claimed from DE2214968A external-priority patent/DE2214968A1/en
Application filed by OTHERS filed Critical OTHERS
Priority to GB1575372A priority patent/GB1360136A/en
Priority to FR7214494A priority patent/FR2182270A5/fr
Publication of GB1360136A publication Critical patent/GB1360136A/en
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/027—Generators characterised by the type of circuit or by the means used for producing pulses by the use of logic circuits, with internal or external positive feedback
    • H03K3/037—Bistable circuits
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/08—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
    • H03K19/082—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using bipolar transistors
    • H03K19/088—Transistor-transistor logic
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/26—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of bipolar transistors with internal or external positive feedback
    • H03K3/28—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of bipolar transistors with internal or external positive feedback using means other than a transformer for feedback
    • H03K3/281—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of bipolar transistors with internal or external positive feedback using means other than a transformer for feedback using at least two transistors so coupled that the input of one is derived from the output of another, e.g. multivibrator
    • H03K3/286—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of bipolar transistors with internal or external positive feedback using means other than a transformer for feedback using at least two transistors so coupled that the input of one is derived from the output of another, e.g. multivibrator bistable

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Manipulation Of Pulses (AREA)
  • Amplifiers (AREA)

Abstract

1360136 Transistor logic circuits B M MANSUROV V I GORYACHEV V V ILINSKY I D YAKUSHEV V Y KONTAREV G G AKIMOVA and V N FILATOV 5 April 1972 15753/72 Heading H3T AND gates comprising transistors 1, 2 which each receive true and inverse inputs 5, 6 and 7, 8 at base and emitter respectively, are connected to a multi-emitter OR gate 3. T3 drives an amplifier 4 whose output is fed back to T1 base to effect a latching action. When the clock pulse at 19 is low, T1 is able to conduct to establish the latching feedback. When the clock pulse is high T1 is off, and T2 is enabled to respond to an input 8 to its emitter. If input 8 is low, T2 and T3 conduct to make amplifier 4 input low and its output high, so that the state of the latch is unchanged and is maintained by T1 when the clock 19 goes low again. If input 8 were high, the latch would change state, and T1 would not conduct even when the clock goes low again, so that the new low output 10 would be maintained. A similar AND/OR circuit 18 has in addition an inverter stage whose output 16 provides the latching feedback, which in this case goes to T2 emitter. In this case therefore, the latching feedback is effective during high portion of the clock signal, T2 being held on thereby, and is ineffective during the low portion. Hence units 17, 18 are alternately enabled to respond to their inputs 5 (to 18) and 8 (to 17), and as each of these inputs is the output of the other unit, a divide by two action is effected. Various signal input networks to T1 and T2 bases are possible (Fig. 6, not shown) using combinations of resistors, capacitors, and diodes.
GB1575372A 1972-03-27 1972-04-05 Logic unit Expired GB1360136A (en)

Priority Applications (4)

Application Number Priority Date Filing Date Title
DE2214968A DE2214968A1 (en) 1972-03-27 1972-03-27 LOGIC DEVICE AND BISTABLE TILTING STEPS BUILT FROM IT
DE19722265222 DE2265222A1 (en) 1972-03-27 1972-03-27 CYCLE CONTROLLED BISTABLE TILTING STEP
GB1575372A GB1360136A (en) 1972-03-27 1972-04-05 Logic unit
FR7214494A FR2182270A5 (en) 1972-03-27 1972-04-24

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
DE2214968A DE2214968A1 (en) 1972-03-27 1972-03-27 LOGIC DEVICE AND BISTABLE TILTING STEPS BUILT FROM IT
DE19722265222 DE2265222A1 (en) 1972-03-27 1972-03-27 CYCLE CONTROLLED BISTABLE TILTING STEP
GB1575372A GB1360136A (en) 1972-03-27 1972-04-05 Logic unit
FR7214494A FR2182270A5 (en) 1972-03-27 1972-04-24

Publications (1)

Publication Number Publication Date
GB1360136A true GB1360136A (en) 1974-07-17

Family

ID=27431463

Family Applications (1)

Application Number Title Priority Date Filing Date
GB1575372A Expired GB1360136A (en) 1972-03-27 1972-04-05 Logic unit

Country Status (3)

Country Link
DE (1) DE2265222A1 (en)
FR (1) FR2182270A5 (en)
GB (1) GB1360136A (en)

Also Published As

Publication number Publication date
FR2182270A5 (en) 1973-12-07
DE2265222A1 (en) 1977-01-20

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Legal Events

Date Code Title Description
PS Patent sealed [section 19, patents act 1949]
PCNP Patent ceased through non-payment of renewal fee