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GB1220370A - Electrical circuit boards - Google Patents

Electrical circuit boards

Info

Publication number
GB1220370A
GB1220370A GB5769868A GB5769868A GB1220370A GB 1220370 A GB1220370 A GB 1220370A GB 5769868 A GB5769868 A GB 5769868A GB 5769868 A GB5769868 A GB 5769868A GB 1220370 A GB1220370 A GB 1220370A
Authority
GB
United Kingdom
Prior art keywords
substrate
cladding
holes
pattern
metallized
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
GB5769868A
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Northrop Grumman Systems Corp
Original Assignee
Litton Industries Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Litton Industries Inc filed Critical Litton Industries Inc
Priority to GB5769868A priority Critical patent/GB1220370A/en
Publication of GB1220370A publication Critical patent/GB1220370A/en
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • H05K3/4644Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
    • H05K3/4652Adding a circuit layer by laminating a metal foil or a preformed metal foil pattern
    • H05K3/4655Adding a circuit layer by laminating a metal foil or a preformed metal foil pattern by using a laminate characterized by the insulating layer
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/0201Thermal arrangements, e.g. for cooling, heating or preventing overheating
    • H05K1/0203Cooling of mounted components
    • H05K1/0204Cooling of mounted components using means for thermal conduction connection in the thickness direction of the substrate
    • H05K1/0206Cooling of mounted components using means for thermal conduction connection in the thickness direction of the substrate by printed thermal vias
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/11Printed elements for providing electric connections to or between printed circuits
    • H05K1/111Pads for surface mounting, e.g. lay-out
    • H05K1/112Pads for surface mounting, e.g. lay-out directly combined with via connections
    • H05K1/113Via provided in pad; Pad over filled via
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • H05K3/4644Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
    • H05K3/4652Adding a circuit layer by laminating a metal foil or a preformed metal foil pattern
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/01Dielectrics
    • H05K2201/0183Dielectric layers
    • H05K2201/0195Dielectric or adhesive layers comprising a plurality of layers, e.g. in a multilayer structure
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/03Conductive materials
    • H05K2201/0332Structure of the conductor
    • H05K2201/0335Layered conductors or foils
    • H05K2201/0355Metal foils
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/03Conductive materials
    • H05K2201/0332Structure of the conductor
    • H05K2201/0388Other aspects of conductors
    • H05K2201/0394Conductor crossing over a hole in the substrate or a gap between two separate substrate parts
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09209Shape and layout details of conductors
    • H05K2201/095Conductive through-holes or vias
    • H05K2201/09509Blind vias, i.e. vias having one side closed
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09209Shape and layout details of conductors
    • H05K2201/095Conductive through-holes or vias
    • H05K2201/09536Buried plated through-holes, i.e. plated through-holes formed in a core before lamination
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09209Shape and layout details of conductors
    • H05K2201/095Conductive through-holes or vias
    • H05K2201/096Vertically aligned vias, holes or stacked vias
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10621Components characterised by their electrical contacts
    • H05K2201/10689Leaded Integrated Circuit [IC] package, e.g. dual-in-line [DIL]
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/13Moulding and encapsulation; Deposition techniques; Protective layers
    • H05K2203/1377Protective layers
    • H05K2203/1394Covering open PTHs, e.g. by dry film resist or by metal disc
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/0011Working of insulating substrates or insulating layers
    • H05K3/0017Etching of the substrate by chemical or physical means
    • H05K3/002Etching of the substrate by chemical or physical means by liquid chemical etching
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/0058Laminating printed circuit boards onto other substrates, e.g. metallic substrates
    • H05K3/0061Laminating printed circuit boards onto other substrates, e.g. metallic substrates onto a metallic substrate, e.g. a heat sink
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/0094Filling or covering plated through-holes or blind plated vias, e.g. for masking or for mechanical reinforcement
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/38Improvement of the adhesion between the insulating substrate and the metal
    • H05K3/386Improvement of the adhesion between the insulating substrate and the metal by the use of an organic polymeric bonding layer, e.g. adhesive

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)

Abstract

1,220,370. Printed circuits. LITTON INDUSTRIES Inc. 29 July, 1969 [13 Aug., 1968], No. 57698/68. Addition to 1,145,771. Heading H1R. In a multilayer printed circuit board of the kind comprising metallized holes which interconnect terminal pads at different levels in the board, at least two such holes separated by at least one insulating layer extend in at least partial alignment within the board. As shown, Fig. 1d, apertures 13 are formed by a photoetching process in the Cu cladding 12 on one surface of an insulating substrate 10 having similar cladding 12<SP>1</SP> on its other surface. Holes 18 are then etched in the substrate, which may be of epoxy glass, in which case the etchant may be a mixture of HF and H 2 SO 4 . Cladding 12 is removed, and the walls of holes 18 are metallized by electroless plating followed by electroplating, e.g. with Cu, as shown at 20 in Fig. 1h. The exposed surface of substrate 10 is again Cu-coated, as by cladding under heat and pressure followed by electroplating, the Cu coating then being photo-etched to form a pattern of conductor 26 and round pads 28 above metallized holes 20; the pattern is given a coating 30 of Au. A layer of partially cured plastics material (32, Fig. 1i, not shown) is applied to the pattern-bearing surface of the substrate, and a second insulating substrate (34) clad with a single Cu lamina (36) is bonded thereon by heat and pressure. The steps for the formation of metallized holes and a conductive pattern are then repeated; and so on, for subsequent layers. When a multilayer circuit board has been produced, it is inverted so that cladding 12<SP>1</SP> is on top (Figs. 3, 3a not shown) and the cladding is etched to form terminal pads (12<SP>1</SP>a), to which are connected the leads (38) of electronic modules (37), and mounting pads (12<SP>1</SP>b) on which the modules lie, and which are in contact with heat conductive metallized holes (54), formed through the substrate, which in turn are in heat-exchange contact with earthing layers (46, 52) on the other surface of the substrate.
GB5769868A 1968-08-13 1968-08-13 Electrical circuit boards Expired GB1220370A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
GB5769868A GB1220370A (en) 1968-08-13 1968-08-13 Electrical circuit boards

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GB5769868A GB1220370A (en) 1968-08-13 1968-08-13 Electrical circuit boards

Publications (1)

Publication Number Publication Date
GB1220370A true GB1220370A (en) 1971-01-27

Family

ID=10479830

Family Applications (1)

Application Number Title Priority Date Filing Date
GB5769868A Expired GB1220370A (en) 1968-08-13 1968-08-13 Electrical circuit boards

Country Status (1)

Country Link
GB (1) GB1220370A (en)

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4016463A (en) * 1973-10-17 1977-04-05 Amdahl Corporation High density multilayer printed circuit card assembly and method
US4718163A (en) * 1981-12-31 1988-01-12 Thomson-Csf Process for producing cooling device for printed circuit card
US5045970A (en) * 1987-05-22 1991-09-03 Texas Instruments Incorporated Joined substrates having planar electrical interconnection of hybrid circuits
US5196652A (en) * 1990-12-26 1993-03-23 Xerox Corporation Wireless electrical connections of abutting tiled arrays
US5375039A (en) * 1992-09-29 1994-12-20 Robert Bosch Gmbh Circuit board heat dissipation layering arrangement
US5831836A (en) * 1992-01-30 1998-11-03 Lsi Logic Power plane for semiconductor device
WO2000041447A1 (en) * 1999-01-05 2000-07-13 Ppc Electronic Ag Method for producing a multilayer printed circuit board
EP2009966A1 (en) * 2007-06-29 2008-12-31 Delphi Technologies, Inc. Multi-layer electrically isolated thermal conduction structure for a circuit board assembly

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4016463A (en) * 1973-10-17 1977-04-05 Amdahl Corporation High density multilayer printed circuit card assembly and method
US4718163A (en) * 1981-12-31 1988-01-12 Thomson-Csf Process for producing cooling device for printed circuit card
US5045970A (en) * 1987-05-22 1991-09-03 Texas Instruments Incorporated Joined substrates having planar electrical interconnection of hybrid circuits
US5196652A (en) * 1990-12-26 1993-03-23 Xerox Corporation Wireless electrical connections of abutting tiled arrays
US5831836A (en) * 1992-01-30 1998-11-03 Lsi Logic Power plane for semiconductor device
US5375039A (en) * 1992-09-29 1994-12-20 Robert Bosch Gmbh Circuit board heat dissipation layering arrangement
WO2000041447A1 (en) * 1999-01-05 2000-07-13 Ppc Electronic Ag Method for producing a multilayer printed circuit board
EP2009966A1 (en) * 2007-06-29 2008-12-31 Delphi Technologies, Inc. Multi-layer electrically isolated thermal conduction structure for a circuit board assembly
US7808788B2 (en) 2007-06-29 2010-10-05 Delphi Technologies, Inc. Multi-layer electrically isolated thermal conduction structure for a circuit board assembly

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