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GB1281010A - Improvements in and relating to methods of manufacturing semiconductor devices - Google Patents

Improvements in and relating to methods of manufacturing semiconductor devices

Info

Publication number
GB1281010A
GB1281010A GB61955/68A GB6195568A GB1281010A GB 1281010 A GB1281010 A GB 1281010A GB 61955/68 A GB61955/68 A GB 61955/68A GB 6195568 A GB6195568 A GB 6195568A GB 1281010 A GB1281010 A GB 1281010A
Authority
GB
United Kingdom
Prior art keywords
face
pits
circuits
pit
handle body
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
GB61955/68A
Inventor
David Belgrove Lee
Ralph David Knott
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
ASSOCIATED SEMICONDUCTOR MFT
Original Assignee
ASSOCIATED SEMICONDUCTOR MFT
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by ASSOCIATED SEMICONDUCTOR MFT filed Critical ASSOCIATED SEMICONDUCTOR MFT
Priority to GB61955/68A priority Critical patent/GB1281010A/en
Publication of GB1281010A publication Critical patent/GB1281010A/en
Expired legal-status Critical Current

Links

Classifications

    • H10P95/00
    • H10W74/43
    • H10W72/07236

Landscapes

  • Element Separation (AREA)

Abstract

1281010 Semi-conductor devices ASSOCIATED SEMICONDUCTOR MFRS Ltd 22 Oct 1969 [31 Dec 1968] 61955/68 Heading H1K [Also in Division B6] A process for making semi-conductor devices includes the steps of aperturing a masking layer on one face of a semi-conductor wafer and anisotropically etching a pit therethrough, the edges of the aperture and crystal surface being so orientated that the pit has a V-shaped crosssection and a depth directly related to the width of the aperture, providing on the pitted face a rigid support which is insulating at least where it abuts that face and then removing material from the opposite face to expose the bottom of the pit. A plurality of spaced pits of uniform depth may be used to facilitate uniform thinning or pits of varying depths used to permit final control of thinning or contouring of the opposite face. In a typical example an oxide coated 100 orientated Si wafer containing a co-ordinate array of integrated circuits has five spaced 25 Á square apertures the edges of which lie parallel to intersections of 111 planes with the surface in the oxide over the channels between circuits. Treatment in a boiling equimolar mixture of hydrazine and water produces pits 20 Á deep. A glass handle body is deposited on the apertured face and the other face ground to expose the pits, which process is facilitated by illuminating the handle body. Air isolation between circuits and between elements of a circuit is provided by appropriately masking with oxide and etching as before. Individual circuits are finally separated by scribing and fracturing the handle body and potted. Isolation of individual elements of a circuit by PN junctions and solid insulator are suggested alternatives. Other anisotropic etchants which require use of silicon carbide or nitride masking are mixtures of hydrazine, water, and propanol or catechol, and of potassium hydroxide, propanol, and water.
GB61955/68A 1968-12-31 1968-12-31 Improvements in and relating to methods of manufacturing semiconductor devices Expired GB1281010A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
GB61955/68A GB1281010A (en) 1968-12-31 1968-12-31 Improvements in and relating to methods of manufacturing semiconductor devices

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GB61955/68A GB1281010A (en) 1968-12-31 1968-12-31 Improvements in and relating to methods of manufacturing semiconductor devices

Publications (1)

Publication Number Publication Date
GB1281010A true GB1281010A (en) 1972-07-12

Family

ID=10487693

Family Applications (1)

Application Number Title Priority Date Filing Date
GB61955/68A Expired GB1281010A (en) 1968-12-31 1968-12-31 Improvements in and relating to methods of manufacturing semiconductor devices

Country Status (1)

Country Link
GB (1) GB1281010A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4141135A (en) 1975-10-14 1979-02-27 Thomson-Csf Semiconductor process using lapped substrate and lapped low resistivity semiconductor carrier
EP0022280A1 (en) * 1979-07-04 1981-01-14 BBC Aktiengesellschaft Brown, Boveri & Cie. Process for the chemical etching of silicon substrates
US4351894A (en) 1976-08-27 1982-09-28 Tokyo Shibaura Electric Co., Ltd. Method of manufacturing a semiconductor device using silicon carbide mask

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4141135A (en) 1975-10-14 1979-02-27 Thomson-Csf Semiconductor process using lapped substrate and lapped low resistivity semiconductor carrier
US4351894A (en) 1976-08-27 1982-09-28 Tokyo Shibaura Electric Co., Ltd. Method of manufacturing a semiconductor device using silicon carbide mask
EP0022280A1 (en) * 1979-07-04 1981-01-14 BBC Aktiengesellschaft Brown, Boveri & Cie. Process for the chemical etching of silicon substrates

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Legal Events

Date Code Title Description
PS Patent sealed [section 19, patents act 1949]
PLNP Patent lapsed through nonpayment of renewal fees