GB1281010A - Improvements in and relating to methods of manufacturing semiconductor devices - Google Patents
Improvements in and relating to methods of manufacturing semiconductor devicesInfo
- Publication number
- GB1281010A GB1281010A GB61955/68A GB6195568A GB1281010A GB 1281010 A GB1281010 A GB 1281010A GB 61955/68 A GB61955/68 A GB 61955/68A GB 6195568 A GB6195568 A GB 6195568A GB 1281010 A GB1281010 A GB 1281010A
- Authority
- GB
- United Kingdom
- Prior art keywords
- face
- pits
- circuits
- pit
- handle body
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- H10P95/00—
-
- H10W74/43—
-
- H10W72/07236—
Landscapes
- Element Separation (AREA)
Abstract
1281010 Semi-conductor devices ASSOCIATED SEMICONDUCTOR MFRS Ltd 22 Oct 1969 [31 Dec 1968] 61955/68 Heading H1K [Also in Division B6] A process for making semi-conductor devices includes the steps of aperturing a masking layer on one face of a semi-conductor wafer and anisotropically etching a pit therethrough, the edges of the aperture and crystal surface being so orientated that the pit has a V-shaped crosssection and a depth directly related to the width of the aperture, providing on the pitted face a rigid support which is insulating at least where it abuts that face and then removing material from the opposite face to expose the bottom of the pit. A plurality of spaced pits of uniform depth may be used to facilitate uniform thinning or pits of varying depths used to permit final control of thinning or contouring of the opposite face. In a typical example an oxide coated 100 orientated Si wafer containing a co-ordinate array of integrated circuits has five spaced 25 Á square apertures the edges of which lie parallel to intersections of 111 planes with the surface in the oxide over the channels between circuits. Treatment in a boiling equimolar mixture of hydrazine and water produces pits 20 Á deep. A glass handle body is deposited on the apertured face and the other face ground to expose the pits, which process is facilitated by illuminating the handle body. Air isolation between circuits and between elements of a circuit is provided by appropriately masking with oxide and etching as before. Individual circuits are finally separated by scribing and fracturing the handle body and potted. Isolation of individual elements of a circuit by PN junctions and solid insulator are suggested alternatives. Other anisotropic etchants which require use of silicon carbide or nitride masking are mixtures of hydrazine, water, and propanol or catechol, and of potassium hydroxide, propanol, and water.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| GB61955/68A GB1281010A (en) | 1968-12-31 | 1968-12-31 | Improvements in and relating to methods of manufacturing semiconductor devices |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| GB61955/68A GB1281010A (en) | 1968-12-31 | 1968-12-31 | Improvements in and relating to methods of manufacturing semiconductor devices |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| GB1281010A true GB1281010A (en) | 1972-07-12 |
Family
ID=10487693
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| GB61955/68A Expired GB1281010A (en) | 1968-12-31 | 1968-12-31 | Improvements in and relating to methods of manufacturing semiconductor devices |
Country Status (1)
| Country | Link |
|---|---|
| GB (1) | GB1281010A (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4141135A (en) | 1975-10-14 | 1979-02-27 | Thomson-Csf | Semiconductor process using lapped substrate and lapped low resistivity semiconductor carrier |
| EP0022280A1 (en) * | 1979-07-04 | 1981-01-14 | BBC Aktiengesellschaft Brown, Boveri & Cie. | Process for the chemical etching of silicon substrates |
| US4351894A (en) | 1976-08-27 | 1982-09-28 | Tokyo Shibaura Electric Co., Ltd. | Method of manufacturing a semiconductor device using silicon carbide mask |
-
1968
- 1968-12-31 GB GB61955/68A patent/GB1281010A/en not_active Expired
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4141135A (en) | 1975-10-14 | 1979-02-27 | Thomson-Csf | Semiconductor process using lapped substrate and lapped low resistivity semiconductor carrier |
| US4351894A (en) | 1976-08-27 | 1982-09-28 | Tokyo Shibaura Electric Co., Ltd. | Method of manufacturing a semiconductor device using silicon carbide mask |
| EP0022280A1 (en) * | 1979-07-04 | 1981-01-14 | BBC Aktiengesellschaft Brown, Boveri & Cie. | Process for the chemical etching of silicon substrates |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| SE8103147L (en) | SELECTIVE IMPLANATION METHOD FOR CMOS-P WELLS | |
| JPS54161268A (en) | Method of manufacturing semiconductor device growing silicon layer on sapphire substrate | |
| GB1194159A (en) | Improvements relating to Integrated Circuits. | |
| US3938176A (en) | Process for fabricating dielectrically isolated semiconductor components of an integrated circuit | |
| US3783044A (en) | Photoresist keys and depth indicator | |
| GB1288941A (en) | ||
| GB1096484A (en) | Improvements in or relating to semiconductor circuits | |
| GB1281010A (en) | Improvements in and relating to methods of manufacturing semiconductor devices | |
| GB1487201A (en) | Method of manufacturing semi-conductor devices | |
| GB1066911A (en) | Semiconductor devices | |
| JPS56146247A (en) | Manufacture of semiconductor device | |
| JPS55154770A (en) | Manufacture of complementary mos semiconductor device | |
| JPS6457717A (en) | Manufacture of semiconductor device | |
| JPS5333590A (en) | Production of substrate for semiconductor integrated circuit | |
| GB1126338A (en) | A method of producing semiconductor bodies with an extremely low-resistance substrate | |
| JPS5723217A (en) | Manufacture of semiconductor device | |
| JPS5795633A (en) | Etching method | |
| GB1246022A (en) | Method of manufacturing semiconductor devices | |
| GB1334902A (en) | Control of beta gain factor of transistors | |
| JPS5527623A (en) | Semiconductor wafer dividing method | |
| JPS6428962A (en) | Semiconductor device and manufacture thereof | |
| JPS5243385A (en) | Process for production of semiconductor integrated circuit | |
| JPS6457641A (en) | Manufacture of semiconductor device | |
| KR970007111B1 (en) | Isoating method of integrated circuit | |
| JPS5325350A (en) | Dicing method of semiconductor substrates |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PS | Patent sealed [section 19, patents act 1949] | ||
| PLNP | Patent lapsed through nonpayment of renewal fees |