GB1280601A - Data processing systems - Google Patents
Data processing systemsInfo
- Publication number
- GB1280601A GB1280601A GB13170A GB13170A GB1280601A GB 1280601 A GB1280601 A GB 1280601A GB 13170 A GB13170 A GB 13170A GB 13170 A GB13170 A GB 13170A GB 1280601 A GB1280601 A GB 1280601A
- Authority
- GB
- United Kingdom
- Prior art keywords
- channel
- matrix
- interface
- switching
- units
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/40—Bus structure
- G06F13/4004—Coupling between buses
- G06F13/4022—Coupling between buses using switching circuits, e.g. switching matrix, connection or expansion network
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Mathematical Physics (AREA)
- Computer Hardware Design (AREA)
- General Physics & Mathematics (AREA)
- Use Of Switch Circuits For Exchanges And Methods Of Control Of Multiplex Exchanges (AREA)
- Exchange Systems With Centralized Control (AREA)
- Computer And Data Communications (AREA)
- Communication Control (AREA)
Abstract
1280601 Data processing INTERNATIONAL BUSINESS MACHINES CORP 1 Jan 1970 [13 Jan 1969 (2)] 131/70 Heading G4A A digital electric data processing system comprises three or more data processing units 16 and a switching matrix 20 for interconnecting requesting units, each unit having an interface, at least two interfaces having configuration control means, each means comprising a switch control unit for controlling the nodes of the matrix in response to demand and status signals from the processing units, a configuration control unit responsive to switching instructions from the processing units, and including means for interpreting switching instructions and means for sensing the configured state of the matrix. Apparatus.-Channel units 16 and their interfaces, each being connected to up to 256 devices, and interfaces 18 attached to control units 20 can be interconnected by the switch matrix 10, the cross points of which are referred to as nodes. The upper portion of the matrix performs the switching while the lower four planes of the matrix indicate the status of the nodes of the upper portion. Each interface has a switch control unit 12 which controls the nodes in response to demand and status signals from the channel units and a configuration control unit 14 which executes configuration commands received from the channel, controls the switch control unit, and senses the actual state of the upper portion of the matrix by way of the lower four planes. Each interface 18 has a latch which determines whether or not a channel can be connected to that interface and the latches are set, sensed and reset only in response to configuration commands. Each channel can sense whether an interface is reserved and, if so, to which channel and can cause resetting of latches. An interface can be exclusively connected to one channel, or to two channels, or to one channel but temporarily blocked. Parity checking is provided and if an interface malfunctions only the channel(s) with which it is associated are affected. Data transfer is in parallel and multiplexing is mentioned. Switching of the various interfaces can also be performed manually. In the switching matrix (Figs. 4 and 5, not shown), each node is a transistor crosspoint.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US79068169A | 1969-01-13 | 1969-01-13 | |
| US79068069A | 1969-01-13 | 1969-01-13 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| GB1280601A true GB1280601A (en) | 1972-07-05 |
Family
ID=27121061
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| GB13170A Expired GB1280601A (en) | 1969-01-13 | 1970-01-01 | Data processing systems |
Country Status (4)
| Country | Link |
|---|---|
| CH (1) | CH529381A (en) |
| FR (1) | FR2028182A1 (en) |
| GB (1) | GB1280601A (en) |
| SE (1) | SE351061B (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| GB2262169A (en) * | 1991-11-21 | 1993-06-09 | Scott John Charles Morgan | Storage and retrieval of information in electronic memory |
| CN116416889A (en) * | 2021-12-31 | 2023-07-11 | 格科微电子（上海）有限公司 | Method, device and chip for improving panel display effect |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE4414352C2 (en) * | 1994-04-25 | 1996-07-11 | Guinari Ricko Henri Dipl Ing | Device for processing data, in particular for capturing, controlling and / or regulating physical quantities |
-
1969
- 1969-12-22 FR FR6944485A patent/FR2028182A1/fr not_active Withdrawn
-
1970
- 1970-01-01 GB GB13170A patent/GB1280601A/en not_active Expired
- 1970-01-12 SE SE29470A patent/SE351061B/xx unknown
- 1970-01-13 CH CH37470A patent/CH529381A/en not_active IP Right Cessation
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| GB2262169A (en) * | 1991-11-21 | 1993-06-09 | Scott John Charles Morgan | Storage and retrieval of information in electronic memory |
| GB2262169B (en) * | 1991-11-21 | 1995-06-21 | Scott John Charles Morgan | Storage and retrieval of information in electronic memory |
| CN116416889A (en) * | 2021-12-31 | 2023-07-11 | 格科微电子（上海）有限公司 | Method, device and chip for improving panel display effect |
Also Published As
| Publication number | Publication date |
|---|---|
| DE2000930A1 (en) | 1970-07-30 |
| SE351061B (en) | 1972-11-13 |
| DE2000930B2 (en) | 1972-12-21 |
| FR2028182A1 (en) | 1970-10-09 |
| CH529381A (en) | 1972-10-15 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PS | Patent sealed | ||
| PCNP | Patent ceased through non-payment of renewal fee |