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GB1244013A - Fabrication of semiconductor devices - Google Patents

Fabrication of semiconductor devices

Info

Publication number
GB1244013A
GB1244013A GB46117/68A GB4611768A GB1244013A GB 1244013 A GB1244013 A GB 1244013A GB 46117/68 A GB46117/68 A GB 46117/68A GB 4611768 A GB4611768 A GB 4611768A GB 1244013 A GB1244013 A GB 1244013A
Authority
GB
United Kingdom
Prior art keywords
metal
layer
semi
insulation
silicon
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
GB46117/68A
Inventor
William Ernest Engeler
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
General Electric Co
Original Assignee
General Electric Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by General Electric Co filed Critical General Electric Co
Publication of GB1244013A publication Critical patent/GB1244013A/en
Expired legal-status Critical Current

Links

Classifications

    • H10W74/40—
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D99/00—Subject matter not provided for in other groups of this subclass
    • H10P95/00—

Landscapes

  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Junction Field-Effect Transistors (AREA)

Abstract

1,244,013. Semi-conductor devices; printed circuits; capacitors. GENERAL ELECTRIC CO. 27 Sept., 1968 [13 Oct., 1967], No. 46117/68. Headings H1K, H1M and H1R. The Specification relates to metal layers on passivated semi-conductor surfaces. A metal layer is formed over a layer of passivating insulation and is then enclosed by a second layer of insulation through which extends a means for making contact to the metal layer. The metal and the insulators are so chosen that the structure may if necessary be processed at, for example, normal inpurity diffusion temperatures without their mutual reaction. The metal may be tungsten or molybdenum, and the insulator may be silicon dioxide, silicon nitride, or silicon oxynitride. The semi-conductor substrate may be of silicon, germanium, or gallium arsenide. The buried metal film maybe the gate electrode of an IGFET or a cross-under connector for circuitry on the upper surface of the second insulating layer, or two superposed buried metal films separated by insulation may be provided to form a capacitor or transmission line. Processing details are given. Contact to the buried metal film is provided by deposited aluminium.
GB46117/68A 1967-10-13 1968-09-27 Fabrication of semiconductor devices Expired GB1244013A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US67522567A 1967-10-13 1967-10-13

Publications (1)

Publication Number Publication Date
GB1244013A true GB1244013A (en) 1971-08-25

Family

ID=24709560

Family Applications (1)

Application Number Title Priority Date Filing Date
GB46117/68A Expired GB1244013A (en) 1967-10-13 1968-09-27 Fabrication of semiconductor devices

Country Status (7)

Country Link
JP (1) JPS5334472B1 (en)
CH (1) CH493936A (en)
DE (2) DE1803025B2 (en)
FR (1) FR1587465A (en)
GB (1) GB1244013A (en)
NL (1) NL158323C (en)
SE (1) SE402503B (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8004088B2 (en) 2000-10-18 2011-08-23 Megica Corporation Post passivation interconnection schemes on top of IC chip

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2081248A1 (en) * 1970-03-23 1971-12-03 Sescosem Silicon intergrated circuits - with high parasitic mist threshold voltage by localized diffusion
JPS5193874A (en) * 1975-02-15 1976-08-17 Handotaisochino seizohoho
US4557036A (en) * 1982-03-31 1985-12-10 Nippon Telegraph & Telephone Public Corp. Semiconductor device and process for manufacturing the same
US4638400A (en) * 1985-10-24 1987-01-20 General Electric Company Refractory metal capacitor structures, particularly for analog integrated circuit devices

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8004088B2 (en) 2000-10-18 2011-08-23 Megica Corporation Post passivation interconnection schemes on top of IC chip
US8188603B2 (en) 2000-10-18 2012-05-29 Megica Corporation Post passivation interconnection schemes on top of IC chip
US8435883B2 (en) 2000-10-18 2013-05-07 Megica Corporation Post passivation interconnection schemes on top of IC chips
US8461686B2 (en) 2000-10-18 2013-06-11 Megica Corporation Post passivation interconnection schemes on top of IC chip
US8482127B2 (en) 2000-10-18 2013-07-09 Megica Corporation Post passivation interconnection schemes on top of IC chip
US8492900B2 (en) 2000-10-18 2013-07-23 Megica Corporation Post passivation interconnection schemes on top of IC chip

Also Published As

Publication number Publication date
DE1803025A1 (en) 1969-09-04
NL6814320A (en) 1969-04-15
FR1587465A (en) 1970-03-20
NL158323C (en) 1982-02-16
JPS5334472B1 (en) 1978-09-20
CH493936A (en) 1970-07-15
NL158323B (en) 1978-10-16
SE402503B (en) 1978-07-03
DE1803025B2 (en) 1972-06-15
DE6802214U (en) 1972-04-06

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