GB1108100A - Apparatus for the rapid demodulation of pal colour television signals - Google Patents

Abstract

1,108,100. Colour television. FERNSEH G.m.b.H. 26 Oct., 1966 [26 Oct., 1965], No. 48070/66. Heading H4F. A demodulator for PAL colour television signals which eleminates errors in colour saturation caused by fluctuations in phase of the chrominance carrier, comprises switches ES1 and ES2, Fig. 1 which are periodically opened and closed during alternate and opposite half-cycles of the chro minance sub-carrier frequency to pass the signals I<SP>1</SP> and Q<SP>1</SP>, obtained by adding and subtracting the colour sub-carriers of a pair of sue cessive lines, to respective rectifier means D11, D12 and D21, D22 each developing signals representing the positive and negative peak values of I<SP>1</SP> and Q<SP>1</SP> signals, and amplitude-sensitive devices e and f each arranged to pass only the applied signal, i.e. the demodulated I<SP>1</SP> or Q<SP>1</SP> signal, of greater amplitude to an output terminal. In this manner the I<SP>1</SP> and Q<SP>1</SP> signals are reproduced with the correct amplitude regardless of fluctuations in phase up to an error in phase of 90 degrees. The switching pulses which are supplied to the switches ESI and ES2 with a phase displaced by 0 degree/ 180 degrees and 90 degrees respectively are obtained from the chrominance sub-carrier oscillator (not shown) which is synchronized by the separated burst signal. The symbol 0 degree/ 180 degrees at switch ES1 is intended to indicate that the phase of this switch is changed from line to line because with PAL signals the I<SP>1</SP> signal is reversed by 180 degrees from line to line. Each amplitude-sensitive device may comprise a pair of like transistors (Tr1 Tr2, Fig. 3, not shown) having a common emittercoupling resistor, the signal from rectifier device D11, e.g. a point-contact semi-conductor rectifier, being applied to the base of transistor (Tr1 and the signal from rectifier D12 being applied after polarity inversion (g) to the base of transistor (Tr2), the signals appearing across the collector load of each transistor being combined (h) after the signal from transistor (Tr2) has been inverted (k). The reversal of sign by the phase-inverting network (g, Fig. 3, not shown) may be effected before the rectifier D12, Fig. 5, not shown, or before the switch ES1, the switch ES1 then taking the form of a simultaneously actuated double-pole switch, Fig. 6, not shown. Alternatively a double-pole switch may be positioned in front of rectifiers D11 and D12, the switch contacts being out of phase, Fig. 7, not shown. In a further embodiment of an emplitude-sensitive device a Schmitt trigger is used, Fig. 4, not shown.