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GB1164591A - mprovements in Metallization of Insulating Substrates - Google Patents

mprovements in Metallization of Insulating Substrates

Info

Publication number
GB1164591A
GB1164591A GB40968A GB40968A GB1164591A GB 1164591 A GB1164591 A GB 1164591A GB 40968 A GB40968 A GB 40968A GB 40968 A GB40968 A GB 40968A GB 1164591 A GB1164591 A GB 1164591A
Authority
GB
United Kingdom
Prior art keywords
substrate
filler
deposition
metal
mask
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
GB40968A
Inventor
Frederick W Schneble
Joseph Polichette
Edward John Leech
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Kollmorgen Corp
Original Assignee
Photocircuits Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Photocircuits Corp filed Critical Photocircuits Corp
Priority to GB40968A priority Critical patent/GB1164591A/en
Publication of GB1164591A publication Critical patent/GB1164591A/en
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/40Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/42Plated through-holes or plated via connections
    • H05K3/422Plated through-holes or plated via connections characterised by electroless plating method; pretreatment therefor
    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C18/00Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating
    • C23C18/16Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating by reduction or substitution, e.g. electroless plating
    • C23C18/18Pretreatment of the material to be coated
    • C23C18/20Pretreatment of the material to be coated of organic surfaces, e.g. resins
    • C23C18/2006Pretreatment of the material to be coated of organic surfaces, e.g. resins by other methods than those of C23C18/22 - C23C18/30
    • C23C18/2046Pretreatment of the material to be coated of organic surfaces, e.g. resins by other methods than those of C23C18/22 - C23C18/30 by chemical pretreatment
    • C23C18/2073Multistep pretreatment
    • C23C18/2086Multistep pretreatment with use of organic or inorganic compounds other than metals, first
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/03Use of materials for the substrate
    • H05K1/0313Organic insulating material
    • H05K1/0353Organic insulating material consisting of two or more materials, e.g. two or more polymers, polymer + filler, + reinforcement
    • H05K1/0373Organic insulating material consisting of two or more materials, e.g. two or more polymers, polymer + filler, + reinforcement containing additives, e.g. fillers
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/02Fillers; Particles; Fibers; Reinforcement materials
    • H05K2201/0203Fillers and particles
    • H05K2201/0206Materials
    • H05K2201/0209Inorganic, non-metallic particles
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/02Fillers; Particles; Fibers; Reinforcement materials
    • H05K2201/0203Fillers and particles
    • H05K2201/0206Materials
    • H05K2201/0236Plating catalyst as filler in insulating material
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/12Using specific substances
    • H05K2203/122Organic non-polymeric compounds, e.g. oil, wax or thiol
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/10Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
    • H05K3/18Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using precipitation techniques to apply the conductive material
    • H05K3/181Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using precipitation techniques to apply the conductive material by electroless plating
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/38Improvement of the adhesion between the insulating substrate and the metal
    • H05K3/386Improvement of the adhesion between the insulating substrate and the metal by the use of an organic polymeric bonding layer, e.g. adhesive
    • H05K3/387Improvement of the adhesion between the insulating substrate and the metal by the use of an organic polymeric bonding layer, e.g. adhesive for electroless plating
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/40Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/42Plated through-holes or plated via connections
    • H05K3/425Plated through-holes or plated via connections characterised by the sequence of steps for plating the through-holes or via connections in relation to the conductive pattern
    • H05K3/427Plated through-holes or plated via connections characterised by the sequence of steps for plating the through-holes or via connections in relation to the conductive pattern initial plating of through-holes in metal-clad substrates

Landscapes

  • Chemical & Material Sciences (AREA)
  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • General Chemical & Material Sciences (AREA)
  • Materials Engineering (AREA)
  • Mechanical Engineering (AREA)
  • Metallurgy (AREA)
  • Organic Chemistry (AREA)
  • Inorganic Chemistry (AREA)
  • Manufacturing & Machinery (AREA)
  • Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
  • Non-Metallic Protective Coatings For Printed Circuits (AREA)

Abstract

1,164,591. Printed circuits. PHOTOCIRCUITS CORP. 3 Jan., 1968, No. 409/68. Heading H1R. [Also in Divisions C1, C3 and C7] Printed circuits are obtained from blanks plated by electroless deposition of metal on a substrate wherein the substrates have been rendered catalytic to such deposition by incorporating a filler comprising inert, solid finely divided particles coated with a cationic wetting agent and a Group IB or VIII metal, e.g. Pd, Au or Ag. The filler may be incorporated by mixing with the other components of the substrate, e.g.resin, prior to formation thereof, or by impregnating after formation or by coating with an ink or an adhesive including the filler, on one or both sides of the substrate. The catalytic filler may not be uniformly dispersed in or on the substrate; thus the external or internal surfaces or the sides of holes drilled through the substrate may or may not be catalytic. The substrates may be separately coated by vapour deposition or electroless deposition with a metal film or foil prior to electroless deposition according to the invention. A further electrolytic deposition may be carried out after the electroless deposition. The production of single and multi-layer printed circuit wiring boards is described including the use of resin masks and subsequent etching by spraying with or immersing in the etchant, e.g. FeCl 3 or NH 4 persulphate. A series of drawings are provided illustrating these techniques, a typical example comprising (a) initially metal coating, (b) covering with a resin mask, (c) drilling a hole through the substrate, (d) further coating those areas not covered by the mask and the sides of the hole, (e) dissolving the resin mask, and (f) etching away the initial layer of metal covered by the mask.
GB40968A 1968-01-03 1968-01-03 mprovements in Metallization of Insulating Substrates Expired GB1164591A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
GB40968A GB1164591A (en) 1968-01-03 1968-01-03 mprovements in Metallization of Insulating Substrates

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GB40968A GB1164591A (en) 1968-01-03 1968-01-03 mprovements in Metallization of Insulating Substrates

Publications (1)

Publication Number Publication Date
GB1164591A true GB1164591A (en) 1969-09-17

Family

ID=9703871

Family Applications (1)

Application Number Title Priority Date Filing Date
GB40968A Expired GB1164591A (en) 1968-01-03 1968-01-03 mprovements in Metallization of Insulating Substrates

Country Status (1)

Country Link
GB (1) GB1164591A (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2000197A (en) * 1977-06-24 1979-01-04 Preh Gmbh W Method of producing a solderable conductive layer on a substrate
US4281038A (en) 1978-12-16 1981-07-28 Preh, Elektrofeinmechanische Werke, Jakob Preh Nachf Gmbh & Co. Non-conductive substrate for a printed circuit and method of manufacture
US4685210A (en) * 1985-03-13 1987-08-11 The Boeing Company Multi-layer circuit board bonding method utilizing noble metal coated surfaces
CN110785018A (en) * 2018-07-31 2020-02-11 精工爱普生株式会社 Wiring board and manufacturing method of wiring board
EP3539362A4 (en) * 2016-11-12 2020-07-15 Catlam LLC WAFER INTEGRATION IN AN INTEGRATED CIRCUIT WITH CATALYTIC COATING OR ADHESIVE

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2000197A (en) * 1977-06-24 1979-01-04 Preh Gmbh W Method of producing a solderable conductive layer on a substrate
GB2000197B (en) * 1977-06-24 1982-03-17 Preh Elektrofeinmechanische Werke Jakob Preh Nachf Gmbh Co Method of producing a solderable conductive layer on a substrate
US4281038A (en) 1978-12-16 1981-07-28 Preh, Elektrofeinmechanische Werke, Jakob Preh Nachf Gmbh & Co. Non-conductive substrate for a printed circuit and method of manufacture
US4685210A (en) * 1985-03-13 1987-08-11 The Boeing Company Multi-layer circuit board bonding method utilizing noble metal coated surfaces
EP3539362A4 (en) * 2016-11-12 2020-07-15 Catlam LLC WAFER INTEGRATION IN AN INTEGRATED CIRCUIT WITH CATALYTIC COATING OR ADHESIVE
CN110785018A (en) * 2018-07-31 2020-02-11 精工爱普生株式会社 Wiring board and manufacturing method of wiring board

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Legal Events

Date Code Title Description
PS Patent sealed
PCNP Patent ceased through non-payment of renewal fee