GB1154092A - Improvements in or relating to Digital-to-Analogue Signal Converters. - Google Patents

Abstract

1,154,092. Digital/analogue converters. MARCONI CO. Ltd. 22 Feb., 1968 [4 May, 1967], No. 20873/67. Heading G4H. Clock pulses on parallel leads, the width of the pulses being in binary relationship are applied to gates d, c, b, a (Fig. 1) to which are also fed binary coded input signals, the output signals from the gates being combined to give either a width modulated output pulse or a series of pulses, the sum of the widths of which represents the input signal. The output signal may be applied to an averaging network AN which gives a signal, the magnitude of which represents the digital input. The gates may be AND gates (Fig. 1) their outputs being combined in an OR gate or NOR gates (Fig. 2, not shown) in which case the digital input signals are fed in via inverters. Alternatively (Fig. 4, not shown) NAND gates may be Used, the outputs from which are combined in a further NAND gate. The clock pulses are derived from divider circuits A, B, C, D (Fig. 1).