GB0110059D0 - Clock Distribution circuit - Google Patents
Clock Distribution circuitInfo
- Publication number
- GB0110059D0 GB0110059D0 GB0110059A GB0110059A GB0110059D0 GB 0110059 D0 GB0110059 D0 GB 0110059D0 GB 0110059 A GB0110059 A GB 0110059A GB 0110059 A GB0110059 A GB 0110059A GB 0110059 D0 GB0110059 D0 GB 0110059D0
- Authority
- GB
- United Kingdom
- Prior art keywords
- distribution circuit
- clock distribution
- clock
- circuit
- distribution
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/04—Generating or distributing clock signals or signals derived directly therefrom
- G06F1/10—Distribution of clock signals, e.g. skew
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L7/00—Arrangements for synchronising receiver with transmitter
- H04L7/0008—Synchronisation information channels, e.g. clock distribution lines
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L7/00—Arrangements for synchronising receiver with transmitter
- H04L7/02—Speed or phase control by the received code signals, the signals containing no special synchronisation information
- H04L7/027—Speed or phase control by the received code signals, the signals containing no special synchronisation information extracting the synchronising or clock signal from the received signal spectrum, e.g. by using a resonant or bandpass circuit
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Amplifiers (AREA)
- Inductance-Capacitance Distribution Constants And Capacitance-Resistance Oscillators (AREA)
- Oscillators With Electromechanical Resonators (AREA)
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| GB0110059A GB2374952A (en) | 2001-04-24 | 2001-04-24 | Resonant clock distribution circuit |
| PCT/GB2002/001324 WO2002086686A1 (en) | 2001-04-24 | 2002-03-21 | Clock distribution circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| GB0110059A GB2374952A (en) | 2001-04-24 | 2001-04-24 | Resonant clock distribution circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| GB0110059D0 true GB0110059D0 (en) | 2001-06-13 |
| GB2374952A GB2374952A (en) | 2002-10-30 |
Family
ID=9913377
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| GB0110059A Withdrawn GB2374952A (en) | 2001-04-24 | 2001-04-24 | Resonant clock distribution circuit |
Country Status (2)
| Country | Link |
|---|---|
| GB (1) | GB2374952A (en) |
| WO (1) | WO2002086686A1 (en) |
Families Citing this family (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE10312497A1 (en) * | 2003-03-17 | 2004-10-07 | Infineon Technologies Ag | Synchronization signal generation device for electronic system e.g. memory module of computer or telephone, using resonator device for determining frequency of synchronization signal |
| US8710936B2 (en) | 2009-08-05 | 2014-04-29 | Apple Inc. | Resonant oscillator with start up and shut down circuitry |
| US8085103B2 (en) | 2009-08-05 | 2011-12-27 | Apple Inc. | Resonant oscillator circuit with reduced startup transients |
| US8320141B2 (en) * | 2009-08-05 | 2012-11-27 | Apple Inc. | High-efficiency, switched-capacitor power conversion using a resonant clocking circuit to produce gate drive signals for switching capacitors |
| US8933665B2 (en) | 2009-08-05 | 2015-01-13 | Apple Inc. | Balancing voltages between battery banks |
| US8541999B2 (en) | 2009-08-05 | 2013-09-24 | Apple Inc. | Controlling power loss in a switched-capacitor power converter |
Family Cites Families (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| NL8901033A (en) * | 1989-04-25 | 1990-11-16 | Philips Nv | CONTROL CIRCUIT FOR AT LEAST ONE CLOCK ELECTRODE OF AN INTEGRATED CIRCUIT. |
| GB9226522D0 (en) * | 1992-12-19 | 1993-02-10 | Harvey Geoffrey P | Power saving electronic logic circuit |
| JPH1197627A (en) * | 1997-09-18 | 1999-04-09 | Hitachi Ltd | Semiconductor integrated circuit and electronic device using the same |
| US6098176A (en) * | 1998-01-30 | 2000-08-01 | International Business Machines Corporation | Sinusoidal clock signal distribution using resonant transmission lines |
| US6052012A (en) * | 1998-06-29 | 2000-04-18 | Cisco Technology, Inc. | Method and apparatus for clock uncertainly minimization |
-
2001
- 2001-04-24 GB GB0110059A patent/GB2374952A/en not_active Withdrawn
-
2002
- 2002-03-21 WO PCT/GB2002/001324 patent/WO2002086686A1/en not_active Ceased
Also Published As
| Publication number | Publication date |
|---|---|
| WO2002086686A1 (en) | 2002-10-31 |
| GB2374952A (en) | 2002-10-30 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| WAP | Application withdrawn, taken to be withdrawn or refused ** after publication under section 16(1) |