[go: up one dir, main page]

FR3093571B1 - Procédé et dispositif de représentation en virgule flottante avec précision variable - Google Patents

Procédé et dispositif de représentation en virgule flottante avec précision variable Download PDF

Info

Publication number
FR3093571B1
FR3093571B1 FR1902386A FR1902386A FR3093571B1 FR 3093571 B1 FR3093571 B1 FR 3093571B1 FR 1902386 A FR1902386 A FR 1902386A FR 1902386 A FR1902386 A FR 1902386A FR 3093571 B1 FR3093571 B1 FR 3093571B1
Authority
FR
France
Prior art keywords
floating point
representation
variable precision
memory
floating
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
FR1902386A
Other languages
English (en)
Other versions
FR3093571A1 (fr
Inventor
Andréa Bocco
De Dinechin Florent Dupont
Yves Durand
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Commissariat a lEnergie Atomique et aux Energies Alternatives CEA
Original Assignee
Commissariat a lEnergie Atomique CEA
Commissariat a lEnergie Atomique et aux Energies Alternatives CEA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Commissariat a lEnergie Atomique CEA, Commissariat a lEnergie Atomique et aux Energies Alternatives CEA filed Critical Commissariat a lEnergie Atomique CEA
Priority to FR1902386A priority Critical patent/FR3093571B1/fr
Priority to ES20161056T priority patent/ES2957432T3/es
Priority to EP20161056.5A priority patent/EP3706004B1/fr
Priority to US16/811,641 priority patent/US11461095B2/en
Publication of FR3093571A1 publication Critical patent/FR3093571A1/fr
Application granted granted Critical
Publication of FR3093571B1 publication Critical patent/FR3093571B1/fr
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/04Addressing variable-length words or parts of words
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003Arrangements for executing specific machine instructions
    • G06F9/30007Arrangements for executing specific machine instructions to perform operations on data operands
    • G06F9/3001Arithmetic instructions
    • G06F9/30014Arithmetic instructions with variable precision
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/483Computations with numbers represented by a non-linear combination of denominational numbers, e.g. rational numbers, logarithmic number system or floating-point numbers
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/499Denomination or exception handling, e.g. rounding or overflow
    • G06F7/49905Exception handling
    • G06F7/4991Overflow or underflow
    • G06F7/49915Mantissa overflow or underflow in handling floating-point numbers
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30098Register arrangements
    • G06F9/30105Register structure
    • G06F9/30112Register structure comprising data of variable length
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2207/00Indexing scheme relating to methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F2207/38Indexing scheme relating to groups G06F7/38 - G06F7/575
    • G06F2207/3804Details
    • G06F2207/3808Details concerning the type of numbers or the way they are handled
    • G06F2207/3812Devices capable of handling different types of numbers
    • G06F2207/3816Accepting numbers of variable word length
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/10Providing a specific technical effect
    • G06F2212/1016Performance improvement
    • G06F2212/1024Latency reduction
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/10Providing a specific technical effect
    • G06F2212/1041Resource optimization
    • G06F2212/1044Space efficiency improvement
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M7/00Conversion of a code where information is represented by a given sequence or number of digits to a code where the same, similar or subset of information is represented by a different sequence or number of digits
    • H03M7/14Conversion to or from non-weighted codes
    • H03M7/24Conversion to or from floating-point codes

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Software Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Computational Mathematics (AREA)
  • Mathematical Analysis (AREA)
  • Mathematical Optimization (AREA)
  • Pure & Applied Mathematics (AREA)
  • Computing Systems (AREA)
  • Nonlinear Science (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
  • Complex Calculations (AREA)
  • Oscillators With Electromechanical Resonators (AREA)

Abstract

PROCÉDÉ ET DISPOSITIF DE REPRÉSENTATION EN VIRGULE FLOTTANTE AVEC PRÉCISION VARIABLE La présente description concerne un procédé de mémorisation, par un circuit de chargement et de stockage ou par d’autres moyens de traitement, d’une valeur en virgule flottante à précision variable à une adresse mémoire d’une mémoire, le procédé comprenant : réduire la longueur en bits de la valeur en virgule flottante à précision variable à pas plus qu’une limite de taille ; et mémoriser la valeur en virgule flottante à précision variable dans l’une d’une pluralité de zones de stockage dans la mémoire, chacune de la pluralité de zones de stockage comportant un espace de stockage égal ou supérieur à la limite de taille (MBB). Figure pour l’abrégé : Fig. 8
FR1902386A 2019-03-08 2019-03-08 Procédé et dispositif de représentation en virgule flottante avec précision variable Expired - Fee Related FR3093571B1 (fr)

Priority Applications (4)

Application Number Priority Date Filing Date Title
FR1902386A FR3093571B1 (fr) 2019-03-08 2019-03-08 Procédé et dispositif de représentation en virgule flottante avec précision variable
ES20161056T ES2957432T3 (es) 2019-03-08 2020-03-04 Método y dispositivo para representación en coma flotante con precisión variable
EP20161056.5A EP3706004B1 (fr) 2019-03-08 2020-03-04 Procédé et dispositif de représentation à virgule flottante avec une précision variable
US16/811,641 US11461095B2 (en) 2019-03-08 2020-03-06 Method and device for floating point representation with variable precision

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
FR1902386 2019-03-08
FR1902386A FR3093571B1 (fr) 2019-03-08 2019-03-08 Procédé et dispositif de représentation en virgule flottante avec précision variable

Publications (2)

Publication Number Publication Date
FR3093571A1 FR3093571A1 (fr) 2020-09-11
FR3093571B1 true FR3093571B1 (fr) 2021-03-19

Family

ID=67999727

Family Applications (1)

Application Number Title Priority Date Filing Date
FR1902386A Expired - Fee Related FR3093571B1 (fr) 2019-03-08 2019-03-08 Procédé et dispositif de représentation en virgule flottante avec précision variable

Country Status (4)

Country Link
US (1) US11461095B2 (fr)
EP (1) EP3706004B1 (fr)
ES (1) ES2957432T3 (fr)
FR (1) FR3093571B1 (fr)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111008230B (zh) * 2019-11-22 2023-08-04 远景智能国际私人投资有限公司 数据存储方法、装置、计算机设备及存储介质
US11928509B2 (en) * 2021-01-07 2024-03-12 Micron Technology, Inc. Memory system workload allocation
US20230098421A1 (en) * 2021-09-30 2023-03-30 Advanced Micro Devices, Inc. Method and apparatus of dynamically controlling approximation of floating-point arithmetic operations
CN116841500A (zh) * 2022-03-24 2023-10-03 华为技术有限公司 一种浮点数的处理方法及相关设备
FR3136572B1 (fr) 2022-06-10 2024-11-08 Commissariat Energie Atomique Procédé et dispositif pour calculer avec une précision variable
FR3136571B1 (fr) 2022-06-10 2024-04-26 Commissariat Energie Atomique Procédé et dispositif pour arrondir dans un calcul à précision variable
CN118069026A (zh) * 2022-11-22 2024-05-24 华为技术有限公司 一种数据处理方法及装置

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6496920B1 (en) * 1998-03-18 2002-12-17 Qiuzhen Zou Digital signal processor having multiple access registers
US8412760B2 (en) * 2008-07-22 2013-04-02 International Business Machines Corporation Dynamic range adjusting floating point execution unit
US20110004644A1 (en) * 2009-07-03 2011-01-06 Via Technologies, Inc. Dynamic floating point register precision control
US9916130B2 (en) * 2014-11-03 2018-03-13 Arm Limited Apparatus and method for vector processing
US9582413B2 (en) * 2014-12-04 2017-02-28 International Business Machines Corporation Alignment based block concurrency for accessing memory
US9660666B1 (en) * 2014-12-22 2017-05-23 EMC IP Holding Company LLC Content-aware lossless compression and decompression of floating point data
US9817662B2 (en) * 2015-10-24 2017-11-14 Alan A Jorgensen Apparatus for calculating and retaining a bound on error during floating point operations and methods thereof
CN107766078A (zh) * 2016-08-15 2018-03-06 法乐第(北京)网络科技有限公司 变量值存储方法、读取方法、操作执行方法及装置
US9912957B1 (en) * 2017-04-01 2018-03-06 Intel Corporation Lossless compression for multisample render targets alongside fragment compression

Also Published As

Publication number Publication date
EP3706004B1 (fr) 2023-07-19
FR3093571A1 (fr) 2020-09-11
US20200285468A1 (en) 2020-09-10
ES2957432T3 (es) 2024-01-18
EP3706004A1 (fr) 2020-09-09
US11461095B2 (en) 2022-10-04

Similar Documents

Publication Publication Date Title
FR3093571B1 (fr) Procédé et dispositif de représentation en virgule flottante avec précision variable
US11055360B2 (en) Data write-in method and apparatus in a distributed file system
WO2018015848A3 (fr) Recherche de k valeurs extrêmes pendant une durée de traitement constante
US20150120987A1 (en) Apparatuses and methods for identifying an extremum value stored in an array of memory cells
US9858983B2 (en) Memory device having latency control circuit for controlling data write and read latency
CN113032007B (zh) 一种数据处理方法及装置
GB2580559A (en) Inclusion dependency determination in a large database for establishing primary key-foreign key relationships
WO2016137716A3 (fr) Codage de données sur un seul niveau et stockage cellulaire multi-niveau variable
WO2015108534A1 (fr) Analyse de données de journal sur la base d'un filtre de bloom
CN111368506B (zh) 文本处理方法及装置
US10942736B2 (en) Method for min-max computation in associative memory
US11955178B2 (en) Information processing apparatus and memory system
US9477546B2 (en) Methods and apparatus for optimizing lifespan of a storage device
KR20230021949A (ko) 메모리 장치 및 이의 동작 방법
US20160103620A1 (en) Symbol lock method and a memory system using the same
WO2022017167A1 (fr) Procédé et système de traitement d'informations, dispositif électronique et support de stockage
CN117742594A (zh) 数据存储方法及装置、电子设备和存储介质
US20230100328A1 (en) Delta predictions for page scheduling
US9620239B2 (en) Memory array and operation method for memory device, including data inversion
JP2013235620A5 (fr)
FR3100347B1 (fr) Détection d'erreurs
TWI633435B (zh) 避免讀取擾動的資料搬移方法以及使用該方法的裝置
CN104200847A (zh) 存储器地址的测试方法及测试装置
FR3100346B1 (fr) Détection d'erreurs
US20180350428A1 (en) Semiconductor device and method of driving the same

Legal Events

Date Code Title Description
PLFP Fee payment

Year of fee payment: 2

PLSC Publication of the preliminary search report

Effective date: 20200911

PLFP Fee payment

Year of fee payment: 3

PLFP Fee payment

Year of fee payment: 4

PLFP Fee payment

Year of fee payment: 5

PLFP Fee payment

Year of fee payment: 6

ST Notification of lapse

Effective date: 20251106