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FR3091621B1 - Procede de mise en courbure collective d’un ensemble de puces electroniques - Google Patents

Procede de mise en courbure collective d’un ensemble de puces electroniques Download PDF

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Publication number
FR3091621B1
FR3091621B1 FR1900099A FR1900099A FR3091621B1 FR 3091621 B1 FR3091621 B1 FR 3091621B1 FR 1900099 A FR1900099 A FR 1900099A FR 1900099 A FR1900099 A FR 1900099A FR 3091621 B1 FR3091621 B1 FR 3091621B1
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FR
France
Prior art keywords
cte
stack
electronic chips
collective
burning process
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
FR1900099A
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English (en)
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FR3091621A1 (fr
Inventor
Bertrand Chambion
Jean-Philippe Colonna
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Commissariat a lEnergie Atomique et aux Energies Alternatives CEA
Original Assignee
Commissariat a lEnergie Atomique CEA
Commissariat a lEnergie Atomique et aux Energies Alternatives CEA
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Application filed by Commissariat a lEnergie Atomique CEA, Commissariat a lEnergie Atomique et aux Energies Alternatives CEA filed Critical Commissariat a lEnergie Atomique CEA
Priority to FR1900099A priority Critical patent/FR3091621B1/fr
Priority to PCT/FR2020/050005 priority patent/WO2020141286A1/fr
Publication of FR3091621A1 publication Critical patent/FR3091621A1/fr
Application granted granted Critical
Publication of FR3091621B1 publication Critical patent/FR3091621B1/fr
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

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Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
    • H10F39/00—Integrated devices, or assemblies of multiple devices, comprising at least one element covered by group H10F30/00, e.g. radiation detectors comprising photodiode arrays
    • H10F39/011—Manufacture or treatment of image sensors covered by group H10F39/12
    • H10F39/026—Wafer-level processing
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
    • H10F39/00—Integrated devices, or assemblies of multiple devices, comprising at least one element covered by group H10F30/00, e.g. radiation detectors comprising photodiode arrays
    • H10F39/80—Constructional details of image sensors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
    • H10F39/00—Integrated devices, or assemblies of multiple devices, comprising at least one element covered by group H10F30/00, e.g. radiation detectors comprising photodiode arrays
    • H10F39/80—Constructional details of image sensors
    • H10F39/804—Containers or encapsulations

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  • Solid State Image Pick-Up Elements (AREA)
  • Electroluminescent Light Sources (AREA)

Abstract

Ce procédé comportant les étapes : a) prévoir l’ensemble de puces électroniques (P), comportant : - un empilement comprenant : une première couche (1), comprenant des première et seconde surfaces (10, 11) opposées, un ensemble de matrices de pixels (2), formé à la première surface (10) ; l’empilement possédant une première épaisseur et un premier CTE ; - un matériau (4), possédant une seconde épaisseur, un second CTE strictement supérieur au premier CTE, et une température de formation, le matériau (4) étant formé sur l’empilement de manière à épouser le contour des matrices de pixels (2) ; b) découper les puces électroniques (P) ; la température de formation, le ratio entre les premier et second CTE et le ratio entre les première et seconde épaisseurs étant adaptés de sorte qu’à l’issue de l’étape b), l’empilement est incurvé selon une forme concave prédéterminée, orientée vers le matériau (4), à une température de fonctionnement donnée de la puce électronique (P). Figure s 1a-1j
FR1900099A 2019-01-04 2019-01-04 Procede de mise en courbure collective d’un ensemble de puces electroniques Expired - Fee Related FR3091621B1 (fr)

Priority Applications (2)

Application Number Priority Date Filing Date Title
FR1900099A FR3091621B1 (fr) 2019-01-04 2019-01-04 Procede de mise en courbure collective d’un ensemble de puces electroniques
PCT/FR2020/050005 WO2020141286A1 (fr) 2019-01-04 2020-01-03 Procede de mise en courbure collective d'un ensemble de puces electroniques

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR1900099A FR3091621B1 (fr) 2019-01-04 2019-01-04 Procede de mise en courbure collective d’un ensemble de puces electroniques

Publications (2)

Publication Number Publication Date
FR3091621A1 FR3091621A1 (fr) 2020-07-10
FR3091621B1 true FR3091621B1 (fr) 2020-12-11

Family

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Family Applications (1)

Application Number Title Priority Date Filing Date
FR1900099A Expired - Fee Related FR3091621B1 (fr) 2019-01-04 2019-01-04 Procede de mise en courbure collective d’un ensemble de puces electroniques

Country Status (2)

Country Link
FR (1) FR3091621B1 (fr)
WO (1) WO2020141286A1 (fr)

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7397066B2 (en) 2004-08-19 2008-07-08 Micron Technology, Inc. Microelectronic imagers with curved image sensors and methods for manufacturing microelectronic imagers
US7190039B2 (en) * 2005-02-18 2007-03-13 Micron Technology, Inc. Microelectronic imagers with shaped image sensors and methods for manufacturing microelectronic imagers
JP5724322B2 (ja) * 2010-11-24 2015-05-27 ソニー株式会社 固体撮像装置の製造方法
DE102015216619B4 (de) 2015-08-31 2017-08-10 Disco Corporation Verfahren zum Bearbeiten eines Wafers
WO2018184572A1 (fr) * 2017-04-07 2018-10-11 宁波舜宇光电信息有限公司 Procédé d'encapsulation de semi-conducteur à base de technique de moulage et dispositif à semi-conducteur

Also Published As

Publication number Publication date
WO2020141286A1 (fr) 2020-07-09
FR3091621A1 (fr) 2020-07-10

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