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FR3077925B1 - Circuit integre tridimensionnel face a face de structure simplifiee - Google Patents

Circuit integre tridimensionnel face a face de structure simplifiee Download PDF

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Publication number
FR3077925B1
FR3077925B1 FR1851255A FR1851255A FR3077925B1 FR 3077925 B1 FR3077925 B1 FR 3077925B1 FR 1851255 A FR1851255 A FR 1851255A FR 1851255 A FR1851255 A FR 1851255A FR 3077925 B1 FR3077925 B1 FR 3077925B1
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FR
France
Prior art keywords
face
integrated circuit
chip
line
simplified structure
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Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
FR1851255A
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English (en)
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FR3077925A1 (fr
Inventor
Didier Lattard
Sebastien Thuries
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Commissariat a lEnergie Atomique et aux Energies Alternatives CEA
Original Assignee
Commissariat a lEnergie Atomique CEA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Application filed by Commissariat a lEnergie Atomique CEA filed Critical Commissariat a lEnergie Atomique CEA
Priority to FR1851255A priority Critical patent/FR3077925B1/fr
Priority to US16/268,764 priority patent/US10777537B2/en
Publication of FR3077925A1 publication Critical patent/FR3077925A1/fr
Application granted granted Critical
Publication of FR3077925B1 publication Critical patent/FR3077925B1/fr
Active legal-status Critical Current
Anticipated expiration legal-status Critical

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Classifications

    • H10W90/00—
    • H10W20/427—
    • H10W70/635—
    • H10W72/90—
    • H10W80/161—
    • H10W80/301—
    • H10W90/20—
    • H10W90/288—
    • H10W90/291—
    • H10W90/297—
    • H10W90/722—
    • H10W90/724—
    • H10W90/754—

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Manufacturing & Machinery (AREA)
  • Geometry (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)

Abstract

L'invention concerne un circuit intégré (9) comprenant : -une première puce (1) comportant un empilement d'un substrat (100), d'une couche d'interconnexion de début de ligne (101) et de couches d'interconnexion de fin de ligne (111-117) ; -une deuxième puce (2) comportant un empilement d'un substrat (200), d'une couche d'interconnexion de début de ligne (201) et de couches d'interconnexion de fin de ligne (211-216) ; -un réseau d'interconnexion (3) des première et deuxième puces. -la couche d'interconnexion de fin de ligne (118) de niveau de métallisation le plus élevé de la première puce (1) inclut un réseau de distribution de puissance ; -la couche d'interconnexion de fin de ligne (216) de niveau de métallisation le plus élevé de la deuxième puce (2) est dépourvue de réseau de distribution de puissance.
FR1851255A 2018-02-14 2018-02-14 Circuit integre tridimensionnel face a face de structure simplifiee Active FR3077925B1 (fr)

Priority Applications (2)

Application Number Priority Date Filing Date Title
FR1851255A FR3077925B1 (fr) 2018-02-14 2018-02-14 Circuit integre tridimensionnel face a face de structure simplifiee
US16/268,764 US10777537B2 (en) 2018-02-14 2019-02-06 Face-to-face three-dimensional integrated circuit of simplified structure

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
FR1851255 2018-02-14
FR1851255A FR3077925B1 (fr) 2018-02-14 2018-02-14 Circuit integre tridimensionnel face a face de structure simplifiee

Publications (2)

Publication Number Publication Date
FR3077925A1 FR3077925A1 (fr) 2019-08-16
FR3077925B1 true FR3077925B1 (fr) 2021-06-18

Family

ID=62455658

Family Applications (1)

Application Number Title Priority Date Filing Date
FR1851255A Active FR3077925B1 (fr) 2018-02-14 2018-02-14 Circuit integre tridimensionnel face a face de structure simplifiee

Country Status (2)

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US (1) US10777537B2 (fr)
FR (1) FR3077925B1 (fr)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP7307355B2 (ja) 2018-09-28 2023-07-12 株式会社ソシオネクスト 半導体集積回路装置および半導体パッケージ構造
CN113470578B (zh) * 2020-03-31 2022-06-17 北京小米移动软件有限公司 显示驱动模组、显示面板和电子设备
DE102021104688A1 (de) * 2020-04-30 2021-11-04 Taiwan Semiconductor Manufacturing Co., Ltd. Stromverteilungsstruktur und verfahren
US12255148B2 (en) * 2020-04-30 2025-03-18 Taiwan Semiconductor Manufacturing Company, Ltd. Power distribution structure and method
KR20220057116A (ko) 2020-10-29 2022-05-09 삼성전자주식회사 반도체 패키지

Family Cites Families (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2004158524A (ja) * 2002-11-05 2004-06-03 Sony Corp 半導体素子および素子配線方法
WO2005122257A1 (fr) * 2004-06-07 2005-12-22 Fujitsu Limited Composant à semiconducteur incorporant un condensateur et procédé de fabrication de celui-ci
JP2007134468A (ja) * 2005-11-10 2007-05-31 Kawasaki Microelectronics Kk 半導体集積回路
JP2007173760A (ja) * 2005-11-25 2007-07-05 Matsushita Electric Ind Co Ltd 半導体集積回路及びその設計方法
JP5084380B2 (ja) * 2007-07-17 2012-11-28 株式会社東芝 半導体設計装置および半導体回路
JP4967164B2 (ja) * 2008-03-19 2012-07-04 Ｎｅｃインフロンティア株式会社 多層プリント配線板及びそれを用いた電子機器
KR101024241B1 (ko) * 2008-12-26 2011-03-29 주식회사 하이닉스반도체 반도체 장치 및 그를 포함하는 반도체 패키지
US8344512B2 (en) * 2009-08-20 2013-01-01 International Business Machines Corporation Three-dimensional silicon interposer for low voltage low power systems
JP5420671B2 (ja) * 2009-09-14 2014-02-19 株式会社日立製作所 半導体装置
JP5364023B2 (ja) * 2010-03-29 2013-12-11 パナソニック株式会社 半導体装置
US8674510B2 (en) * 2010-07-29 2014-03-18 Taiwan Semiconductor Manufacturing Company, Ltd. Three-dimensional integrated circuit structure having improved power and thermal management
US8445918B2 (en) * 2010-08-13 2013-05-21 International Business Machines Corporation Thermal enhancement for multi-layer semiconductor stacks
US8576578B2 (en) * 2011-06-27 2013-11-05 International Business Machines Corporation Robust power plane configuration in printed circuit boards
WO2013168354A1 (fr) * 2012-05-10 2013-11-14 パナソニック株式会社 Circuit intégré tridimensionnel avec structure de stabilisation pour tension d'alimentation, et procédé pour sa fabrication
US9041206B2 (en) * 2013-03-12 2015-05-26 Taiwan Semiconductor Manufacturing Company, Ltd. Interconnect structure and method
US9625186B2 (en) * 2013-08-29 2017-04-18 Taiwan Semiconductor Manufacturing Co., Ltd. Cooling system for 3D IC
US9741691B2 (en) * 2015-04-29 2017-08-22 Qualcomm Incorporated Power delivery network (PDN) design for monolithic three-dimensional (3-D) integrated circuit (IC)
US11041211B2 (en) * 2018-02-22 2021-06-22 Xilinx, Inc. Power distribution for active-on-active die stack with reduced resistance

Also Published As

Publication number Publication date
US20190252353A1 (en) 2019-08-15
US10777537B2 (en) 2020-09-15
FR3077925A1 (fr) 2019-08-16

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