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FR3050565B1 - Systeme electronique embarque - Google Patents

Systeme electronique embarque Download PDF

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Publication number
FR3050565B1
FR3050565B1 FR1653616A FR1653616A FR3050565B1 FR 3050565 B1 FR3050565 B1 FR 3050565B1 FR 1653616 A FR1653616 A FR 1653616A FR 1653616 A FR1653616 A FR 1653616A FR 3050565 B1 FR3050565 B1 FR 3050565B1
Authority
FR
France
Prior art keywords
actors
ipk
ppn
players
processor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
FR1653616A
Other languages
English (en)
Other versions
FR3050565A1 (fr
Inventor
Arthur STOUTCHININ
Didier Fuin
Mario Toma
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STMicroelectronics Grenoble 2 SAS
Original Assignee
STMicroelectronics Grenoble 2 SAS
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by STMicroelectronics Grenoble 2 SAS filed Critical STMicroelectronics Grenoble 2 SAS
Priority to FR1653616A priority Critical patent/FR3050565B1/fr
Priority to US15/355,188 priority patent/US10346322B2/en
Publication of FR3050565A1 publication Critical patent/FR3050565A1/fr
Application granted granted Critical
Publication of FR3050565B1 publication Critical patent/FR3050565B1/fr
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14Handling requests for interconnection or transfer
    • G06F13/16Handling requests for interconnection or transfer for access to memory bus
    • G06F13/1668Details of memory controller
    • G06F13/1673Details of memory controller using buffers
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14Handling requests for interconnection or transfer
    • G06F13/16Handling requests for interconnection or transfer for access to memory bus
    • G06F13/1668Details of memory controller
    • G06F13/1689Synchronisation and timing concerns
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00Digital computers in general; Data processing equipment in general
    • G06F15/76Architectures of general purpose stored program computers
    • G06F15/82Architectures of general purpose stored program computers data or demand driven
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/36Prevention of errors by analysis, debugging or testing of software
    • G06F11/3604Analysis of software for verifying properties of programs
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F8/00Arrangements for software engineering
    • G06F8/30Creation or generation of source code
    • G06F8/34Graphical or visual programming
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/44Arrangements for executing specific programs
    • G06F9/448Execution paradigms, e.g. implementations of programming paradigms
    • G06F9/4494Execution paradigms, e.g. implementations of programming paradigms data driven

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Communication Control (AREA)
  • Multi Processors (AREA)
  • Computer And Data Communications (AREA)
  • Information Transfer Systems (AREA)

Abstract

Le système électronique (SE) est configuré pour implémenter une application logicielle (AL) décrite sous la forme d'un graphe de type réseau de Kahn (GKPN) comportant des acteurs (Ai). L'un au moins des acteurs (Ai) comporte un processeur (PPn) et l'un au moins des acteurs (Ai) comporte un accélérateur matériel (HW_IPk) et le système (SE) comporte en outre des mémoires tampons (FIFOj) couplées entre les différents acteurs (Ai), et des moyens de traitement (MT) configurés pour permettre un dialogue entre lesdits acteurs (Ai) selon un protocole commun de communication et de synchronisation (PCCS) alors que ledit processeur (PPn) et ledit accélérateur matériel (HW IPk) sont conçus pour utiliser des protocoles de communication individuels différents.
FR1653616A 2016-04-25 2016-04-25 Systeme electronique embarque Expired - Fee Related FR3050565B1 (fr)

Priority Applications (2)

Application Number Priority Date Filing Date Title
FR1653616A FR3050565B1 (fr) 2016-04-25 2016-04-25 Systeme electronique embarque
US15/355,188 US10346322B2 (en) 2016-04-25 2016-11-18 Onboard Kahn network type system comprising a plurality of source and destination actors in order to manage buffer memories based on tokens

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
FR1653616A FR3050565B1 (fr) 2016-04-25 2016-04-25 Systeme electronique embarque
FR1653616 2016-04-25

Publications (2)

Publication Number Publication Date
FR3050565A1 FR3050565A1 (fr) 2017-10-27
FR3050565B1 true FR3050565B1 (fr) 2018-10-19

Family

ID=56148509

Family Applications (1)

Application Number Title Priority Date Filing Date
FR1653616A Expired - Fee Related FR3050565B1 (fr) 2016-04-25 2016-04-25 Systeme electronique embarque

Country Status (2)

Country Link
US (1) US10346322B2 (fr)
FR (1) FR3050565B1 (fr)

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8887121B2 (en) * 2010-07-30 2014-11-11 National Instruments Corporation Developing programs for hardware implementation in a graphical specification and constraint language
US20140013313A1 (en) * 2012-07-03 2014-01-09 Johan Eker Editor/Development Tool for Dataflow Programs
US8893080B2 (en) * 2012-08-15 2014-11-18 Telefonaktiebolaget L M Ericsson (Publ) Parallelization of dataflow actors with local state

Also Published As

Publication number Publication date
FR3050565A1 (fr) 2017-10-27
US10346322B2 (en) 2019-07-09
US20170308485A1 (en) 2017-10-26

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