FR2883101B1 - Transistor mos nanometrique a rapport maximise entre courant a l'etat passant et courant a l'etat bloque - Google Patents
Transistor mos nanometrique a rapport maximise entre courant a l'etat passant et courant a l'etat bloqueInfo
- Publication number
- FR2883101B1 FR2883101B1 FR0550605A FR0550605A FR2883101B1 FR 2883101 B1 FR2883101 B1 FR 2883101B1 FR 0550605 A FR0550605 A FR 0550605A FR 0550605 A FR0550605 A FR 0550605A FR 2883101 B1 FR2883101 B1 FR 2883101B1
- Authority
- FR
- France
- Prior art keywords
- current
- nanometric
- maximized
- mos transistor
- state rate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/67—Thin-film transistors [TFT]
- H10D30/6757—Thin-film transistors [TFT] characterised by the structure of the channel, e.g. transverse or longitudinal shape or doping profile
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B82—NANOTECHNOLOGY
- B82Y—SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
- B82Y10/00—Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/67—Thin-film transistors [TFT]
- H10D30/6704—Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device
- H10D30/6727—Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device having source or drain regions connected to bulk conducting substrates
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
- H10D62/117—Shapes of semiconductor bodies
- H10D62/118—Nanostructure semiconductor bodies
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
- H10D62/117—Shapes of semiconductor bodies
- H10D62/118—Nanostructure semiconductor bodies
- H10D62/119—Nanowire, nanosheet or nanotube semiconductor bodies
- H10D62/121—Nanowire, nanosheet or nanotube semiconductor bodies oriented parallel to substrates
Landscapes
- Engineering & Computer Science (AREA)
- Chemical & Material Sciences (AREA)
- Nanotechnology (AREA)
- Physics & Mathematics (AREA)
- Mathematical Physics (AREA)
- Theoretical Computer Science (AREA)
- Crystallography & Structural Chemistry (AREA)
- Thin Film Transistor (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
Priority Applications (5)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| FR0550605A FR2883101B1 (fr) | 2005-03-08 | 2005-03-08 | Transistor mos nanometrique a rapport maximise entre courant a l'etat passant et courant a l'etat bloque |
| PCT/FR2006/050200 WO2006095112A1 (fr) | 2005-03-08 | 2006-03-07 | Transistor mos nanometrique a rapport maximise entre courant a l'etat passant et courant a l'etat bloque |
| JP2008500244A JP2008533714A (ja) | 2005-03-08 | 2006-03-07 | オン状態での電流とオフ状態での電流との比を最大にするナノメータmosトランジスタ |
| EP06726224A EP1859485A1 (fr) | 2005-03-08 | 2006-03-07 | Transistor mos nanometrique a rapport maximise entre courant a l'etat passant et courant a l'etat bloque |
| US11/885,900 US20110079769A1 (en) | 2005-03-08 | 2006-03-07 | Nanometric MOS Transistor With Maximized Ration Between On-State Current and Off-State Current |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| FR0550605A FR2883101B1 (fr) | 2005-03-08 | 2005-03-08 | Transistor mos nanometrique a rapport maximise entre courant a l'etat passant et courant a l'etat bloque |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| FR2883101A1 FR2883101A1 (fr) | 2006-09-15 |
| FR2883101B1 true FR2883101B1 (fr) | 2007-06-08 |
Family
ID=35385764
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| FR0550605A Expired - Fee Related FR2883101B1 (fr) | 2005-03-08 | 2005-03-08 | Transistor mos nanometrique a rapport maximise entre courant a l'etat passant et courant a l'etat bloque |
Country Status (5)
| Country | Link |
|---|---|
| US (1) | US20110079769A1 (fr) |
| EP (1) | EP1859485A1 (fr) |
| JP (1) | JP2008533714A (fr) |
| FR (1) | FR2883101B1 (fr) |
| WO (1) | WO2006095112A1 (fr) |
Family Cites Families (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| FR2749977B1 (fr) * | 1996-06-14 | 1998-10-09 | Commissariat Energie Atomique | Transistor mos a puits quantique et procedes de fabrication de celui-ci |
| JP2003264290A (ja) * | 2002-03-08 | 2003-09-19 | Fujitsu Ltd | 半導体装置及びその製造方法 |
| US20050161659A1 (en) * | 2002-03-28 | 2005-07-28 | Yanmar Agricultural Equiptment Co. | Nanowire and electronic device |
| US6833556B2 (en) * | 2002-08-12 | 2004-12-21 | Acorn Technologies, Inc. | Insulated gate field effect transistor having passivated schottky barriers to the channel |
| JP2005012110A (ja) * | 2003-06-20 | 2005-01-13 | Handotai Rikougaku Kenkyu Center:Kk | 極微細mosfet |
| US7015147B2 (en) * | 2003-07-22 | 2006-03-21 | Sharp Laboratories Of America, Inc. | Fabrication of silicon-on-nothing (SON) MOSFET fabrication using selective etching of Si1-xGex layer |
-
2005
- 2005-03-08 FR FR0550605A patent/FR2883101B1/fr not_active Expired - Fee Related
-
2006
- 2006-03-07 WO PCT/FR2006/050200 patent/WO2006095112A1/fr not_active Ceased
- 2006-03-07 US US11/885,900 patent/US20110079769A1/en not_active Abandoned
- 2006-03-07 JP JP2008500244A patent/JP2008533714A/ja not_active Abandoned
- 2006-03-07 EP EP06726224A patent/EP1859485A1/fr not_active Withdrawn
Also Published As
| Publication number | Publication date |
|---|---|
| FR2883101A1 (fr) | 2006-09-15 |
| EP1859485A1 (fr) | 2007-11-28 |
| WO2006095112A1 (fr) | 2006-09-14 |
| US20110079769A1 (en) | 2011-04-07 |
| JP2008533714A (ja) | 2008-08-21 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| ST | Notification of lapse |
Effective date: 20121130 |