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FR2711831B1 - Procédé et circuit de mémorisation et de hiérarchisation d'ordres d'effacement dans un dispositif de mémoire. - Google Patents

Procédé et circuit de mémorisation et de hiérarchisation d'ordres d'effacement dans un dispositif de mémoire.

Info

Publication number
FR2711831B1
FR2711831B1 FR9412671A FR9412671A FR2711831B1 FR 2711831 B1 FR2711831 B1 FR 2711831B1 FR 9412671 A FR9412671 A FR 9412671A FR 9412671 A FR9412671 A FR 9412671A FR 2711831 B1 FR2711831 B1 FR 2711831B1
Authority
FR
France
Prior art keywords
prioritizing
storing
circuit
memory device
erasure
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
FR9412671A
Other languages
English (en)
Other versions
FR2711831A1 (fr
Inventor
Mickey Lee Fandrich
Richard Joseph Durante
Geoffrey Alan Gould
Timothy Wade Goodell
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Intel Corp
Original Assignee
Intel Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Intel Corp filed Critical Intel Corp
Publication of FR2711831A1 publication Critical patent/FR2711831A1/fr
Application granted granted Critical
Publication of FR2711831B1 publication Critical patent/FR2711831B1/fr
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/10—Programming or data input circuits
    • G11C16/14—Circuits for erasing electrically, e.g. erase voltage switching circuits
    • G11C16/16—Circuits for erasing electrically, e.g. erase voltage switching circuits for erasing blocks, e.g. arrays, words, groups
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C2216/00—Indexing scheme relating to G11C16/00 and subgroups, for features not directly covered by these groups
    • G11C2216/12—Reading and writing aspects of erasable programmable read-only memories
    • G11C2216/20—Suspension of programming or erasing cells in an array in order to read other cells in it
FR9412671A 1993-10-26 1994-10-24 Procédé et circuit de mémorisation et de hiérarchisation d'ordres d'effacement dans un dispositif de mémoire. Expired - Fee Related FR2711831B1 (fr)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US14329393A 1993-10-26 1993-10-26

Publications (2)

Publication Number Publication Date
FR2711831A1 FR2711831A1 (fr) 1995-05-05
FR2711831B1 true FR2711831B1 (fr) 1997-09-26

Family

ID=22503430

Family Applications (1)

Application Number Title Priority Date Filing Date
FR9412671A Expired - Fee Related FR2711831B1 (fr) 1993-10-26 1994-10-24 Procédé et circuit de mémorisation et de hiérarchisation d'ordres d'effacement dans un dispositif de mémoire.

Country Status (4)

Country Link
US (3) US5809541A (fr)
BE (1) BE1007932A7 (fr)
FR (1) FR2711831B1 (fr)
NL (1) NL194901C (fr)

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US6222762B1 (en) 1992-01-14 2001-04-24 Sandisk Corporation Multi-state memory
JP3173407B2 (ja) * 1997-02-05 2001-06-04 日本電気株式会社 フラッシュｅｅｐｒｏｍ内蔵マイクロコンピュータ
US5905905A (en) * 1997-08-05 1999-05-18 Adaptec, Inc. System for copying IOBS from FIFO into I/O adapter, writing data completed IOB, and invalidating completed IOB in FIFO for reuse of FIFO
US5920501A (en) * 1997-12-12 1999-07-06 Micron Technology, Inc. Flash memory system and method for monitoring the disturb effect on memory cell blocks due to high voltage conditions of other memory cell blocks
US20040100982A1 (en) * 1999-09-30 2004-05-27 Sivaram Balasubramanian Distributed real-time operating system
US6606674B1 (en) * 2000-02-24 2003-08-12 Intel Corporation Method and apparatus for reducing circular list's thrashing by detecting the queues' status on a circular linked list
US6779045B2 (en) * 2001-03-21 2004-08-17 Intel Corporation System and apparatus for increasing the number of operations per transmission for a media management system
JP4230122B2 (ja) * 2001-03-30 2009-02-25 株式会社ルネサステクノロジ マイクロコンピュータ、書込み方法及び消去方法
US6614695B2 (en) * 2001-08-24 2003-09-02 Micron Technology, Inc. Non-volatile memory with block erase
US6898680B2 (en) * 2003-01-03 2005-05-24 Micrel, Incorporated Minimization of overhead of non-volatile memory operation
US7328301B2 (en) * 2003-04-07 2008-02-05 Intel Corporation Dynamically mapping block-alterable memories
US6865122B2 (en) 2003-04-11 2005-03-08 Intel Corporation Reclaiming blocks in a block-alterable memory
ITRM20030354A1 (it) 2003-07-17 2005-01-18 Micron Technology Inc Unita' di controllo per dispositivo di memoria.
US7509452B2 (en) * 2004-01-19 2009-03-24 Ricoh Company, Ltd. Image forming apparatus, erasing method, and hard disk management method
KR101051703B1 (ko) 2004-08-09 2011-07-25 삼성전자주식회사 서스펜드/리쥼 기능을 갖는 집적 회로 카드 및 집적 회로카드 시스템
ITMI20041904A1 (it) * 2004-10-07 2005-01-07 Atmel Corp "metodo e sistema per un approccio di programmazione per un dispositivo elettronico non volatile"
US7496722B2 (en) * 2005-04-26 2009-02-24 Hewlett-Packard Development Company, L.P. Memory mapped page priorities
KR100843136B1 (ko) * 2006-11-14 2008-07-02 삼성전자주식회사 비휘발성 메모리에서 연산 처리를 제어하는 장치 및 그방법
US8099632B2 (en) * 2007-08-08 2012-01-17 Sandisk Technologies Inc. Urgency and time window manipulation to accommodate unpredictable memory operations
US8074021B1 (en) 2008-03-27 2011-12-06 Netapp, Inc. Network storage system including non-volatile solid-state memory controlled by external data layout engine
US7945752B1 (en) * 2008-03-27 2011-05-17 Netapp, Inc. Method and apparatus for achieving consistent read latency from an array of solid-state storage devices
US10445226B2 (en) 2010-08-10 2019-10-15 Rambus Inc. Verify before program resume for memory devices
US8543758B2 (en) * 2011-05-31 2013-09-24 Micron Technology, Inc. Apparatus including memory channel control circuit and related methods for relaying commands to logical units
US8659954B1 (en) * 2011-09-14 2014-02-25 Adesto Technologies Corporation CBRAM/ReRAM with improved program and erase algorithms
DE102012022728A1 (de) * 2012-11-21 2014-05-22 Unify Gmbh & Co. Kg Verfahren zur Steuerung eines Flash-Speichers zur Massenspeicherung, der von einem an einen Host anschließbaren Kommunikationsgerät umfasst ist, und Computerprogrammprodukt zur Ausführung des Verfahrens
US10310923B1 (en) 2014-08-28 2019-06-04 Seagate Technology Llc Probabilistic aging command sorting
US10318193B2 (en) * 2015-09-14 2019-06-11 Sandisk Technologies Llc Systems and methods of command authorization
US10831403B2 (en) 2017-05-19 2020-11-10 Seagate Technology Llc Probabalistic command aging and selection

Family Cites Families (18)

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Publication number Priority date Publication date Assignee Title
US4752871A (en) * 1985-09-30 1988-06-21 Motorola, Inc. Single-chip microcomputer having a program register for controlling two EEPROM arrays
US5034922A (en) * 1987-12-21 1991-07-23 Motorola, Inc. Intelligent electrically erasable, programmable read-only memory with improved read latency
US5053990A (en) * 1988-02-17 1991-10-01 Intel Corporation Program/erase selection for flash memory
DE68913695T2 (de) * 1988-12-27 1994-10-20 Nippon Electric Co Mikrorechner mit einem elektrisch löschbaren und programmierbaren nichtflüchtigen Speicher.
DE69034227T2 (de) * 1989-04-13 2007-05-03 Sandisk Corp., Sunnyvale EEprom-System mit Blocklöschung
US5065364A (en) * 1989-09-15 1991-11-12 Intel Corporation Apparatus for providing block erasing in a flash EPROM
JPH04221496A (ja) * 1990-03-29 1992-08-11 Intel Corp 単一基板上に設けられるコンピュータメモリ回路およびコンピュータメモリを消去するためのシーケンスを終らせる方法
US5333300A (en) * 1991-02-11 1994-07-26 Intel Corporation Timing circuitry and method for controlling automated programming and erasing of a non-volatile semiconductor memory
FR2672709B1 (fr) * 1991-02-11 1994-09-30 Intel Corp Machine d'etat d'ordre.
US5355464A (en) * 1991-02-11 1994-10-11 Intel Corporation Circuitry and method for suspending the automated erasure of a non-volatile semiconductor memory
US5245572A (en) * 1991-07-30 1993-09-14 Intel Corporation Floating gate nonvolatile memory with reading while writing capability
JP2632104B2 (ja) * 1991-11-07 1997-07-23 三菱電機株式会社 不揮発性半導体記憶装置
US5224070A (en) * 1991-12-11 1993-06-29 Intel Corporation Apparatus for determining the conditions of programming circuitry used with flash EEPROM memory
JPH06131889A (ja) * 1992-10-14 1994-05-13 Toshiba Corp 半導体ファイル装置
US5341330A (en) * 1992-10-30 1994-08-23 Intel Corporation Method for writing to a flash memory array during erase suspend intervals
US5369616A (en) * 1992-10-30 1994-11-29 Intel Corporation Method for assuring that an erase process for a memory array has been properly completed
US5509134A (en) * 1993-06-30 1996-04-16 Intel Corporation Method and apparatus for execution of operations in a flash memory array
US5353256A (en) * 1993-06-30 1994-10-04 Intel Corporation Block specific status information in a memory device

Also Published As

Publication number Publication date
BE1007932A7 (fr) 1995-11-21
US5809541A (en) 1998-09-15
US5956742A (en) 1999-09-21
FR2711831A1 (fr) 1995-05-05
US5802343A (en) 1998-09-01
NL194901C (nl) 2003-06-04
NL194901B (nl) 2003-02-03
NL9401779A (nl) 1995-05-16

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Legal Events

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ST Notification of lapse

Effective date: 20140630